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1&l4_wkup { /* 0x44c00000 */
2 compatible = "ti,am4-l4-wkup", "simple-bus";
3 reg = <0x44c00000 0x800>,
4 <0x44c00800 0x800>,
5 <0x44c01000 0x400>,
6 <0x44c01400 0x400>;
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
13
14 segment@0 { /* 0x44c00000 */
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
19 <0x00000800 0x00000800 0x000800>, /* ap 1 */
20 <0x00001000 0x00001000 0x000400>, /* ap 2 */
21 <0x00001400 0x00001400 0x000400>; /* ap 3 */
22 };
23
24 segment@100000 { /* 0x44d00000 */
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
29 <0x00004000 0x00104000 0x001000>, /* ap 5 */
30 <0x00080000 0x00180000 0x002000>, /* ap 6 */
31 <0x00082000 0x00182000 0x001000>, /* ap 7 */
32 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */
33
34 target-module@0 { /* 0x44d00000, ap 4 28.0 */
35 compatible = "ti,sysc";
36 status = "disabled";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 ranges = <0x0 0x0 0x4000>;
40 };
41
42 target-module@80000 { /* 0x44d80000, ap 6 10.0 */
43 compatible = "ti,sysc";
44 status = "disabled";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges = <0x0 0x80000 0x2000>;
48 };
49
50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */
51 compatible = "ti,sysc-omap4", "ti,sysc";
52 reg = <0xf0000 0x4>;
53 reg-names = "rev";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges = <0x0 0xf0000 0x10000>;
57
58 prcm: prcm@0 {
59 compatible = "ti,am4-prcm", "simple-bus";
60 reg = <0x0 0x11000>;
61 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges = <0 0 0x11000>;
65
66 prcm_clocks: clocks {
67 #address-cells = <1>;
68 #size-cells = <0>;
69 };
70
71 prcm_clockdomains: clockdomains {
72 };
73 };
74 };
75 };
76
77 segment@200000 { /* 0x44e00000 */
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */
82 <0x00003000 0x00203000 0x001000>, /* ap 10 */
83 <0x00004000 0x00204000 0x001000>, /* ap 11 */
84 <0x00005000 0x00205000 0x001000>, /* ap 12 */
85 <0x00006000 0x00206000 0x001000>, /* ap 13 */
86 <0x00007000 0x00207000 0x001000>, /* ap 14 */
87 <0x00008000 0x00208000 0x001000>, /* ap 15 */
88 <0x00009000 0x00209000 0x001000>, /* ap 16 */
89 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */
90 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */
91 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */
92 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */
93 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */
94 <0x00010000 0x00210000 0x010000>, /* ap 22 */
95 <0x00030000 0x00230000 0x001000>, /* ap 23 */
96 <0x00031000 0x00231000 0x001000>, /* ap 24 */
97 <0x00032000 0x00232000 0x001000>, /* ap 25 */
98 <0x00033000 0x00233000 0x001000>, /* ap 26 */
99 <0x00034000 0x00234000 0x001000>, /* ap 27 */
100 <0x00035000 0x00235000 0x001000>, /* ap 28 */
101 <0x00036000 0x00236000 0x001000>, /* ap 29 */
102 <0x00037000 0x00237000 0x001000>, /* ap 30 */
103 <0x00038000 0x00238000 0x001000>, /* ap 31 */
104 <0x00039000 0x00239000 0x001000>, /* ap 32 */
105 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */
106 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */
107 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */
108 <0x00040000 0x00240000 0x040000>, /* ap 36 */
109 <0x00080000 0x00280000 0x001000>, /* ap 37 */
110 <0x00088000 0x00288000 0x008000>, /* ap 38 */
111 <0x00092000 0x00292000 0x001000>, /* ap 39 */
112 <0x00086000 0x00286000 0x001000>, /* ap 40 */
113 <0x00087000 0x00287000 0x001000>, /* ap 41 */
114 <0x00090000 0x00290000 0x001000>, /* ap 42 */
115 <0x00091000 0x00291000 0x001000>; /* ap 43 */
116
117 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */
118 compatible = "ti,sysc";
119 status = "disabled";
120 #address-cells = <1>;
121 #size-cells = <1>;
122 ranges = <0x0 0x3000 0x1000>;
123 };
124
125 target-module@5000 { /* 0x44e05000, ap 12 30.0 */
126 compatible = "ti,sysc";
127 status = "disabled";
128 #address-cells = <1>;
129 #size-cells = <1>;
130 ranges = <0x0 0x5000 0x1000>;
131 };
132
133 target-module@7000 { /* 0x44e07000, ap 14 20.0 */
134 compatible = "ti,sysc-omap2", "ti,sysc";
135 reg = <0x7000 0x4>,
136 <0x7010 0x4>,
137 <0x7114 0x4>;
138 reg-names = "rev", "sysc", "syss";
139 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
140 SYSC_OMAP2_SOFTRESET |
141 SYSC_OMAP2_AUTOIDLE)>;
142 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
143 <SYSC_IDLE_NO>,
144 <SYSC_IDLE_SMART>,
145 <SYSC_IDLE_SMART_WKUP>;
146 ti,syss-mask = <1>;
147 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
148 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>,
149 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>;
150 clock-names = "fck", "dbclk";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 ranges = <0x0 0x7000 0x1000>;
154
155 gpio0: gpio@0 {
156 compatible = "ti,am4372-gpio","ti,omap4-gpio";
157 reg = <0x0 0x1000>;
158 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
159 gpio-controller;
160 #gpio-cells = <2>;
161 interrupt-controller;
162 #interrupt-cells = <2>;
163 status = "disabled";
164 };
165 };
166
167 target-module@9000 { /* 0x44e09000, ap 16 04.0 */
168 compatible = "ti,sysc-omap2", "ti,sysc";
169 reg = <0x9050 0x4>,
170 <0x9054 0x4>,
171 <0x9058 0x4>;
172 reg-names = "rev", "sysc", "syss";
173 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
174 SYSC_OMAP2_SOFTRESET |
175 SYSC_OMAP2_AUTOIDLE)>;
176 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
177 <SYSC_IDLE_NO>,
178 <SYSC_IDLE_SMART>,
179 <SYSC_IDLE_SMART_WKUP>;
180 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
181 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>;
182 clock-names = "fck";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 ranges = <0x0 0x9000 0x1000>;
186
187 uart0: serial@0 {
188 compatible = "ti,am4372-uart","ti,omap2-uart";
189 reg = <0x0 0x2000>;
190 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
191 };
192 };
193
194 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */
195 compatible = "ti,sysc-omap2", "ti,sysc";
196 reg = <0xb000 0x8>,
197 <0xb010 0x8>,
198 <0xb090 0x8>;
199 reg-names = "rev", "sysc", "syss";
200 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
201 SYSC_OMAP2_ENAWAKEUP |
202 SYSC_OMAP2_SOFTRESET |
203 SYSC_OMAP2_AUTOIDLE)>;
204 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
205 <SYSC_IDLE_NO>,
206 <SYSC_IDLE_SMART>,
207 <SYSC_IDLE_SMART_WKUP>;
208 ti,syss-mask = <1>;
209 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
210 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>;
211 clock-names = "fck";
212 #address-cells = <1>;
213 #size-cells = <1>;
214 ranges = <0x0 0xb000 0x1000>;
215
216 i2c0: i2c@0 {
217 compatible = "ti,am4372-i2c","ti,omap4-i2c";
218 reg = <0x0 0x1000>;
219 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
220 #address-cells = <1>;
221 #size-cells = <0>;
222 status = "disabled";
223 };
224 };
225
226 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */
227 compatible = "ti,sysc-omap4", "ti,sysc";
228 reg = <0xd000 0x4>,
229 <0xd010 0x4>;
230 reg-names = "rev", "sysc";
231 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
232 <SYSC_IDLE_NO>,
233 <SYSC_IDLE_SMART>,
234 <SYSC_IDLE_SMART_WKUP>;
235 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */
236 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>;
237 clock-names = "fck";
238 #address-cells = <1>;
239 #size-cells = <1>;
240 ranges = <0x0 0xd000 0x1000>;
241
242 tscadc: tscadc@0 {
243 compatible = "ti,am3359-tscadc";
244 reg = <0x0 0x1000>;
245 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
246 clocks = <&adc_tsc_fck>;
247 clock-names = "fck";
248 status = "disabled";
249 dmas = <&edma 53 0>, <&edma 57 0>;
250 dma-names = "fifo0", "fifo1";
251
252 tsc {
253 compatible = "ti,am3359-tsc";
254 };
255
256 adc {
257 #io-channel-cells = <1>;
258 compatible = "ti,am3359-adc";
259 };
260
261 };
262 };
263
264 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */
265 compatible = "ti,sysc-omap4", "ti,sysc";
266 reg = <0x10000 0x4>;
267 reg-names = "rev";
268 #address-cells = <1>;
269 #size-cells = <1>;
270 ranges = <0x0 0x10000 0x10000>;
271
272 scm: scm@0 {
273 compatible = "ti,am4-scm", "simple-bus";
274 reg = <0x0 0x4000>;
275 #address-cells = <1>;
276 #size-cells = <1>;
277 ranges = <0 0 0x4000>;
278
279 am43xx_pinmux: pinmux@800 {
280 compatible = "ti,am437-padconf",
281 "pinctrl-single";
282 reg = <0x800 0x31c>;
283 #address-cells = <1>;
284 #size-cells = <0>;
285 #pinctrl-cells = <1>;
286 #interrupt-cells = <1>;
287 interrupt-controller;
288 pinctrl-single,register-width = <32>;
289 pinctrl-single,function-mask = <0xffffffff>;
290 };
291
292 scm_conf: scm_conf@0 {
293 compatible = "syscon", "simple-bus";
294 reg = <0x0 0x800>;
295 #address-cells = <1>;
296 #size-cells = <1>;
297
298 phy_gmii_sel: phy-gmii-sel {
299 compatible = "ti,am43xx-phy-gmii-sel";
300 reg = <0x650 0x4>;
301 #phy-cells = <2>;
302 };
303
304 scm_clocks: clocks {
305 #address-cells = <1>;
306 #size-cells = <0>;
307 };
308 };
309
310 wkup_m3_ipc: wkup_m3_ipc@1324 {
311 compatible = "ti,am4372-wkup-m3-ipc";
312 reg = <0x1324 0x44>;
313 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
314 ti,rproc = <&wkup_m3>;
315 mboxes = <&mailbox &mbox_wkupm3>;
316 };
317
318 edma_xbar: dma-router@f90 {
319 compatible = "ti,am335x-edma-crossbar";
320 reg = <0xf90 0x40>;
321 #dma-cells = <3>;
322 dma-requests = <64>;
323 dma-masters = <&edma>;
324 };
325
326 scm_clockdomains: clockdomains {
327 };
328 };
329 };
330
331 timer1_target: target-module@31000 { /* 0x44e31000, ap 24 40.0 */
332 compatible = "ti,sysc-omap2-timer", "ti,sysc";
333 reg = <0x31000 0x4>,
334 <0x31010 0x4>,
335 <0x31014 0x4>;
336 reg-names = "rev", "sysc", "syss";
337 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
338 SYSC_OMAP2_SOFTRESET |
339 SYSC_OMAP2_AUTOIDLE)>;
340 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
341 <SYSC_IDLE_NO>,
342 <SYSC_IDLE_SMART>;
343 ti,syss-mask = <1>;
344 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
345 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>;
346 clock-names = "fck";
347 #address-cells = <1>;
348 #size-cells = <1>;
349 ranges = <0x0 0x31000 0x1000>;
350
351 timer1: timer@0 {
352 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
353 reg = <0x0 0x400>;
354 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
355 ti,timer-alwon;
356 clocks = <&timer1_fck>;
357 clock-names = "fck";
358 };
359 };
360
361 target-module@33000 { /* 0x44e33000, ap 26 18.0 */
362 compatible = "ti,sysc";
363 status = "disabled";
364 #address-cells = <1>;
365 #size-cells = <1>;
366 ranges = <0x0 0x33000 0x1000>;
367 };
368
369 target-module@35000 { /* 0x44e35000, ap 28 50.0 */
370 compatible = "ti,sysc-omap2", "ti,sysc";
371 reg = <0x35000 0x4>,
372 <0x35010 0x4>,
373 <0x35014 0x4>;
374 reg-names = "rev", "sysc", "syss";
375 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
376 SYSC_OMAP2_SOFTRESET)>;
377 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
378 <SYSC_IDLE_NO>,
379 <SYSC_IDLE_SMART>,
380 <SYSC_IDLE_SMART_WKUP>;
381 ti,syss-mask = <1>;
382 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
383 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
384 clock-names = "fck";
385 #address-cells = <1>;
386 #size-cells = <1>;
387 ranges = <0x0 0x35000 0x1000>;
388
389 wdt: wdt@0 {
390 compatible = "ti,am4372-wdt","ti,omap3-wdt";
391 reg = <0x0 0x1000>;
392 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
393 };
394 };
395
396 target-module@37000 { /* 0x44e37000, ap 30 08.0 */
397 compatible = "ti,sysc";
398 status = "disabled";
399 #address-cells = <1>;
400 #size-cells = <1>;
401 ranges = <0x0 0x37000 0x1000>;
402 };
403
404 target-module@39000 { /* 0x44e39000, ap 32 02.0 */
405 compatible = "ti,sysc";
406 status = "disabled";
407 #address-cells = <1>;
408 #size-cells = <1>;
409 ranges = <0x0 0x39000 0x1000>;
410 };
411
412 target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */
413 compatible = "ti,sysc-omap4-simple", "ti,sysc";
414 ti,hwmods = "rtc";
415 reg = <0x3e074 0x4>,
416 <0x3e078 0x4>;
417 reg-names = "rev", "sysc";
418 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
419 <SYSC_IDLE_NO>,
420 <SYSC_IDLE_SMART>,
421 <SYSC_IDLE_SMART_WKUP>;
422 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
423 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
424 clock-names = "fck";
425 #address-cells = <1>;
426 #size-cells = <1>;
427 ranges = <0x0 0x3e000 0x1000>;
428
429 rtc: rtc@0 {
430 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
431 "ti,da830-rtc";
432 reg = <0x0 0x1000>;
433 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
435 clocks = <&clk_32768_ck>;
436 clock-names = "int-clk";
437 system-power-controller;
438 status = "disabled";
439 };
440 };
441
442 target-module@40000 { /* 0x44e40000, ap 36 68.0 */
443 compatible = "ti,sysc";
444 status = "disabled";
445 #address-cells = <1>;
446 #size-cells = <1>;
447 ranges = <0x0 0x40000 0x40000>;
448 };
449
450 target-module@86000 { /* 0x44e86000, ap 40 70.0 */
451 compatible = "ti,sysc-omap2", "ti,sysc";
452 reg = <0x86000 0x4>,
453 <0x86004 0x4>;
454 reg-names = "rev", "sysc";
455 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
456 <SYSC_IDLE_NO>;
457 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */
458 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>;
459 clock-names = "fck";
460 #address-cells = <1>;
461 #size-cells = <1>;
462 ranges = <0x0 0x86000 0x1000>;
463
464 counter32k: counter@0 {
465 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
466 reg = <0x0 0x40>;
467 };
468 };
469
470 target-module@88000 { /* 0x44e88000, ap 38 12.0 */
471 compatible = "ti,sysc";
472 status = "disabled";
473 #address-cells = <1>;
474 #size-cells = <1>;
475 ranges = <0x00000000 0x00088000 0x00008000>,
476 <0x00008000 0x00090000 0x00001000>,
477 <0x00009000 0x00091000 0x00001000>;
478 };
479 };
480};
481
482&l4_fast { /* 0x4a000000 */
483 compatible = "ti,am4-l4-fast", "simple-bus";
484 reg = <0x4a000000 0x800>,
485 <0x4a000800 0x800>,
486 <0x4a001000 0x400>;
487 reg-names = "ap", "la", "ia0";
488 #address-cells = <1>;
489 #size-cells = <1>;
490 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
491
492 segment@0 { /* 0x4a000000 */
493 compatible = "simple-bus";
494 #address-cells = <1>;
495 #size-cells = <1>;
496 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
497 <0x00000800 0x00000800 0x000800>, /* ap 1 */
498 <0x00001000 0x00001000 0x000400>, /* ap 2 */
499 <0x00100000 0x00100000 0x008000>, /* ap 3 */
500 <0x00108000 0x00108000 0x001000>, /* ap 4 */
501 <0x00400000 0x00400000 0x002000>, /* ap 5 */
502 <0x00402000 0x00402000 0x001000>, /* ap 6 */
503 <0x00200000 0x00200000 0x080000>, /* ap 7 */
504 <0x00280000 0x00280000 0x001000>; /* ap 8 */
505
506 target-module@100000 { /* 0x4a100000, ap 3 04.0 */
507 compatible = "ti,sysc-omap4-simple", "ti,sysc";
508 reg = <0x101200 0x4>,
509 <0x101208 0x4>,
510 <0x101204 0x4>;
511 reg-names = "rev", "sysc", "syss";
512 ti,sysc-mask = <0>;
513 ti,sysc-midle = <SYSC_IDLE_FORCE>,
514 <SYSC_IDLE_NO>;
515 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
516 <SYSC_IDLE_NO>;
517 ti,syss-mask = <1>;
518 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
519 clock-names = "fck";
520 #address-cells = <1>;
521 #size-cells = <1>;
522 ranges = <0x0 0x100000 0x8000>;
523
524 mac: ethernet@0 {
525 compatible = "ti,am4372-cpsw","ti,cpsw";
526 reg = <0x0 0x800
527 0x1200 0x100>;
528 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
529 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
530 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
531 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
532 #address-cells = <1>;
533 #size-cells = <1>;
534 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
535 <&dpll_clksel_mac_clk>;
536 clock-names = "fck", "cpts", "50mclk";
537 assigned-clocks = <&dpll_clksel_mac_clk>;
538 assigned-clock-rates = <50000000>;
539 status = "disabled";
540 cpdma_channels = <8>;
541 ale_entries = <1024>;
542 bd_ram_size = <0x2000>;
543 mac_control = <0x20>;
544 slaves = <2>;
545 active_slave = <0>;
546 cpts_clock_mult = <0x80000000>;
547 cpts_clock_shift = <29>;
548 ranges = <0 0 0x8000>;
549 syscon = <&scm_conf>;
550
551 davinci_mdio: mdio@1000 {
552 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
553 reg = <0x1000 0x100>;
554 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
555 clock-names = "fck";
556 #address-cells = <1>;
557 #size-cells = <0>;
558 bus_freq = <1000000>;
559 status = "disabled";
560 };
561
562 cpsw_emac0: slave@200 {
563 /* Filled in by U-Boot */
564 mac-address = [ 00 00 00 00 00 00 ];
565 phys = <&phy_gmii_sel 1 0>;
566 };
567
568 cpsw_emac1: slave@300 {
569 /* Filled in by U-Boot */
570 mac-address = [ 00 00 00 00 00 00 ];
571 phys = <&phy_gmii_sel 2 0>;
572 };
573 };
574 };
575
576 target-module@200000 { /* 0x4a200000, ap 7 02.0 */
577 compatible = "ti,sysc";
578 status = "disabled";
579 #address-cells = <1>;
580 #size-cells = <1>;
581 ranges = <0x0 0x200000 0x80000>;
582 };
583
584 target-module@400000 { /* 0x4a400000, ap 5 08.0 */
585 compatible = "ti,sysc";
586 status = "disabled";
587 #address-cells = <1>;
588 #size-cells = <1>;
589 ranges = <0x0 0x400000 0x2000>;
590 };
591 };
592};
593
594&l4_per { /* 0x48000000 */
595 compatible = "ti,am4-l4-per", "simple-bus";
596 reg = <0x48000000 0x800>,
597 <0x48000800 0x800>,
598 <0x48001000 0x400>,
599 <0x48001400 0x400>,
600 <0x48001800 0x400>,
601 <0x48001c00 0x400>;
602 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
603 #address-cells = <1>;
604 #size-cells = <1>;
605 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */
606 <0x00100000 0x48100000 0x100000>, /* segment 1 */
607 <0x00200000 0x48200000 0x100000>, /* segment 2 */
608 <0x00300000 0x48300000 0x100000>, /* segment 3 */
609 <0x46000000 0x46000000 0x400000>, /* l3 data port */
610 <0x46400000 0x46400000 0x400000>; /* l3 data port */
611
612 segment@0 { /* 0x48000000 */
613 compatible = "simple-bus";
614 #address-cells = <1>;
615 #size-cells = <1>;
616 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
617 <0x00000800 0x00000800 0x000800>, /* ap 1 */
618 <0x00001000 0x00001000 0x000400>, /* ap 2 */
619 <0x00001400 0x00001400 0x000400>, /* ap 3 */
620 <0x00001800 0x00001800 0x000400>, /* ap 4 */
621 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */
622 <0x00008000 0x00008000 0x001000>, /* ap 6 */
623 <0x00009000 0x00009000 0x001000>, /* ap 7 */
624 <0x00022000 0x00022000 0x001000>, /* ap 8 */
625 <0x00023000 0x00023000 0x001000>, /* ap 9 */
626 <0x00024000 0x00024000 0x001000>, /* ap 10 */
627 <0x00025000 0x00025000 0x001000>, /* ap 11 */
628 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */
629 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */
630 <0x00038000 0x00038000 0x002000>, /* ap 14 */
631 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */
632 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */
633 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */
634 <0x00040000 0x00040000 0x001000>, /* ap 18 */
635 <0x00041000 0x00041000 0x001000>, /* ap 19 */
636 <0x00042000 0x00042000 0x001000>, /* ap 20 */
637 <0x00043000 0x00043000 0x001000>, /* ap 21 */
638 <0x00044000 0x00044000 0x001000>, /* ap 22 */
639 <0x00045000 0x00045000 0x001000>, /* ap 23 */
640 <0x00046000 0x00046000 0x001000>, /* ap 24 */
641 <0x00047000 0x00047000 0x001000>, /* ap 25 */
642 <0x00048000 0x00048000 0x001000>, /* ap 26 */
643 <0x00049000 0x00049000 0x001000>, /* ap 27 */
644 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */
645 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */
646 <0x00060000 0x00060000 0x001000>, /* ap 30 */
647 <0x00061000 0x00061000 0x001000>, /* ap 31 */
648 <0x00080000 0x00080000 0x010000>, /* ap 32 */
649 <0x00090000 0x00090000 0x001000>, /* ap 33 */
650 <0x00030000 0x00030000 0x001000>, /* ap 65 */
651 <0x00031000 0x00031000 0x001000>, /* ap 66 */
652 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */
653 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */
654 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */
655 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */
656 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */
657 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */
658 <0x00034000 0x00034000 0x001000>, /* ap 80 */
659 <0x00035000 0x00035000 0x001000>, /* ap 81 */
660 <0x00036000 0x00036000 0x001000>, /* ap 84 */
661 <0x00037000 0x00037000 0x001000>, /* ap 85 */
662 <0x46000000 0x46000000 0x400000>, /* l3 data port */
663 <0x46400000 0x46400000 0x400000>; /* l3 data port */
664
665 target-module@8000 { /* 0x48008000, ap 6 10.0 */
666 compatible = "ti,sysc";
667 status = "disabled";
668 #address-cells = <1>;
669 #size-cells = <1>;
670 ranges = <0x0 0x8000 0x1000>;
671 };
672
673 target-module@22000 { /* 0x48022000, ap 8 0a.0 */
674 compatible = "ti,sysc-omap2", "ti,sysc";
675 reg = <0x22050 0x4>,
676 <0x22054 0x4>,
677 <0x22058 0x4>;
678 reg-names = "rev", "sysc", "syss";
679 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
680 SYSC_OMAP2_SOFTRESET |
681 SYSC_OMAP2_AUTOIDLE)>;
682 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
683 <SYSC_IDLE_NO>,
684 <SYSC_IDLE_SMART>,
685 <SYSC_IDLE_SMART_WKUP>;
686 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
687 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>;
688 clock-names = "fck";
689 #address-cells = <1>;
690 #size-cells = <1>;
691 ranges = <0x0 0x22000 0x1000>;
692
693 uart1: serial@0 {
694 compatible = "ti,am4372-uart","ti,omap2-uart";
695 reg = <0x0 0x2000>;
696 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
697 status = "disabled";
698 };
699 };
700
701 target-module@24000 { /* 0x48024000, ap 10 1c.0 */
702 compatible = "ti,sysc-omap2", "ti,sysc";
703 reg = <0x24050 0x4>,
704 <0x24054 0x4>,
705 <0x24058 0x4>;
706 reg-names = "rev", "sysc", "syss";
707 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
708 SYSC_OMAP2_SOFTRESET |
709 SYSC_OMAP2_AUTOIDLE)>;
710 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
711 <SYSC_IDLE_NO>,
712 <SYSC_IDLE_SMART>,
713 <SYSC_IDLE_SMART_WKUP>;
714 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
715 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>;
716 clock-names = "fck";
717 #address-cells = <1>;
718 #size-cells = <1>;
719 ranges = <0x0 0x24000 0x1000>;
720
721 uart2: serial@0 {
722 compatible = "ti,am4372-uart","ti,omap2-uart";
723 reg = <0x0 0x2000>;
724 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
725 status = "disabled";
726 };
727 };
728
729 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */
730 compatible = "ti,sysc-omap2", "ti,sysc";
731 reg = <0x2a000 0x8>,
732 <0x2a010 0x8>,
733 <0x2a090 0x8>;
734 reg-names = "rev", "sysc", "syss";
735 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
736 SYSC_OMAP2_ENAWAKEUP |
737 SYSC_OMAP2_SOFTRESET |
738 SYSC_OMAP2_AUTOIDLE)>;
739 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
740 <SYSC_IDLE_NO>,
741 <SYSC_IDLE_SMART>,
742 <SYSC_IDLE_SMART_WKUP>;
743 ti,syss-mask = <1>;
744 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
745 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>;
746 clock-names = "fck";
747 #address-cells = <1>;
748 #size-cells = <1>;
749 ranges = <0x0 0x2a000 0x1000>;
750
751 i2c1: i2c@0 {
752 compatible = "ti,am4372-i2c","ti,omap4-i2c";
753 reg = <0x0 0x1000>;
754 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
755 #address-cells = <1>;
756 #size-cells = <0>;
757 status = "disabled";
758 };
759 };
760
761 target-module@30000 { /* 0x48030000, ap 65 08.0 */
762 compatible = "ti,sysc-omap2", "ti,sysc";
763 reg = <0x30000 0x4>,
764 <0x30110 0x4>,
765 <0x30114 0x4>;
766 reg-names = "rev", "sysc", "syss";
767 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
768 SYSC_OMAP2_SOFTRESET |
769 SYSC_OMAP2_AUTOIDLE)>;
770 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
771 <SYSC_IDLE_NO>,
772 <SYSC_IDLE_SMART>;
773 ti,syss-mask = <1>;
774 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
775 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>;
776 clock-names = "fck";
777 #address-cells = <1>;
778 #size-cells = <1>;
779 ranges = <0x0 0x30000 0x1000>;
780
781 spi0: spi@0 {
782 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
783 reg = <0x0 0x400>;
784 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
785 #address-cells = <1>;
786 #size-cells = <0>;
787 status = "disabled";
788 };
789 };
790
791 target-module@34000 { /* 0x48034000, ap 80 56.0 */
792 compatible = "ti,sysc";
793 status = "disabled";
794 #address-cells = <1>;
795 #size-cells = <1>;
796 ranges = <0x0 0x34000 0x1000>;
797 };
798
799 target-module@36000 { /* 0x48036000, ap 84 3e.0 */
800 compatible = "ti,sysc";
801 status = "disabled";
802 #address-cells = <1>;
803 #size-cells = <1>;
804 ranges = <0x0 0x36000 0x1000>;
805 };
806
807 target-module@38000 { /* 0x48038000, ap 14 04.0 */
808 compatible = "ti,sysc-omap4-simple", "ti,sysc";
809 reg = <0x38000 0x4>,
810 <0x38004 0x4>;
811 reg-names = "rev", "sysc";
812 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
813 <SYSC_IDLE_NO>,
814 <SYSC_IDLE_SMART>;
815 /* Domains (P, C): per_pwrdm, l3s_clkdm */
816 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>;
817 clock-names = "fck";
818 #address-cells = <1>;
819 #size-cells = <1>;
820 ranges = <0x0 0x38000 0x2000>,
821 <0x46000000 0x46000000 0x400000>;
822
823 mcasp0: mcasp@0 {
824 compatible = "ti,am33xx-mcasp-audio";
825 reg = <0x0 0x2000>,
826 <0x46000000 0x400000>;
827 reg-names = "mpu", "dat";
828 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
829 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
830 interrupt-names = "tx", "rx";
831 status = "disabled";
832 dmas = <&edma 8 2>,
833 <&edma 9 2>;
834 dma-names = "tx", "rx";
835 };
836 };
837
838 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */
839 compatible = "ti,sysc-omap4-simple", "ti,sysc";
840 reg = <0x3c000 0x4>,
841 <0x3c004 0x4>;
842 reg-names = "rev", "sysc";
843 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
844 <SYSC_IDLE_NO>,
845 <SYSC_IDLE_SMART>;
846 /* Domains (P, C): per_pwrdm, l3s_clkdm */
847 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>;
848 clock-names = "fck";
849 #address-cells = <1>;
850 #size-cells = <1>;
851 ranges = <0x0 0x3c000 0x2000>,
852 <0x46400000 0x46400000 0x400000>;
853
854 mcasp1: mcasp@0 {
855 compatible = "ti,am33xx-mcasp-audio";
856 reg = <0x0 0x2000>,
857 <0x46400000 0x400000>;
858 reg-names = "mpu", "dat";
859 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
861 interrupt-names = "tx", "rx";
862 status = "disabled";
863 dmas = <&edma 10 2>,
864 <&edma 11 2>;
865 dma-names = "tx", "rx";
866 };
867 };
868
869 timer2_target: target-module@40000 { /* 0x48040000, ap 18 1e.0 */
870 compatible = "ti,sysc-omap4-timer", "ti,sysc";
871 reg = <0x40000 0x4>,
872 <0x40010 0x4>,
873 <0x40014 0x4>;
874 reg-names = "rev", "sysc", "syss";
875 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
876 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
877 <SYSC_IDLE_NO>,
878 <SYSC_IDLE_SMART>,
879 <SYSC_IDLE_SMART_WKUP>;
880 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
881 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>;
882 clock-names = "fck";
883 #address-cells = <1>;
884 #size-cells = <1>;
885 ranges = <0x0 0x40000 0x1000>;
886
887 timer2: timer@0 {
888 compatible = "ti,am4372-timer","ti,am335x-timer";
889 reg = <0x0 0x400>;
890 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
891 clocks = <&timer2_fck>;
892 clock-names = "fck";
893 };
894 };
895
896 target-module@42000 { /* 0x48042000, ap 20 24.0 */
897 compatible = "ti,sysc-omap4-timer", "ti,sysc";
898 reg = <0x42000 0x4>,
899 <0x42010 0x4>,
900 <0x42014 0x4>;
901 reg-names = "rev", "sysc", "syss";
902 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
903 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
904 <SYSC_IDLE_NO>,
905 <SYSC_IDLE_SMART>,
906 <SYSC_IDLE_SMART_WKUP>;
907 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
908 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>;
909 clock-names = "fck";
910 #address-cells = <1>;
911 #size-cells = <1>;
912 ranges = <0x0 0x42000 0x1000>;
913
914 timer3: timer@0 {
915 compatible = "ti,am4372-timer","ti,am335x-timer";
916 reg = <0x0 0x400>;
917 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
918 status = "disabled";
919 };
920 };
921
922 target-module@44000 { /* 0x48044000, ap 22 26.0 */
923 compatible = "ti,sysc-omap4-timer", "ti,sysc";
924 reg = <0x44000 0x4>,
925 <0x44010 0x4>,
926 <0x44014 0x4>;
927 reg-names = "rev", "sysc", "syss";
928 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
929 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
930 <SYSC_IDLE_NO>,
931 <SYSC_IDLE_SMART>,
932 <SYSC_IDLE_SMART_WKUP>;
933 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
934 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>;
935 clock-names = "fck";
936 #address-cells = <1>;
937 #size-cells = <1>;
938 ranges = <0x0 0x44000 0x1000>;
939
940 timer4: timer@0 {
941 compatible = "ti,am4372-timer","ti,am335x-timer";
942 reg = <0x0 0x400>;
943 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
944 ti,timer-pwm;
945 status = "disabled";
946 };
947 };
948
949 target-module@46000 { /* 0x48046000, ap 24 28.0 */
950 compatible = "ti,sysc-omap4-timer", "ti,sysc";
951 reg = <0x46000 0x4>,
952 <0x46010 0x4>,
953 <0x46014 0x4>;
954 reg-names = "rev", "sysc", "syss";
955 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
956 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
957 <SYSC_IDLE_NO>,
958 <SYSC_IDLE_SMART>,
959 <SYSC_IDLE_SMART_WKUP>;
960 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
961 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>;
962 clock-names = "fck";
963 #address-cells = <1>;
964 #size-cells = <1>;
965 ranges = <0x0 0x46000 0x1000>;
966
967 timer5: timer@0 {
968 compatible = "ti,am4372-timer","ti,am335x-timer";
969 reg = <0x0 0x400>;
970 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
971 ti,timer-pwm;
972 status = "disabled";
973 };
974 };
975
976 target-module@48000 { /* 0x48048000, ap 26 1a.0 */
977 compatible = "ti,sysc-omap4-timer", "ti,sysc";
978 reg = <0x48000 0x4>,
979 <0x48010 0x4>,
980 <0x48014 0x4>;
981 reg-names = "rev", "sysc", "syss";
982 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
983 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
984 <SYSC_IDLE_NO>,
985 <SYSC_IDLE_SMART>,
986 <SYSC_IDLE_SMART_WKUP>;
987 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
988 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>;
989 clock-names = "fck";
990 #address-cells = <1>;
991 #size-cells = <1>;
992 ranges = <0x0 0x48000 0x1000>;
993
994 timer6: timer@0 {
995 compatible = "ti,am4372-timer","ti,am335x-timer";
996 reg = <0x0 0x400>;
997 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
998 ti,timer-pwm;
999 status = "disabled";
1000 };
1001 };
1002
1003 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */
1004 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1005 reg = <0x4a000 0x4>,
1006 <0x4a010 0x4>,
1007 <0x4a014 0x4>;
1008 reg-names = "rev", "sysc", "syss";
1009 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1010 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1011 <SYSC_IDLE_NO>,
1012 <SYSC_IDLE_SMART>,
1013 <SYSC_IDLE_SMART_WKUP>;
1014 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1015 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>;
1016 clock-names = "fck";
1017 #address-cells = <1>;
1018 #size-cells = <1>;
1019 ranges = <0x0 0x4a000 0x1000>;
1020
1021 timer7: timer@0 {
1022 compatible = "ti,am4372-timer","ti,am335x-timer";
1023 reg = <0x0 0x400>;
1024 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1025 ti,timer-pwm;
1026 status = "disabled";
1027 };
1028 };
1029
1030 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */
1031 compatible = "ti,sysc-omap2", "ti,sysc";
1032 reg = <0x4c000 0x4>,
1033 <0x4c010 0x4>,
1034 <0x4c114 0x4>;
1035 reg-names = "rev", "sysc", "syss";
1036 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1037 SYSC_OMAP2_SOFTRESET |
1038 SYSC_OMAP2_AUTOIDLE)>;
1039 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1040 <SYSC_IDLE_NO>,
1041 <SYSC_IDLE_SMART>,
1042 <SYSC_IDLE_SMART_WKUP>;
1043 ti,syss-mask = <1>;
1044 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1045 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>,
1046 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>;
1047 clock-names = "fck", "dbclk";
1048 #address-cells = <1>;
1049 #size-cells = <1>;
1050 ranges = <0x0 0x4c000 0x1000>;
1051
1052 gpio1: gpio@0 {
1053 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1054 reg = <0x0 0x1000>;
1055 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1056 gpio-controller;
1057 #gpio-cells = <2>;
1058 interrupt-controller;
1059 #interrupt-cells = <2>;
1060 status = "disabled";
1061 };
1062 };
1063
1064 target-module@60000 { /* 0x48060000, ap 30 14.0 */
1065 compatible = "ti,sysc-omap2", "ti,sysc";
1066 reg = <0x602fc 0x4>,
1067 <0x60110 0x4>,
1068 <0x60114 0x4>;
1069 reg-names = "rev", "sysc", "syss";
1070 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1071 SYSC_OMAP2_ENAWAKEUP |
1072 SYSC_OMAP2_SOFTRESET |
1073 SYSC_OMAP2_AUTOIDLE)>;
1074 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1075 <SYSC_IDLE_NO>,
1076 <SYSC_IDLE_SMART>;
1077 ti,syss-mask = <1>;
1078 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1079 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>;
1080 clock-names = "fck";
1081 #address-cells = <1>;
1082 #size-cells = <1>;
1083 ranges = <0x0 0x60000 0x1000>;
1084
1085 mmc1: mmc@0 {
1086 compatible = "ti,am437-sdhci";
1087 reg = <0x0 0x1000>;
1088 ti,needs-special-reset;
1089 dmas = <&edma 24 0>,
1090 <&edma 25 0>;
1091 dma-names = "tx", "rx";
1092 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1093 status = "disabled";
1094 };
1095 };
1096
1097 target-module@80000 { /* 0x48080000, ap 32 18.0 */
1098 compatible = "ti,sysc-omap2", "ti,sysc";
1099 reg = <0x80000 0x4>,
1100 <0x80010 0x4>,
1101 <0x80014 0x4>;
1102 reg-names = "rev", "sysc", "syss";
1103 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1104 SYSC_OMAP2_SOFTRESET |
1105 SYSC_OMAP2_AUTOIDLE)>;
1106 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1107 <SYSC_IDLE_NO>,
1108 <SYSC_IDLE_SMART>;
1109 ti,syss-mask = <1>;
1110 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1111 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>;
1112 clock-names = "fck";
1113 #address-cells = <1>;
1114 #size-cells = <1>;
1115 ranges = <0x0 0x80000 0x10000>;
1116
1117 elm: elm@0 {
1118 compatible = "ti,am3352-elm";
1119 reg = <0x0 0x2000>;
1120 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1121 clocks = <&l4ls_gclk>;
1122 clock-names = "fck";
1123 status = "disabled";
1124 };
1125 };
1126
1127 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */
1128 compatible = "ti,sysc-omap4", "ti,sysc";
1129 reg = <0xc8000 0x4>,
1130 <0xc8010 0x4>;
1131 reg-names = "rev", "sysc";
1132 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1133 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1134 <SYSC_IDLE_NO>,
1135 <SYSC_IDLE_SMART>;
1136 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1137 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>;
1138 clock-names = "fck";
1139 #address-cells = <1>;
1140 #size-cells = <1>;
1141 ranges = <0x0 0xc8000 0x1000>;
1142
1143 mailbox: mailbox@0 {
1144 compatible = "ti,omap4-mailbox";
1145 reg = <0x0 0x200>;
1146 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1147 #mbox-cells = <1>;
1148 ti,mbox-num-users = <4>;
1149 ti,mbox-num-fifos = <8>;
1150 mbox_wkupm3: wkup_m3 {
1151 ti,mbox-send-noirq;
1152 ti,mbox-tx = <0 0 0>;
1153 ti,mbox-rx = <0 0 3>;
1154 };
1155 };
1156 };
1157
1158 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */
1159 compatible = "ti,sysc-omap2", "ti,sysc";
1160 reg = <0xca000 0x4>,
1161 <0xca010 0x4>,
1162 <0xca014 0x4>;
1163 reg-names = "rev", "sysc", "syss";
1164 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1165 SYSC_OMAP2_ENAWAKEUP |
1166 SYSC_OMAP2_SOFTRESET |
1167 SYSC_OMAP2_AUTOIDLE)>;
1168 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1169 <SYSC_IDLE_NO>,
1170 <SYSC_IDLE_SMART>;
1171 ti,syss-mask = <1>;
1172 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1173 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>;
1174 clock-names = "fck";
1175 #address-cells = <1>;
1176 #size-cells = <1>;
1177 ranges = <0x0 0xca000 0x1000>;
1178
1179 hwspinlock: spinlock@0 {
1180 compatible = "ti,omap4-hwspinlock";
1181 reg = <0x0 0x1000>;
1182 #hwlock-cells = <1>;
1183 };
1184 };
1185 };
1186
1187 segment@100000 { /* 0x48100000 */
1188 compatible = "simple-bus";
1189 #address-cells = <1>;
1190 #size-cells = <1>;
1191 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */
1192 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */
1193 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */
1194 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */
1195 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */
1196 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */
1197 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */
1198 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */
1199 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */
1200 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */
1201 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */
1202 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */
1203 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */
1204 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */
1205 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */
1206 <0x000af000 0x001af000 0x001000>, /* ap 49 */
1207 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */
1208 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */
1209 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */
1210 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */
1211 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */
1212 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */
1213 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */
1214 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */
1215 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */
1216 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */
1217 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */
1218 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */
1219 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */
1220 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */
1221
1222 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */
1223 compatible = "ti,sysc";
1224 status = "disabled";
1225 #address-cells = <1>;
1226 #size-cells = <1>;
1227 ranges = <0x0 0x8c000 0x1000>;
1228 };
1229
1230 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */
1231 compatible = "ti,sysc";
1232 status = "disabled";
1233 #address-cells = <1>;
1234 #size-cells = <1>;
1235 ranges = <0x0 0x8e000 0x1000>;
1236 };
1237
1238 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */
1239 compatible = "ti,sysc-omap2", "ti,sysc";
1240 reg = <0x9c000 0x8>,
1241 <0x9c010 0x8>,
1242 <0x9c090 0x8>;
1243 reg-names = "rev", "sysc", "syss";
1244 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1245 SYSC_OMAP2_ENAWAKEUP |
1246 SYSC_OMAP2_SOFTRESET |
1247 SYSC_OMAP2_AUTOIDLE)>;
1248 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1249 <SYSC_IDLE_NO>,
1250 <SYSC_IDLE_SMART>,
1251 <SYSC_IDLE_SMART_WKUP>;
1252 ti,syss-mask = <1>;
1253 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1254 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>;
1255 clock-names = "fck";
1256 #address-cells = <1>;
1257 #size-cells = <1>;
1258 ranges = <0x0 0x9c000 0x1000>;
1259
1260 i2c2: i2c@0 {
1261 compatible = "ti,am4372-i2c","ti,omap4-i2c";
1262 reg = <0x0 0x1000>;
1263 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1264 #address-cells = <1>;
1265 #size-cells = <0>;
1266 status = "disabled";
1267 };
1268 };
1269
1270 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */
1271 compatible = "ti,sysc-omap2", "ti,sysc";
1272 reg = <0xa0000 0x4>,
1273 <0xa0110 0x4>,
1274 <0xa0114 0x4>;
1275 reg-names = "rev", "sysc", "syss";
1276 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1277 SYSC_OMAP2_SOFTRESET |
1278 SYSC_OMAP2_AUTOIDLE)>;
1279 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1280 <SYSC_IDLE_NO>,
1281 <SYSC_IDLE_SMART>;
1282 ti,syss-mask = <1>;
1283 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1284 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>;
1285 clock-names = "fck";
1286 #address-cells = <1>;
1287 #size-cells = <1>;
1288 ranges = <0x0 0xa0000 0x1000>;
1289
1290 spi1: spi@0 {
1291 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1292 reg = <0x0 0x400>;
1293 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1294 #address-cells = <1>;
1295 #size-cells = <0>;
1296 status = "disabled";
1297 };
1298 };
1299
1300 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */
1301 compatible = "ti,sysc-omap2", "ti,sysc";
1302 reg = <0xa2000 0x4>,
1303 <0xa2110 0x4>,
1304 <0xa2114 0x4>;
1305 reg-names = "rev", "sysc", "syss";
1306 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1307 SYSC_OMAP2_SOFTRESET |
1308 SYSC_OMAP2_AUTOIDLE)>;
1309 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1310 <SYSC_IDLE_NO>,
1311 <SYSC_IDLE_SMART>;
1312 ti,syss-mask = <1>;
1313 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1314 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>;
1315 clock-names = "fck";
1316 #address-cells = <1>;
1317 #size-cells = <1>;
1318 ranges = <0x0 0xa2000 0x1000>;
1319
1320 spi2: spi@0 {
1321 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1322 reg = <0x0 0x400>;
1323 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1324 #address-cells = <1>;
1325 #size-cells = <0>;
1326 status = "disabled";
1327 };
1328 };
1329
1330 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */
1331 compatible = "ti,sysc-omap2", "ti,sysc";
1332 reg = <0xa4000 0x4>,
1333 <0xa4110 0x4>,
1334 <0xa4114 0x4>;
1335 reg-names = "rev", "sysc", "syss";
1336 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1337 SYSC_OMAP2_SOFTRESET |
1338 SYSC_OMAP2_AUTOIDLE)>;
1339 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1340 <SYSC_IDLE_NO>,
1341 <SYSC_IDLE_SMART>;
1342 ti,syss-mask = <1>;
1343 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1344 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>;
1345 clock-names = "fck";
1346 #address-cells = <1>;
1347 #size-cells = <1>;
1348 ranges = <0x0 0xa4000 0x1000>;
1349
1350 spi3: spi@0 {
1351 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1352 reg = <0x0 0x400>;
1353 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1354 #address-cells = <1>;
1355 #size-cells = <0>;
1356 status = "disabled";
1357 };
1358 };
1359
1360 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */
1361 compatible = "ti,sysc-omap2", "ti,sysc";
1362 reg = <0xa6050 0x4>,
1363 <0xa6054 0x4>,
1364 <0xa6058 0x4>;
1365 reg-names = "rev", "sysc", "syss";
1366 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1367 SYSC_OMAP2_SOFTRESET |
1368 SYSC_OMAP2_AUTOIDLE)>;
1369 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1370 <SYSC_IDLE_NO>,
1371 <SYSC_IDLE_SMART>,
1372 <SYSC_IDLE_SMART_WKUP>;
1373 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1374 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>;
1375 clock-names = "fck";
1376 #address-cells = <1>;
1377 #size-cells = <1>;
1378 ranges = <0x0 0xa6000 0x1000>;
1379
1380 uart3: serial@0 {
1381 compatible = "ti,am4372-uart","ti,omap2-uart";
1382 reg = <0x0 0x2000>;
1383 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1384 status = "disabled";
1385 };
1386 };
1387
1388 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */
1389 compatible = "ti,sysc-omap2", "ti,sysc";
1390 reg = <0xa8050 0x4>,
1391 <0xa8054 0x4>,
1392 <0xa8058 0x4>;
1393 reg-names = "rev", "sysc", "syss";
1394 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1395 SYSC_OMAP2_SOFTRESET |
1396 SYSC_OMAP2_AUTOIDLE)>;
1397 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1398 <SYSC_IDLE_NO>,
1399 <SYSC_IDLE_SMART>,
1400 <SYSC_IDLE_SMART_WKUP>;
1401 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1402 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>;
1403 clock-names = "fck";
1404 #address-cells = <1>;
1405 #size-cells = <1>;
1406 ranges = <0x0 0xa8000 0x1000>;
1407
1408 uart4: serial@0 {
1409 compatible = "ti,am4372-uart","ti,omap2-uart";
1410 reg = <0x0 0x2000>;
1411 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1412 status = "disabled";
1413 };
1414 };
1415
1416 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */
1417 compatible = "ti,sysc-omap2", "ti,sysc";
1418 reg = <0xaa050 0x4>,
1419 <0xaa054 0x4>,
1420 <0xaa058 0x4>;
1421 reg-names = "rev", "sysc", "syss";
1422 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1423 SYSC_OMAP2_SOFTRESET |
1424 SYSC_OMAP2_AUTOIDLE)>;
1425 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1426 <SYSC_IDLE_NO>,
1427 <SYSC_IDLE_SMART>,
1428 <SYSC_IDLE_SMART_WKUP>;
1429 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1430 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>;
1431 clock-names = "fck";
1432 #address-cells = <1>;
1433 #size-cells = <1>;
1434 ranges = <0x0 0xaa000 0x1000>;
1435
1436 uart5: serial@0 {
1437 compatible = "ti,am4372-uart","ti,omap2-uart";
1438 reg = <0x0 0x2000>;
1439 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1440 status = "disabled";
1441 };
1442 };
1443
1444 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */
1445 compatible = "ti,sysc-omap2", "ti,sysc";
1446 reg = <0xac000 0x4>,
1447 <0xac010 0x4>,
1448 <0xac114 0x4>;
1449 reg-names = "rev", "sysc", "syss";
1450 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1451 SYSC_OMAP2_SOFTRESET |
1452 SYSC_OMAP2_AUTOIDLE)>;
1453 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1454 <SYSC_IDLE_NO>,
1455 <SYSC_IDLE_SMART>,
1456 <SYSC_IDLE_SMART_WKUP>;
1457 ti,syss-mask = <1>;
1458 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1459 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>,
1460 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>;
1461 clock-names = "fck", "dbclk";
1462 #address-cells = <1>;
1463 #size-cells = <1>;
1464 ranges = <0x0 0xac000 0x1000>;
1465
1466 gpio2: gpio@0 {
1467 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1468 reg = <0x0 0x1000>;
1469 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1470 gpio-controller;
1471 #gpio-cells = <2>;
1472 interrupt-controller;
1473 #interrupt-cells = <2>;
1474 status = "disabled";
1475 };
1476 };
1477
1478 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */
1479 compatible = "ti,sysc-omap2", "ti,sysc";
1480 reg = <0xae000 0x4>,
1481 <0xae010 0x4>,
1482 <0xae114 0x4>;
1483 reg-names = "rev", "sysc", "syss";
1484 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1485 SYSC_OMAP2_SOFTRESET |
1486 SYSC_OMAP2_AUTOIDLE)>;
1487 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1488 <SYSC_IDLE_NO>,
1489 <SYSC_IDLE_SMART>,
1490 <SYSC_IDLE_SMART_WKUP>;
1491 ti,syss-mask = <1>;
1492 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1493 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>,
1494 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>;
1495 clock-names = "fck", "dbclk";
1496 #address-cells = <1>;
1497 #size-cells = <1>;
1498 ranges = <0x0 0xae000 0x1000>;
1499
1500 gpio3: gpio@0 {
1501 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1502 reg = <0x0 0x1000>;
1503 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1504 gpio-controller;
1505 #gpio-cells = <2>;
1506 interrupt-controller;
1507 #interrupt-cells = <2>;
1508 status = "disabled";
1509 };
1510 };
1511
1512 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */
1513 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1514 reg = <0xc1000 0x4>,
1515 <0xc1010 0x4>,
1516 <0xc1014 0x4>;
1517 reg-names = "rev", "sysc", "syss";
1518 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1519 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1520 <SYSC_IDLE_NO>,
1521 <SYSC_IDLE_SMART>,
1522 <SYSC_IDLE_SMART_WKUP>;
1523 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1524 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>;
1525 clock-names = "fck";
1526 #address-cells = <1>;
1527 #size-cells = <1>;
1528 ranges = <0x0 0xc1000 0x1000>;
1529
1530 timer8: timer@0 {
1531 compatible = "ti,am4372-timer","ti,am335x-timer";
1532 reg = <0x0 0x400>;
1533 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
1534 status = "disabled";
1535 };
1536 };
1537
1538 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
1539 compatible = "ti,sysc-omap4", "ti,sysc";
1540 reg = <0xcc020 0x4>;
1541 reg-names = "rev";
1542 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1543 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>,
1544 <&dcan0_fck>;
1545 clock-names = "fck", "osc";
1546 #address-cells = <1>;
1547 #size-cells = <1>;
1548 ranges = <0x0 0xcc000 0x2000>;
1549
1550 dcan0: can@0 {
1551 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1552 reg = <0x0 0x2000>;
1553 clocks = <&dcan0_fck>;
1554 clock-names = "fck";
1555 syscon-raminit = <&scm_conf 0x644 0>;
1556 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1557 status = "disabled";
1558 };
1559 };
1560
1561 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
1562 compatible = "ti,sysc-omap4", "ti,sysc";
1563 reg = <0xd0020 0x4>;
1564 reg-names = "rev";
1565 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1566 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>,
1567 <&dcan1_fck>;
1568 clock-names = "fck", "osc";
1569 #address-cells = <1>;
1570 #size-cells = <1>;
1571 ranges = <0x0 0xd0000 0x2000>;
1572
1573 dcan1: can@0 {
1574 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1575 reg = <0x0 0x2000>;
1576 clocks = <&dcan1_fck>;
1577 clock-name = "fck";
1578 syscon-raminit = <&scm_conf 0x644 1>;
1579 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1580 status = "disabled";
1581 };
1582 };
1583
1584 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */
1585 compatible = "ti,sysc-omap2", "ti,sysc";
1586 reg = <0xd82fc 0x4>,
1587 <0xd8110 0x4>,
1588 <0xd8114 0x4>;
1589 reg-names = "rev", "sysc", "syss";
1590 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1591 SYSC_OMAP2_ENAWAKEUP |
1592 SYSC_OMAP2_SOFTRESET |
1593 SYSC_OMAP2_AUTOIDLE)>;
1594 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1595 <SYSC_IDLE_NO>,
1596 <SYSC_IDLE_SMART>;
1597 ti,syss-mask = <1>;
1598 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1599 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>;
1600 clock-names = "fck";
1601 #address-cells = <1>;
1602 #size-cells = <1>;
1603 ranges = <0x0 0xd8000 0x1000>;
1604
1605 mmc2: mmc@0 {
1606 compatible = "ti,am437-sdhci";
1607 reg = <0x0 0x1000>;
1608 ti,needs-special-reset;
1609 dmas = <&edma 2 0>,
1610 <&edma 3 0>;
1611 dma-names = "tx", "rx";
1612 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1613 status = "disabled";
1614 };
1615 };
1616 };
1617
1618 segment@200000 { /* 0x48200000 */
1619 compatible = "simple-bus";
1620 #address-cells = <1>;
1621 #size-cells = <1>;
1622 };
1623
1624 segment@300000 { /* 0x48300000 */
1625 compatible = "simple-bus";
1626 #address-cells = <1>;
1627 #size-cells = <1>;
1628 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */
1629 <0x00001000 0x00301000 0x001000>, /* ap 57 */
1630 <0x00002000 0x00302000 0x001000>, /* ap 58 */
1631 <0x00003000 0x00303000 0x001000>, /* ap 59 */
1632 <0x00004000 0x00304000 0x001000>, /* ap 60 */
1633 <0x00005000 0x00305000 0x001000>, /* ap 61 */
1634 <0x00018000 0x00318000 0x004000>, /* ap 62 */
1635 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */
1636 <0x00010000 0x00310000 0x002000>, /* ap 64 */
1637 <0x00028000 0x00328000 0x001000>, /* ap 75 */
1638 <0x00029000 0x00329000 0x001000>, /* ap 76 */
1639 <0x00012000 0x00312000 0x001000>, /* ap 79 */
1640 <0x00020000 0x00320000 0x001000>, /* ap 82 */
1641 <0x00021000 0x00321000 0x001000>, /* ap 83 */
1642 <0x00026000 0x00326000 0x001000>, /* ap 86 */
1643 <0x00027000 0x00327000 0x001000>, /* ap 87 */
1644 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */
1645 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */
1646 <0x00013000 0x00313000 0x001000>, /* ap 90 */
1647 <0x00014000 0x00314000 0x001000>, /* ap 91 */
1648 <0x00006000 0x00306000 0x001000>, /* ap 96 */
1649 <0x00007000 0x00307000 0x001000>, /* ap 97 */
1650 <0x00008000 0x00308000 0x001000>, /* ap 98 */
1651 <0x00009000 0x00309000 0x001000>, /* ap 99 */
1652 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */
1653 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */
1654 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */
1655 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */
1656 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */
1657 <0x00040000 0x00340000 0x001000>, /* ap 105 */
1658 <0x00041000 0x00341000 0x001000>, /* ap 106 */
1659 <0x00042000 0x00342000 0x001000>, /* ap 107 */
1660 <0x00045000 0x00345000 0x001000>, /* ap 108 */
1661 <0x00046000 0x00346000 0x001000>, /* ap 109 */
1662 <0x00047000 0x00347000 0x001000>, /* ap 110 */
1663 <0x00048000 0x00348000 0x001000>, /* ap 111 */
1664 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */
1665 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */
1666 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */
1667 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */
1668 <0x00022000 0x00322000 0x001000>, /* ap 116 */
1669 <0x00023000 0x00323000 0x001000>, /* ap 117 */
1670 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */
1671 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */
1672 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */
1673 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */
1674 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */
1675 <0x00080000 0x00380000 0x020000>, /* ap 123 */
1676 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */
1677 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */
1678 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */
1679 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */
1680 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */
1681 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */
1682
1683 target-module@0 { /* 0x48300000, ap 56 40.0 */
1684 compatible = "ti,sysc-omap4", "ti,sysc";
1685 reg = <0x0 0x4>,
1686 <0x4 0x4>;
1687 reg-names = "rev", "sysc";
1688 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1689 <SYSC_IDLE_NO>,
1690 <SYSC_IDLE_SMART>,
1691 <SYSC_IDLE_SMART_WKUP>;
1692 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1693 <SYSC_IDLE_NO>,
1694 <SYSC_IDLE_SMART>,
1695 <SYSC_IDLE_SMART_WKUP>;
1696 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1697 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>;
1698 clock-names = "fck";
1699 #address-cells = <1>;
1700 #size-cells = <1>;
1701 ranges = <0x0 0x0 0x1000>;
1702
1703 epwmss0: epwmss@0 {
1704 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1705 reg = <0x0 0x10>;
1706 #address-cells = <1>;
1707 #size-cells = <1>;
1708 ranges = <0 0 0x1000>;
1709 status = "disabled";
1710
1711 ecap0: ecap@100 {
1712 compatible = "ti,am4372-ecap",
1713 "ti,am3352-ecap",
1714 "ti,am33xx-ecap";
1715 #pwm-cells = <3>;
1716 reg = <0x100 0x80>;
1717 clocks = <&l4ls_gclk>;
1718 clock-names = "fck";
1719 status = "disabled";
1720 };
1721
1722 ehrpwm0: pwm@200 {
1723 compatible = "ti,am4372-ehrpwm",
1724 "ti,am3352-ehrpwm",
1725 "ti,am33xx-ehrpwm";
1726 #pwm-cells = <3>;
1727 reg = <0x200 0x80>;
1728 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1729 clock-names = "tbclk", "fck";
1730 status = "disabled";
1731 };
1732 };
1733 };
1734
1735 target-module@2000 { /* 0x48302000, ap 58 4a.0 */
1736 compatible = "ti,sysc-omap4", "ti,sysc";
1737 reg = <0x2000 0x4>,
1738 <0x2004 0x4>;
1739 reg-names = "rev", "sysc";
1740 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1741 <SYSC_IDLE_NO>,
1742 <SYSC_IDLE_SMART>,
1743 <SYSC_IDLE_SMART_WKUP>;
1744 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1745 <SYSC_IDLE_NO>,
1746 <SYSC_IDLE_SMART>,
1747 <SYSC_IDLE_SMART_WKUP>;
1748 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1749 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>;
1750 clock-names = "fck";
1751 #address-cells = <1>;
1752 #size-cells = <1>;
1753 ranges = <0x0 0x2000 0x1000>;
1754
1755 epwmss1: epwmss@0 {
1756 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1757 reg = <0x0 0x10>;
1758 #address-cells = <1>;
1759 #size-cells = <1>;
1760 ranges = <0 0 0x1000>;
1761 status = "disabled";
1762
1763 ecap1: ecap@100 {
1764 compatible = "ti,am4372-ecap",
1765 "ti,am3352-ecap",
1766 "ti,am33xx-ecap";
1767 #pwm-cells = <3>;
1768 reg = <0x100 0x80>;
1769 clocks = <&l4ls_gclk>;
1770 clock-names = "fck";
1771 status = "disabled";
1772 };
1773
1774 ehrpwm1: pwm@200 {
1775 compatible = "ti,am4372-ehrpwm",
1776 "ti,am3352-ehrpwm",
1777 "ti,am33xx-ehrpwm";
1778 #pwm-cells = <3>;
1779 reg = <0x200 0x80>;
1780 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1781 clock-names = "tbclk", "fck";
1782 status = "disabled";
1783 };
1784 };
1785 };
1786
1787 target-module@4000 { /* 0x48304000, ap 60 44.0 */
1788 compatible = "ti,sysc-omap4", "ti,sysc";
1789 reg = <0x4000 0x4>,
1790 <0x4004 0x4>;
1791 reg-names = "rev", "sysc";
1792 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1793 <SYSC_IDLE_NO>,
1794 <SYSC_IDLE_SMART>,
1795 <SYSC_IDLE_SMART_WKUP>;
1796 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1797 <SYSC_IDLE_NO>,
1798 <SYSC_IDLE_SMART>,
1799 <SYSC_IDLE_SMART_WKUP>;
1800 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1801 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>;
1802 clock-names = "fck";
1803 #address-cells = <1>;
1804 #size-cells = <1>;
1805 ranges = <0x0 0x4000 0x1000>;
1806
1807 epwmss2: epwmss@0 {
1808 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1809 reg = <0x0 0x10>;
1810 #address-cells = <1>;
1811 #size-cells = <1>;
1812 ranges = <0 0 0x1000>;
1813 status = "disabled";
1814
1815 ecap2: ecap@100 {
1816 compatible = "ti,am4372-ecap",
1817 "ti,am3352-ecap",
1818 "ti,am33xx-ecap";
1819 #pwm-cells = <3>;
1820 reg = <0x100 0x80>;
1821 clocks = <&l4ls_gclk>;
1822 clock-names = "fck";
1823 status = "disabled";
1824 };
1825
1826 ehrpwm2: pwm@200 {
1827 compatible = "ti,am4372-ehrpwm",
1828 "ti,am3352-ehrpwm",
1829 "ti,am33xx-ehrpwm";
1830 #pwm-cells = <3>;
1831 reg = <0x200 0x80>;
1832 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
1833 clock-names = "tbclk", "fck";
1834 status = "disabled";
1835 };
1836 };
1837 };
1838
1839 target-module@6000 { /* 0x48306000, ap 96 58.0 */
1840 compatible = "ti,sysc-omap4", "ti,sysc";
1841 reg = <0x6000 0x4>,
1842 <0x6004 0x4>;
1843 reg-names = "rev", "sysc";
1844 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1845 <SYSC_IDLE_NO>,
1846 <SYSC_IDLE_SMART>,
1847 <SYSC_IDLE_SMART_WKUP>;
1848 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1849 <SYSC_IDLE_NO>,
1850 <SYSC_IDLE_SMART>,
1851 <SYSC_IDLE_SMART_WKUP>;
1852 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1853 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>;
1854 clock-names = "fck";
1855 #address-cells = <1>;
1856 #size-cells = <1>;
1857 ranges = <0x0 0x6000 0x1000>;
1858
1859 epwmss3: epwmss@0 {
1860 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1861 reg = <0x0 0x10>;
1862 #address-cells = <1>;
1863 #size-cells = <1>;
1864 ranges = <0 0 0x1000>;
1865 status = "disabled";
1866
1867 ehrpwm3: pwm@200 {
1868 compatible = "ti,am4372-ehrpwm",
1869 "ti,am3352-ehrpwm",
1870 "ti,am33xx-ehrpwm";
1871 #pwm-cells = <3>;
1872 reg = <0x200 0x80>;
1873 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
1874 clock-names = "tbclk", "fck";
1875 status = "disabled";
1876 };
1877 };
1878 };
1879
1880 target-module@8000 { /* 0x48308000, ap 98 54.0 */
1881 compatible = "ti,sysc-omap4", "ti,sysc";
1882 reg = <0x8000 0x4>,
1883 <0x8004 0x4>;
1884 reg-names = "rev", "sysc";
1885 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1886 <SYSC_IDLE_NO>,
1887 <SYSC_IDLE_SMART>,
1888 <SYSC_IDLE_SMART_WKUP>;
1889 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1890 <SYSC_IDLE_NO>,
1891 <SYSC_IDLE_SMART>,
1892 <SYSC_IDLE_SMART_WKUP>;
1893 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1894 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>;
1895 clock-names = "fck";
1896 #address-cells = <1>;
1897 #size-cells = <1>;
1898 ranges = <0x0 0x8000 0x1000>;
1899
1900 epwmss4: epwmss@0 {
1901 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1902 reg = <0x0 0x10>;
1903 #address-cells = <1>;
1904 #size-cells = <1>;
1905 ranges = <0 0 0x1000>;
1906 status = "disabled";
1907
1908 ehrpwm4: pwm@48308200 {
1909 compatible = "ti,am4372-ehrpwm",
1910 "ti,am3352-ehrpwm",
1911 "ti,am33xx-ehrpwm";
1912 #pwm-cells = <3>;
1913 reg = <0x200 0x80>;
1914 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
1915 clock-names = "tbclk", "fck";
1916 status = "disabled";
1917 };
1918 };
1919 };
1920
1921 target-module@a000 { /* 0x4830a000, ap 100 60.0 */
1922 compatible = "ti,sysc-omap4", "ti,sysc";
1923 reg = <0xa000 0x4>,
1924 <0xa004 0x4>;
1925 reg-names = "rev", "sysc";
1926 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1927 <SYSC_IDLE_NO>,
1928 <SYSC_IDLE_SMART>,
1929 <SYSC_IDLE_SMART_WKUP>;
1930 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1931 <SYSC_IDLE_NO>,
1932 <SYSC_IDLE_SMART>,
1933 <SYSC_IDLE_SMART_WKUP>;
1934 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1935 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>;
1936 clock-names = "fck";
1937 #address-cells = <1>;
1938 #size-cells = <1>;
1939 ranges = <0x0 0xa000 0x1000>;
1940
1941 epwmss5: epwmss@0 {
1942 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1943 reg = <0x0 0x10>;
1944 #address-cells = <1>;
1945 #size-cells = <1>;
1946 ranges = <0 0 0x1000>;
1947 status = "disabled";
1948
1949 ehrpwm5: pwm@200 {
1950 compatible = "ti,am4372-ehrpwm",
1951 "ti,am3352-ehrpwm",
1952 "ti,am33xx-ehrpwm";
1953 #pwm-cells = <3>;
1954 reg = <0x200 0x80>;
1955 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
1956 clock-names = "tbclk", "fck";
1957 status = "disabled";
1958 };
1959 };
1960 };
1961
1962 target-module@10000 { /* 0x48310000, ap 64 4e.1 */
1963 compatible = "ti,sysc-omap2", "ti,sysc";
1964 reg = <0x11fe0 0x4>,
1965 <0x11fe4 0x4>;
1966 reg-names = "rev", "sysc";
1967 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
1968 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1969 <SYSC_IDLE_NO>;
1970 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1971 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>;
1972 clock-names = "fck";
1973 #address-cells = <1>;
1974 #size-cells = <1>;
1975 ranges = <0x0 0x10000 0x2000>;
1976
1977 rng: rng@0 {
1978 compatible = "ti,omap4-rng";
1979 reg = <0x0 0x2000>;
1980 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
1981 };
1982 };
1983
1984 target-module@13000 { /* 0x48313000, ap 90 50.0 */
1985 compatible = "ti,sysc";
1986 status = "disabled";
1987 #address-cells = <1>;
1988 #size-cells = <1>;
1989 ranges = <0x0 0x13000 0x1000>;
1990 };
1991
1992 target-module@18000 { /* 0x48318000, ap 62 4c.0 */
1993 compatible = "ti,sysc";
1994 status = "disabled";
1995 #address-cells = <1>;
1996 #size-cells = <1>;
1997 ranges = <0x0 0x18000 0x4000>;
1998 };
1999
2000 target-module@20000 { /* 0x48320000, ap 82 34.0 */
2001 compatible = "ti,sysc-omap2", "ti,sysc";
2002 reg = <0x20000 0x4>,
2003 <0x20010 0x4>,
2004 <0x20114 0x4>;
2005 reg-names = "rev", "sysc", "syss";
2006 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2007 SYSC_OMAP2_SOFTRESET |
2008 SYSC_OMAP2_AUTOIDLE)>;
2009 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2010 <SYSC_IDLE_NO>,
2011 <SYSC_IDLE_SMART>,
2012 <SYSC_IDLE_SMART_WKUP>;
2013 ti,syss-mask = <1>;
2014 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2015 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>,
2016 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>;
2017 clock-names = "fck", "dbclk";
2018 #address-cells = <1>;
2019 #size-cells = <1>;
2020 ranges = <0x0 0x20000 0x1000>;
2021
2022 gpio4: gpio@0 {
2023 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2024 reg = <0x0 0x1000>;
2025 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
2026 gpio-controller;
2027 #gpio-cells = <2>;
2028 interrupt-controller;
2029 #interrupt-cells = <2>;
2030 status = "disabled";
2031 };
2032 };
2033
2034 target-module@22000 { /* 0x48322000, ap 116 64.0 */
2035 compatible = "ti,sysc-omap2", "ti,sysc";
2036 reg = <0x22000 0x4>,
2037 <0x22010 0x4>,
2038 <0x22114 0x4>;
2039 reg-names = "rev", "sysc", "syss";
2040 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2041 SYSC_OMAP2_SOFTRESET |
2042 SYSC_OMAP2_AUTOIDLE)>;
2043 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2044 <SYSC_IDLE_NO>,
2045 <SYSC_IDLE_SMART>,
2046 <SYSC_IDLE_SMART_WKUP>;
2047 ti,syss-mask = <1>;
2048 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2049 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>,
2050 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>;
2051 clock-names = "fck", "dbclk";
2052 #address-cells = <1>;
2053 #size-cells = <1>;
2054 ranges = <0x0 0x22000 0x1000>;
2055
2056 gpio5: gpio@0 {
2057 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2058 reg = <0x0 0x1000>;
2059 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2060 gpio-controller;
2061 #gpio-cells = <2>;
2062 interrupt-controller;
2063 #interrupt-cells = <2>;
2064 status = "disabled";
2065 };
2066 };
2067
2068 target-module@26000 { /* 0x48326000, ap 86 66.0 */
2069 compatible = "ti,sysc-omap4", "ti,sysc";
2070 reg = <0x26000 0x4>,
2071 <0x26104 0x4>;
2072 reg-names = "rev", "sysc";
2073 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2074 <SYSC_IDLE_NO>,
2075 <SYSC_IDLE_SMART>;
2076 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2077 <SYSC_IDLE_NO>,
2078 <SYSC_IDLE_SMART>;
2079 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2080 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>;
2081 clock-names = "fck";
2082 #address-cells = <1>;
2083 #size-cells = <1>;
2084 ranges = <0x0 0x26000 0x1000>;
2085
2086 vpfe0: vpfe@0 {
2087 compatible = "ti,am437x-vpfe";
2088 reg = <0x0 0x2000>;
2089 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2090 status = "disabled";
2091 };
2092 };
2093
2094 target-module@28000 { /* 0x48328000, ap 75 0e.0 */
2095 compatible = "ti,sysc-omap4", "ti,sysc";
2096 reg = <0x28000 0x4>,
2097 <0x28104 0x4>;
2098 reg-names = "rev", "sysc";
2099 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2100 <SYSC_IDLE_NO>,
2101 <SYSC_IDLE_SMART>;
2102 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2103 <SYSC_IDLE_NO>,
2104 <SYSC_IDLE_SMART>;
2105 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2106 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>;
2107 clock-names = "fck";
2108 #address-cells = <1>;
2109 #size-cells = <1>;
2110 ranges = <0x0 0x28000 0x1000>;
2111
2112 vpfe1: vpfe@0 {
2113 compatible = "ti,am437x-vpfe";
2114 reg = <0x0 0x2000>;
2115 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
2116 status = "disabled";
2117 };
2118 };
2119
2120 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */
2121 compatible = "ti,sysc-omap2", "ti,sysc";
2122 reg = <0x2a000 0x4>,
2123 <0x2a010 0x4>,
2124 <0x2a014 0x4>;
2125 reg-names = "rev", "sysc", "syss";
2126 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2127 SYSC_OMAP2_AUTOIDLE)>;
2128 ti,syss-mask = <1>;
2129 /* Domains (P, C): per_pwrdm, dss_clkdm */
2130 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2131 clock-names = "fck";
2132 #address-cells = <1>;
2133 #size-cells = <1>;
2134 ranges = <0x00000000 0x0002a000 0x00000400>,
2135 <0x00000400 0x0002a400 0x00000400>,
2136 <0x00000800 0x0002a800 0x00000400>,
2137 <0x00000c00 0x0002ac00 0x00000400>,
2138 <0x00001000 0x0002b000 0x00001000>;
2139
2140 dss: dss@0 {
2141 compatible = "ti,omap3-dss";
2142 reg = <0 0x200>;
2143 status = "disabled";
2144 clocks = <&disp_clk>;
2145 clock-names = "fck";
2146 #address-cells = <1>;
2147 #size-cells = <1>;
2148 ranges = <0x00000000 0x00000000 0x00000400>,
2149 <0x00000400 0x00000400 0x00000400>,
2150 <0x00000800 0x00000800 0x00000400>,
2151 <0x00000c00 0x00000c00 0x00000400>,
2152 <0x00001000 0x00001000 0x00001000>;
2153
2154 target-module@400 {
2155 compatible = "ti,sysc-omap2", "ti,sysc";
2156 reg = <0x400 0x4>,
2157 <0x410 0x4>,
2158 <0x414 0x4>;
2159 reg-names = "rev", "sysc", "syss";
2160 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2161 <SYSC_IDLE_NO>,
2162 <SYSC_IDLE_SMART>;
2163 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2164 <SYSC_IDLE_NO>,
2165 <SYSC_IDLE_SMART>;
2166 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2167 SYSC_OMAP2_ENAWAKEUP |
2168 SYSC_OMAP2_SOFTRESET |
2169 SYSC_OMAP2_AUTOIDLE)>;
2170 ti,syss-mask = <1>;
2171 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2172 clock-names = "fck";
2173 #address-cells = <1>;
2174 #size-cells = <1>;
2175 ranges = <0 0x400 0x400>;
2176
2177 dispc: dispc@0 {
2178 compatible = "ti,omap3-dispc";
2179 reg = <0 0x400>;
2180 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
2181 clocks = <&disp_clk>;
2182 clock-names = "fck";
2183
2184 max-memory-bandwidth = <230000000>;
2185 };
2186 };
2187
2188 target-module@800 {
2189 compatible = "ti,sysc-omap2", "ti,sysc";
2190 reg = <0x800 0x4>,
2191 <0x810 0x4>,
2192 <0x814 0x4>;
2193 reg-names = "rev", "sysc", "syss";
2194 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2195 <SYSC_IDLE_NO>,
2196 <SYSC_IDLE_SMART>;
2197 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2198 SYSC_OMAP2_AUTOIDLE)>;
2199 ti,syss-mask = <1>;
2200 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2201 clock-names = "fck";
2202 #address-cells = <1>;
2203 #size-cells = <1>;
2204 ranges = <0 0x800 0x400>;
2205
2206 rfbi: rfbi@0 {
2207 compatible = "ti,omap3-rfbi";
2208 reg = <0 0x100>;
2209 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2210 clock-names = "fck";
2211 status = "disabled";
2212 };
2213 };
2214 };
2215 };
2216
2217 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */
2218 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2219 reg = <0x3d000 0x4>,
2220 <0x3d010 0x4>,
2221 <0x3d014 0x4>;
2222 reg-names = "rev", "sysc", "syss";
2223 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2224 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2225 <SYSC_IDLE_NO>,
2226 <SYSC_IDLE_SMART>,
2227 <SYSC_IDLE_SMART_WKUP>;
2228 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2229 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>;
2230 clock-names = "fck";
2231 #address-cells = <1>;
2232 #size-cells = <1>;
2233 ranges = <0x0 0x3d000 0x1000>;
2234
2235 timer9: timer@0 {
2236 compatible = "ti,am4372-timer","ti,am335x-timer";
2237 reg = <0x0 0x400>;
2238 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
2239 status = "disabled";
2240 };
2241 };
2242
2243 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */
2244 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2245 reg = <0x3f000 0x4>,
2246 <0x3f010 0x4>,
2247 <0x3f014 0x4>;
2248 reg-names = "rev", "sysc", "syss";
2249 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2250 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2251 <SYSC_IDLE_NO>,
2252 <SYSC_IDLE_SMART>,
2253 <SYSC_IDLE_SMART_WKUP>;
2254 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2255 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>;
2256 clock-names = "fck";
2257 #address-cells = <1>;
2258 #size-cells = <1>;
2259 ranges = <0x0 0x3f000 0x1000>;
2260
2261 timer10: timer@0 {
2262 compatible = "ti,am4372-timer","ti,am335x-timer";
2263 reg = <0x0 0x400>;
2264 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
2265 status = "disabled";
2266 };
2267 };
2268
2269 target-module@41000 { /* 0x48341000, ap 106 76.0 */
2270 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2271 reg = <0x41000 0x4>,
2272 <0x41010 0x4>,
2273 <0x41014 0x4>;
2274 reg-names = "rev", "sysc", "syss";
2275 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2276 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2277 <SYSC_IDLE_NO>,
2278 <SYSC_IDLE_SMART>,
2279 <SYSC_IDLE_SMART_WKUP>;
2280 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2281 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>;
2282 clock-names = "fck";
2283 #address-cells = <1>;
2284 #size-cells = <1>;
2285 ranges = <0x0 0x41000 0x1000>;
2286
2287 timer11: timer@0 {
2288 compatible = "ti,am4372-timer","ti,am335x-timer";
2289 reg = <0x0 0x400>;
2290 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
2291 status = "disabled";
2292 };
2293 };
2294
2295 target-module@45000 { /* 0x48345000, ap 108 6a.0 */
2296 compatible = "ti,sysc-omap2", "ti,sysc";
2297 reg = <0x45000 0x4>,
2298 <0x45110 0x4>,
2299 <0x45114 0x4>;
2300 reg-names = "rev", "sysc", "syss";
2301 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2302 SYSC_OMAP2_SOFTRESET |
2303 SYSC_OMAP2_AUTOIDLE)>;
2304 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2305 <SYSC_IDLE_NO>,
2306 <SYSC_IDLE_SMART>;
2307 ti,syss-mask = <1>;
2308 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2309 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>;
2310 clock-names = "fck";
2311 #address-cells = <1>;
2312 #size-cells = <1>;
2313 ranges = <0x0 0x45000 0x1000>;
2314
2315 spi4: spi@0 {
2316 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
2317 reg = <0x0 0x400>;
2318 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
2319 #address-cells = <1>;
2320 #size-cells = <0>;
2321 status = "disabled";
2322 };
2323 };
2324
2325 target-module@47000 { /* 0x48347000, ap 110 70.0 */
2326 compatible = "ti,sysc-omap2", "ti,sysc";
2327 reg = <0x47000 0x4>,
2328 <0x47014 0x4>,
2329 <0x47018 0x4>;
2330 reg-names = "rev", "sysc", "syss";
2331 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2332 SYSC_OMAP2_AUTOIDLE)>;
2333 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2334 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>;
2335 clock-names = "fck";
2336 #address-cells = <1>;
2337 #size-cells = <1>;
2338 ranges = <0x0 0x47000 0x1000>;
2339
2340 hdq: hdq@0 {
2341 compatible = "ti,am4372-hdq";
2342 reg = <0x0 0x1000>;
2343 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
2344 clocks = <&func_12m_clk>;
2345 clock-names = "fck";
2346 status = "disabled";
2347 };
2348 };
2349
2350 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */
2351 compatible = "ti,sysc";
2352 status = "disabled";
2353 #address-cells = <1>;
2354 #size-cells = <1>;
2355 ranges = <0x0 0x4c000 0x2000>;
2356 };
2357
2358 target-module@80000 { /* 0x48380000, ap 123 42.0 */
2359 compatible = "ti,sysc-omap4", "ti,sysc";
2360 reg = <0x80000 0x4>,
2361 <0x80010 0x4>;
2362 reg-names = "rev", "sysc";
2363 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2364 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2365 <SYSC_IDLE_NO>,
2366 <SYSC_IDLE_SMART>,
2367 <SYSC_IDLE_SMART_WKUP>;
2368 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2369 <SYSC_IDLE_NO>,
2370 <SYSC_IDLE_SMART>,
2371 <SYSC_IDLE_SMART_WKUP>;
2372 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2373 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>;
2374 clock-names = "fck";
2375 #address-cells = <1>;
2376 #size-cells = <1>;
2377 ranges = <0x0 0x80000 0x20000>;
2378
2379 dwc3_1: omap_dwc3@0 {
2380 compatible = "ti,am437x-dwc3";
2381 reg = <0x0 0x10000>;
2382 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2383 #address-cells = <1>;
2384 #size-cells = <1>;
2385 utmi-mode = <1>;
2386 ranges = <0 0 0x20000>;
2387
2388 usb1: usb@10000 {
2389 compatible = "synopsys,dwc3";
2390 reg = <0x10000 0x10000>;
2391 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2392 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2393 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2394 interrupt-names = "peripheral",
2395 "host",
2396 "otg";
2397 phys = <&usb2_phy1>;
2398 phy-names = "usb2-phy";
2399 maximum-speed = "high-speed";
2400 dr_mode = "otg";
2401 status = "disabled";
2402 snps,dis_u3_susphy_quirk;
2403 snps,dis_u2_susphy_quirk;
2404 };
2405 };
2406 };
2407
2408 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */
2409 compatible = "ti,sysc-omap4", "ti,sysc";
2410 reg = <0xa8000 0x4>;
2411 reg-names = "rev";
2412 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2413 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>;
2414 clock-names = "fck";
2415 #address-cells = <1>;
2416 #size-cells = <1>;
2417 ranges = <0x0 0xa8000 0x8000>;
2418
2419 ocp2scp0: ocp2scp@0 {
2420 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2421 #address-cells = <1>;
2422 #size-cells = <1>;
2423 ranges = <0 0 0x8000>;
2424
2425 usb2_phy1: phy@8000 {
2426 compatible = "ti,am437x-usb2";
2427 reg = <0x0 0x8000>;
2428 syscon-phy-power = <&scm_conf 0x620>;
2429 clocks = <&usb_phy0_always_on_clk32k>,
2430 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>;
2431 clock-names = "wkupclk", "refclk";
2432 #phy-cells = <0>;
2433 status = "disabled";
2434 };
2435 };
2436 };
2437
2438 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */
2439 compatible = "ti,sysc-omap4", "ti,sysc";
2440 reg = <0xc0000 0x4>,
2441 <0xc0010 0x4>;
2442 reg-names = "rev", "sysc";
2443 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2444 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2445 <SYSC_IDLE_NO>,
2446 <SYSC_IDLE_SMART>,
2447 <SYSC_IDLE_SMART_WKUP>;
2448 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2449 <SYSC_IDLE_NO>,
2450 <SYSC_IDLE_SMART>,
2451 <SYSC_IDLE_SMART_WKUP>;
2452 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2453 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>;
2454 clock-names = "fck";
2455 #address-cells = <1>;
2456 #size-cells = <1>;
2457 ranges = <0x0 0xc0000 0x20000>;
2458
2459 dwc3_2: omap_dwc3@0 {
2460 compatible = "ti,am437x-dwc3";
2461 reg = <0x0 0x10000>;
2462 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2463 #address-cells = <1>;
2464 #size-cells = <1>;
2465 utmi-mode = <1>;
2466 ranges = <0 0 0x20000>;
2467
2468 usb2: usb@10000 {
2469 compatible = "synopsys,dwc3";
2470 reg = <0x10000 0x10000>;
2471 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2472 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2473 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2474 interrupt-names = "peripheral",
2475 "host",
2476 "otg";
2477 phys = <&usb2_phy2>;
2478 phy-names = "usb2-phy";
2479 maximum-speed = "high-speed";
2480 dr_mode = "otg";
2481 status = "disabled";
2482 snps,dis_u3_susphy_quirk;
2483 snps,dis_u2_susphy_quirk;
2484 };
2485 };
2486 };
2487
2488 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */
2489 compatible = "ti,sysc-omap4", "ti,sysc";
2490 reg = <0xe8000 0x4>;
2491 reg-names = "rev";
2492 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2493 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>;
2494 clock-names = "fck";
2495 #address-cells = <1>;
2496 #size-cells = <1>;
2497 ranges = <0x0 0xe8000 0x8000>;
2498
2499 ocp2scp1: ocp2scp@0 {
2500 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2501 #address-cells = <1>;
2502 #size-cells = <1>;
2503 ranges = <0 0 0x8000>;
2504
2505 usb2_phy2: phy@8000 {
2506 compatible = "ti,am437x-usb2";
2507 reg = <0x0 0x8000>;
2508 syscon-phy-power = <&scm_conf 0x628>;
2509 clocks = <&usb_phy1_always_on_clk32k>,
2510 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>;
2511 clock-names = "wkupclk", "refclk";
2512 #phy-cells = <0>;
2513 status = "disabled";
2514 };
2515 };
2516 };
2517
2518 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */
2519 compatible = "ti,sysc";
2520 status = "disabled";
2521 #address-cells = <1>;
2522 #size-cells = <1>;
2523 ranges = <0x0 0xf2000 0x2000>;
2524 };
2525 };
2526};
2527