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1/*
2 * Device Tree Source for the MPC5121e based ac14xx board
3 *
4 * Copyright 2012 Anatolij Gustschin <agust@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12
13#include "mpc5121.dtsi"
14
15/ {
16 model = "ac14xx";
17 compatible = "ifm,ac14xx", "fsl,mpc5121";
18 #address-cells = <1>;
19 #size-cells = <1>;
20
21 aliases {
22 serial0 = &serial0;
23 serial1 = &serial7;
24 spi4 = &spi4;
25 spi5 = &spi5;
26 };
27
28 cpus {
29 PowerPC,5121@0 {
30 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
31 bus-frequency = <160000000>; /* 160 MHz csb bus */
32 clock-frequency = <400000000>; /* 400 MHz ppc core */
33 };
34 };
35
36 memory {
37 reg = <0x00000000 0x10000000>; /* 256MB at 0 */
38 };
39
40 nfc@40000000 {
41 status = "disabled";
42 };
43
44 localbus@80000020 {
45 ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
46 0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
47 0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
48 0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
49 0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
50 0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
51
52 flash@0,0 {
53 compatible = "cfi-flash";
54 reg = <0 0x00000000 0x04000000>;
55 #address-cells = <1>;
56 #size-cells = <1>;
57 bank-width = <2>;
58 device-width = <2>;
59
60 partition@0 {
61 label = "dtb-kernel-production";
62 reg = <0x00000000 0x00400000>;
63 };
64 partition@1 {
65 label = "filesystem-production";
66 reg = <0x00400000 0x03400000>;
67 };
68
69 partition@2 {
70 label = "recovery";
71 reg = <0x03800000 0x00700000>;
72 };
73
74 partition@3 {
75 label = "uboot-code";
76 reg = <0x03f00000 0x00040000>;
77 };
78 partition@4 {
79 label = "uboot-env1";
80 reg = <0x03f40000 0x00020000>;
81 };
82 partition@5 {
83 label = "uboot-env2";
84 reg = <0x03f60000 0x00020000>;
85 };
86 };
87
88 fram@1,0 {
89 compatible = "ifm,ac14xx-fram", "linux,uio-pdrv-genirq";
90 reg = <1 0x00000000 0x00010000>;
91 };
92
93 asi@2,0 {
94 /* masters mapping: CS, CS offset, size */
95 reg = <2 0x00000000 0x00080000
96 6 0x00000000 0x00080000>;
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "ifm,ac14xx-asi-fpga";
100 gpios = <
101 &gpio_pic 26 0 /* prog */
102 &gpio_pic 27 0 /* done */
103 &gpio_pic 10 0 /* reset */
104 >;
105
106 master@1 {
107 interrupts = <20 0x2>;
108 interrupt-parent = <&gpio_pic>;
109 chipselect = <2 0x00009000 0x00009100>;
110 label = "AS-i master 1";
111 };
112
113 master@2 {
114 interrupts = <21 0x2>;
115 interrupt-parent = <&gpio_pic>;
116 chipselect = <6 0x00009000 0x00009100>;
117 label = "AS-i master 2";
118 };
119 };
120
121 netx@3,0 {
122 compatible = "ifm,netx";
123 reg = <0x3 0x00000000 0x00020000>;
124 chipselect = <3 0x00101140 0x00203100>;
125 interrupts = <17 0x8>;
126 gpios = <&gpio_pic 15 0>;
127 };
128
129 safety@5,0 {
130 compatible = "ifm,safety";
131 reg = <0x5 0x00000000 0x00010000>;
132 chipselect = <5 0x00009000 0x00009100>;
133 interrupts = <22 0x2>;
134 interrupt-parent = <&gpio_pic>;
135 gpios = <
136 &gpio_pic 12 0 /* prog */
137 &gpio_pic 11 0 /* done */
138 >;
139 };
140 };
141
142 clocks {
143 osc {
144 clock-frequency = <25000000>;
145 };
146 };
147
148 soc@80000000 {
149 bus-frequency = <80000000>; /* 80 MHz ips bus */
150
151 clock@f00 {
152 compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
153 };
154
155 /*
156 * GPIO PIC:
157 * interrupts cell = <pin nr, sense>
158 * sense == 8: Level, low assertion
159 * sense == 2: Edge, high-to-low change
160 */
161 gpio_pic: gpio@1100 {
162 gpio-controller;
163 #gpio-cells = <2>;
164 interrupt-controller;
165 #interrupt-cells = <2>;
166 };
167
168 sdhc@1500 {
169 cd-gpios = <&gpio_pic 23 0>; /* card detect */
170 wp-gpios = <&gpio_pic 24 0>; /* write protect */
171 wp-inverted; /* WP active high */
172 };
173
174 i2c@1700 {
175 /* use Fast-mode */
176 clock-frequency = <400000>;
177
178 at24@30 {
179 compatible = "at24,24c01";
180 reg = <0x30>;
181 };
182
183 at24@31 {
184 compatible = "at24,24c01";
185 reg = <0x31>;
186 };
187
188 temp@48 {
189 compatible = "ad,ad7414";
190 reg = <0x48>;
191 };
192
193 at24@50 {
194 compatible = "at24,24c01";
195 reg = <0x50>;
196 };
197
198 at24@51 {
199 compatible = "at24,24c01";
200 reg = <0x51>;
201 };
202
203 at24@52 {
204 compatible = "at24,24c01";
205 reg = <0x52>;
206 };
207
208 at24@53 {
209 compatible = "at24,24c01";
210 reg = <0x53>;
211 };
212
213 at24@54 {
214 compatible = "at24,24c01";
215 reg = <0x54>;
216 };
217
218 at24@55 {
219 compatible = "at24,24c01";
220 reg = <0x55>;
221 };
222
223 at24@56 {
224 compatible = "at24,24c01";
225 reg = <0x56>;
226 };
227
228 at24@57 {
229 compatible = "at24,24c01";
230 reg = <0x57>;
231 };
232
233 rtc@68 {
234 compatible = "st,m41t00";
235 reg = <0x68>;
236 };
237 };
238
239 axe_pic: axe-base@2000 {
240 compatible = "fsl,mpc5121-axe-base";
241 reg = <0x2000 0x100>;
242 interrupts = <42 0x8>;
243 interrupt-controller;
244 #interrupt-cells = <2>;
245 };
246
247 axe-app {
248 compatible = "fsl,mpc5121-axe-app";
249 interrupt-parent = <&axe_pic>;
250 interrupts = <
251 /* soft interrupts */
252 0 0x0 1 0x0 2 0x0 3 0x0
253 4 0x0 5 0x0 6 0x0 7 0x0
254 /* fifo interrupts */
255 8 0x0 9 0x0 10 0x0 11 0x0
256 >;
257 };
258
259 display@2100 {
260 edid = [00 FF FF FF FF FF FF 00 14 94 00 00 00 00 00 00
261 0A 12 01 03 80 1C 23 78 CA 88 FF 94 52 54 8E 27
262 1E 4C 50 00 00 00 01 01 01 01 01 01 01 01 01 01
263 01 01 01 01 01 01 FB 00 B0 14 00 DC 05 00 08 04
264 21 00 1C 23 00 00 00 18 00 00 00 FD 00 38 3C 1F
265 3C 01 0A 20 20 20 20 20 20 20 00 00 00 FC 00 45
266 54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
267 00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
268 };
269
270 can@2300 {
271 status = "disabled";
272 };
273
274 can@2380 {
275 status = "disabled";
276 };
277
278 viu@2400 {
279 status = "disabled";
280 };
281
282 mdio@2800 {
283 phy0: ethernet-phy@1f {
284 compatible = "smsc,lan8700";
285 reg = <0x1f>;
286 };
287 };
288
289 enet: ethernet@2800 {
290 phy-handle = <&phy0>;
291 };
292
293 usb@3000 {
294 status = "disabled";
295 };
296
297 usb@4000 {
298 status = "disabled";
299 };
300
301 /* PSC3 serial port A, aka ttyPSC0 */
302 serial0: psc@11300 {
303 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
304 fsl,rx-fifo-size = <512>;
305 fsl,tx-fifo-size = <512>;
306 };
307
308 /* PSC4 in SPI mode */
309 spi4: psc@11400 {
310 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
311 fsl,rx-fifo-size = <768>;
312 fsl,tx-fifo-size = <768>;
313 #address-cells = <1>;
314 #size-cells = <0>;
315 num-cs = <1>;
316 cs-gpios = <&gpio_pic 25 0>;
317
318 flash: m25p128@0 {
319 compatible = "st,m25p128";
320 spi-max-frequency = <20000000>;
321 reg = <0>;
322 #address-cells = <1>;
323 #size-cells = <1>;
324
325 partition@0 {
326 label = "spi-flash0";
327 reg = <0x00000000 0x01000000>;
328 };
329 };
330 };
331
332 /* PSC5 in SPI mode */
333 spi5: psc@11500 {
334 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
335 fsl,mode = "spi-master";
336 fsl,rx-fifo-size = <128>;
337 fsl,tx-fifo-size = <128>;
338 #address-cells = <1>;
339 #size-cells = <0>;
340
341 lcd@0 {
342 compatible = "ilitek,ili922x";
343 reg = <0>;
344 spi-max-frequency = <100000>;
345 spi-cpol;
346 spi-cpha;
347 };
348 };
349
350 /* PSC7 serial port C, aka ttyPSC2 */
351 serial7: psc@11700 {
352 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
353 fsl,rx-fifo-size = <512>;
354 fsl,tx-fifo-size = <512>;
355 };
356
357 matrix_keypad@0 {
358 compatible = "gpio-matrix-keypad";
359 debounce-delay-ms = <5>;
360 col-scan-delay-us = <1>;
361 gpio-activelow;
362 col-gpios-binary;
363 col-switch-delay-ms = <200>;
364
365 col-gpios = <&gpio_pic 1 0>; /* pin1 */
366
367 row-gpios = <&gpio_pic 2 0 /* pin2 */
368 &gpio_pic 3 0 /* pin3 */
369 &gpio_pic 4 0>; /* pin4 */
370
371 linux,keymap = <0x0000006e /* FN LEFT */
372 0x01000067 /* UP */
373 0x02000066 /* FN RIGHT */
374 0x00010069 /* LEFT */
375 0x0101006a /* DOWN */
376 0x0201006c>; /* RIGHT */
377 };
378 };
379
380 leds {
381 compatible = "gpio-leds";
382
383 backlight {
384 label = "backlight";
385 gpios = <&gpio_pic 0 0>;
386 default-state = "keep";
387 };
388 green {
389 label = "green";
390 gpios = <&gpio_pic 18 0>;
391 default-state = "keep";
392 };
393 red {
394 label = "red";
395 gpios = <&gpio_pic 19 0>;
396 default-state = "keep";
397 };
398 };
399};
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Device Tree Source for the MPC5121e based ac14xx board
4 *
5 * Copyright 2012 Anatolij Gustschin <agust@denx.de>
6 */
7
8
9#include "mpc5121.dtsi"
10
11/ {
12 model = "ac14xx";
13 compatible = "ifm,ac14xx", "fsl,mpc5121";
14 #address-cells = <1>;
15 #size-cells = <1>;
16
17 aliases {
18 serial0 = &serial0;
19 serial1 = &serial7;
20 spi4 = &spi4;
21 spi5 = &spi5;
22 };
23
24 cpus {
25 PowerPC,5121@0 {
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
29 };
30 };
31
32 memory {
33 reg = <0x00000000 0x10000000>; /* 256MB at 0 */
34 };
35
36 nfc@40000000 {
37 status = "disabled";
38 };
39
40 localbus@80000020 {
41 ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
42 0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
43 0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
44 0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
45 0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
46 0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
47
48 flash@0,0 {
49 compatible = "cfi-flash";
50 reg = <0 0x00000000 0x04000000>;
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
54 device-width = <2>;
55
56 partition@0 {
57 label = "dtb-kernel-production";
58 reg = <0x00000000 0x00400000>;
59 };
60 partition@1 {
61 label = "filesystem-production";
62 reg = <0x00400000 0x03400000>;
63 };
64
65 partition@2 {
66 label = "recovery";
67 reg = <0x03800000 0x00700000>;
68 };
69
70 partition@3 {
71 label = "uboot-code";
72 reg = <0x03f00000 0x00040000>;
73 };
74 partition@4 {
75 label = "uboot-env1";
76 reg = <0x03f40000 0x00020000>;
77 };
78 partition@5 {
79 label = "uboot-env2";
80 reg = <0x03f60000 0x00020000>;
81 };
82 };
83
84 fram@1,0 {
85 compatible = "ifm,ac14xx-fram", "linux,uio-pdrv-genirq";
86 reg = <1 0x00000000 0x00010000>;
87 };
88
89 asi@2,0 {
90 /* masters mapping: CS, CS offset, size */
91 reg = <2 0x00000000 0x00080000
92 6 0x00000000 0x00080000>;
93 #address-cells = <1>;
94 #size-cells = <1>;
95 compatible = "ifm,ac14xx-asi-fpga";
96 gpios = <
97 &gpio_pic 26 0 /* prog */
98 &gpio_pic 27 0 /* done */
99 &gpio_pic 10 0 /* reset */
100 >;
101
102 master@1 {
103 interrupts = <20 0x2>;
104 interrupt-parent = <&gpio_pic>;
105 chipselect = <2 0x00009000 0x00009100>;
106 label = "AS-i master 1";
107 };
108
109 master@2 {
110 interrupts = <21 0x2>;
111 interrupt-parent = <&gpio_pic>;
112 chipselect = <6 0x00009000 0x00009100>;
113 label = "AS-i master 2";
114 };
115 };
116
117 netx@3,0 {
118 compatible = "ifm,netx";
119 reg = <0x3 0x00000000 0x00020000>;
120 chipselect = <3 0x00101140 0x00203100>;
121 interrupts = <17 0x8>;
122 gpios = <&gpio_pic 15 0>;
123 };
124
125 safety@5,0 {
126 compatible = "ifm,safety";
127 reg = <0x5 0x00000000 0x00010000>;
128 chipselect = <5 0x00009000 0x00009100>;
129 interrupts = <22 0x2>;
130 interrupt-parent = <&gpio_pic>;
131 gpios = <
132 &gpio_pic 12 0 /* prog */
133 &gpio_pic 11 0 /* done */
134 >;
135 };
136 };
137
138 clocks {
139 osc {
140 clock-frequency = <25000000>;
141 };
142 };
143
144 soc@80000000 {
145 bus-frequency = <80000000>; /* 80 MHz ips bus */
146
147 clock@f00 {
148 compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
149 };
150
151 /*
152 * GPIO PIC:
153 * interrupts cell = <pin nr, sense>
154 * sense == 8: Level, low assertion
155 * sense == 2: Edge, high-to-low change
156 */
157 gpio_pic: gpio@1100 {
158 gpio-controller;
159 #gpio-cells = <2>;
160 interrupt-controller;
161 #interrupt-cells = <2>;
162 };
163
164 sdhc@1500 {
165 cd-gpios = <&gpio_pic 23 0>; /* card detect */
166 wp-gpios = <&gpio_pic 24 0>; /* write protect */
167 wp-inverted; /* WP active high */
168 };
169
170 i2c@1700 {
171 /* use Fast-mode */
172 clock-frequency = <400000>;
173
174 at24@30 {
175 compatible = "atmel,24c01";
176 reg = <0x30>;
177 };
178
179 at24@31 {
180 compatible = "atmel,24c01";
181 reg = <0x31>;
182 };
183
184 temp@48 {
185 compatible = "ad,ad7414";
186 reg = <0x48>;
187 };
188
189 at24@50 {
190 compatible = "atmel,24c01";
191 reg = <0x50>;
192 };
193
194 at24@51 {
195 compatible = "atmel,24c01";
196 reg = <0x51>;
197 };
198
199 at24@52 {
200 compatible = "atmel,24c01";
201 reg = <0x52>;
202 };
203
204 at24@53 {
205 compatible = "atmel,24c01";
206 reg = <0x53>;
207 };
208
209 at24@54 {
210 compatible = "atmel,24c01";
211 reg = <0x54>;
212 };
213
214 at24@55 {
215 compatible = "atmel,24c01";
216 reg = <0x55>;
217 };
218
219 at24@56 {
220 compatible = "atmel,24c01";
221 reg = <0x56>;
222 };
223
224 at24@57 {
225 compatible = "atmel,24c01";
226 reg = <0x57>;
227 };
228
229 rtc@68 {
230 compatible = "st,m41t00";
231 reg = <0x68>;
232 };
233 };
234
235 axe_pic: axe-base@2000 {
236 compatible = "fsl,mpc5121-axe-base";
237 reg = <0x2000 0x100>;
238 interrupts = <42 0x8>;
239 interrupt-controller;
240 #interrupt-cells = <2>;
241 };
242
243 axe-app {
244 compatible = "fsl,mpc5121-axe-app";
245 interrupt-parent = <&axe_pic>;
246 interrupts = <
247 /* soft interrupts */
248 0 0x0 1 0x0 2 0x0 3 0x0
249 4 0x0 5 0x0 6 0x0 7 0x0
250 /* fifo interrupts */
251 8 0x0 9 0x0 10 0x0 11 0x0
252 >;
253 };
254
255 display@2100 {
256 edid = [00 FF FF FF FF FF FF 00 14 94 00 00 00 00 00 00
257 0A 12 01 03 80 1C 23 78 CA 88 FF 94 52 54 8E 27
258 1E 4C 50 00 00 00 01 01 01 01 01 01 01 01 01 01
259 01 01 01 01 01 01 FB 00 B0 14 00 DC 05 00 08 04
260 21 00 1C 23 00 00 00 18 00 00 00 FD 00 38 3C 1F
261 3C 01 0A 20 20 20 20 20 20 20 00 00 00 FC 00 45
262 54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
263 00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
264 };
265
266 can@2300 {
267 status = "disabled";
268 };
269
270 can@2380 {
271 status = "disabled";
272 };
273
274 viu@2400 {
275 status = "disabled";
276 };
277
278 mdio@2800 {
279 phy0: ethernet-phy@1f {
280 compatible = "smsc,lan8700";
281 reg = <0x1f>;
282 };
283 };
284
285 enet: ethernet@2800 {
286 phy-handle = <&phy0>;
287 };
288
289 usb@3000 {
290 status = "disabled";
291 };
292
293 usb@4000 {
294 status = "disabled";
295 };
296
297 /* PSC3 serial port A, aka ttyPSC0 */
298 serial0: psc@11300 {
299 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
300 fsl,rx-fifo-size = <512>;
301 fsl,tx-fifo-size = <512>;
302 };
303
304 /* PSC4 in SPI mode */
305 spi4: psc@11400 {
306 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
307 fsl,rx-fifo-size = <768>;
308 fsl,tx-fifo-size = <768>;
309 #address-cells = <1>;
310 #size-cells = <0>;
311 num-cs = <1>;
312 cs-gpios = <&gpio_pic 25 0>;
313
314 flash: m25p128@0 {
315 compatible = "st,m25p128";
316 spi-max-frequency = <20000000>;
317 reg = <0>;
318 #address-cells = <1>;
319 #size-cells = <1>;
320
321 partition@0 {
322 label = "spi-flash0";
323 reg = <0x00000000 0x01000000>;
324 };
325 };
326 };
327
328 /* PSC5 in SPI mode */
329 spi5: psc@11500 {
330 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
331 fsl,mode = "spi-master";
332 fsl,rx-fifo-size = <128>;
333 fsl,tx-fifo-size = <128>;
334 #address-cells = <1>;
335 #size-cells = <0>;
336
337 lcd@0 {
338 compatible = "ilitek,ili922x";
339 reg = <0>;
340 spi-max-frequency = <100000>;
341 spi-cpol;
342 spi-cpha;
343 };
344 };
345
346 /* PSC7 serial port C, aka ttyPSC2 */
347 serial7: psc@11700 {
348 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
349 fsl,rx-fifo-size = <512>;
350 fsl,tx-fifo-size = <512>;
351 };
352
353 matrix_keypad@0 {
354 compatible = "gpio-matrix-keypad";
355 debounce-delay-ms = <5>;
356 col-scan-delay-us = <1>;
357 gpio-activelow;
358 col-gpios-binary;
359 col-switch-delay-ms = <200>;
360
361 col-gpios = <&gpio_pic 1 0>; /* pin1 */
362
363 row-gpios = <&gpio_pic 2 0 /* pin2 */
364 &gpio_pic 3 0 /* pin3 */
365 &gpio_pic 4 0>; /* pin4 */
366
367 linux,keymap = <0x0000006e /* FN LEFT */
368 0x01000067 /* UP */
369 0x02000066 /* FN RIGHT */
370 0x00010069 /* LEFT */
371 0x0101006a /* DOWN */
372 0x0201006c>; /* RIGHT */
373 };
374 };
375
376 leds {
377 compatible = "gpio-leds";
378
379 backlight {
380 label = "backlight";
381 gpios = <&gpio_pic 0 0>;
382 default-state = "keep";
383 };
384 green {
385 label = "green";
386 gpios = <&gpio_pic 18 0>;
387 default-state = "keep";
388 };
389 red {
390 label = "red";
391 gpios = <&gpio_pic 19 0>;
392 default-state = "keep";
393 };
394 };
395};