1// SPDX-License-Identifier: GPL-2.0+ OR MIT
 2//
 3// Device Tree Source for UniPhier LD6b Reference Board
 4//
 5// Copyright (C) 2015-2016 Socionext Inc.
 6//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 7
 8/dts-v1/;
 9#include "uniphier-ld6b.dtsi"
10#include "uniphier-ref-daughter.dtsi"
11#include "uniphier-support-card.dtsi"
12
13/ {
14	model = "UniPhier LD6b Reference Board";
15	compatible = "socionext,uniphier-ld6b-ref", "socionext,uniphier-ld6b";
16
17	chosen {
18		stdout-path = "serial0:115200n8";
19	};
20
21	aliases {
22		serial0 = &serial0;
23		serial1 = &serial1;
24		serial2 = &serial2;
25		i2c0 = &i2c0;
26		i2c1 = &i2c1;
27		i2c2 = &i2c2;
28		i2c3 = &i2c3;
29		i2c4 = &i2c4;
30		i2c5 = &i2c5;
31		i2c6 = &i2c6;
32	};
33
34	memory@80000000 {
35		device_type = "memory";
36		reg = <0x80000000 0x80000000>;
37	};
38};
39
40&ethsc {
41	interrupts = <4 8>;
42};
43
44&serial0 {
45	status = "okay";
46};
47
48&serial1 {
49	status = "okay";
50};
51
52&serial2 {
53	status = "okay";
54};
55
56&gpio {
57	xirq4 {
58		gpio-hog;
59		gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
60		input;
61	};
62};
63
64&i2c0 {
65	status = "okay";
66};
67
 
 
 
 
68&eth {
69	status = "okay";
70	phy-handle = <&ethphy>;
71};
72
73&mdio {
74	ethphy: ethphy@0 {
75		reg = <0>;
76	};
77};
78
 
 
 
 
 
 
 
 
79&nand {
80	status = "okay";
 
 
 
 
81};

 1// SPDX-License-Identifier: GPL-2.0+ OR MIT
 2//
 3// Device Tree Source for UniPhier LD6b Reference Board
 4//
 5// Copyright (C) 2015-2016 Socionext Inc.
 6//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 7
 8/dts-v1/;
 9#include "uniphier-ld6b.dtsi"
10#include "uniphier-ref-daughter.dtsi"
11#include "uniphier-support-card.dtsi"
12
13/ {
14	model = "UniPhier LD6b Reference Board";
15	compatible = "socionext,uniphier-ld6b-ref", "socionext,uniphier-ld6b";
16
17	chosen {
18		stdout-path = "serial0:115200n8";
19	};
20
21	aliases {
22		serial0 = &serial0;
23		serial1 = &serial1;
24		serial2 = &serial2;
25		i2c0 = &i2c0;
26		i2c1 = &i2c1;
27		i2c2 = &i2c2;
28		i2c3 = &i2c3;
29		i2c4 = &i2c4;
30		i2c5 = &i2c5;
31		i2c6 = &i2c6;
32	};
33
34	memory@80000000 {
35		device_type = "memory";
36		reg = <0x80000000 0x80000000>;
37	};
38};
39
40&ethsc {
41	interrupts = <4 8>;
42};
43
44&serial0 {
45	status = "okay";
46};
47
48&serial1 {
49	status = "okay";
50};
51
52&serial2 {
53	status = "okay";
54};
55
56&gpio {
57	xirq4 {
58		gpio-hog;
59		gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
60		input;
61	};
62};
63
64&i2c0 {
65	status = "okay";
66};
67
68&sd {
69	status = "okay";
70};
71
72&eth {
73	status = "okay";
74	phy-handle = <&ethphy>;
75};
76
77&mdio {
78	ethphy: ethphy@0 {
79		reg = <0>;
80	};
81};
82
83&usb0 {
84	status = "okay";
85};
86
87&usb1 {
88	status = "okay";
89};
90
91&nand {
92	status = "okay";
93
94	nand@0 {
95		reg = <0>;
96	};
97};