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1/*
2 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48#include "socfpga_cyclone5.dtsi"
49#include <dt-bindings/gpio/gpio.h>
50#include <dt-bindings/input/input.h>
51
52/ {
53 model = "samtec VIN|ING FPGA";
54 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
55
56 chosen {
57 bootargs = "console=ttyS0,115200";
58 };
59
60 memory@0 {
61 name = "memory";
62 device_type = "memory";
63 reg = <0x0 0x40000000>; /* 1GB */
64 };
65
66 aliases {
67 /*
68 * This allow the ethaddr uboot environment variable contents
69 * to be added to the gmac1 device tree blob.
70 */
71 ethernet0 = &gmac1;
72 ethernet1 = &gmac0;
73 };
74
75 gpio-keys {
76 compatible = "gpio-keys";
77
78 hps_temp0 {
79 label = "BTN_0"; /* TEMP_OS */
80 gpios = <&portc 18 GPIO_ACTIVE_LOW>; /* HPS_GPIO60 */
81 linux,code = <BTN_0>;
82 };
83
84 hps_hkey0 {
85 label = "BTN_1"; /* DIS_PWR */
86 gpios = <&portc 19 GPIO_ACTIVE_LOW>; /* HPS_GPIO61 */
87 linux,code = <BTN_1>;
88 };
89
90 hps_hkey1 {
91 label = "hps_hkey1"; /* POWER_DOWN */
92 gpios = <&portc 20 GPIO_ACTIVE_LOW>; /* HPS_GPIO62 */
93 linux,code = <KEY_POWER>;
94 };
95 };
96
97 regulator-usb-nrst {
98 compatible = "regulator-fixed";
99 regulator-name = "usb_nrst";
100 regulator-min-microvolt = <5000000>;
101 regulator-max-microvolt = <5000000>;
102 gpio = <&portb 5 GPIO_ACTIVE_HIGH>;
103 startup-delay-us = <70000>;
104 enable-active-high;
105 regulator-always-on;
106 };
107};
108
109&gmac1 {
110 status = "okay";
111 phy-mode = "rgmii";
112 phy-handle = <&phy1>;
113
114 snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
115 snps,reset-active-low;
116 snps,reset-delays-us = <10000 10000 10000>;
117
118 mdio0 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 compatible = "snps,dwmac-mdio";
122 phy1: ethernet-phy@1 {
123 reg = <1>;
124 rxd0-skew-ps = <0>;
125 rxd1-skew-ps = <0>;
126 rxd2-skew-ps = <0>;
127 rxd3-skew-ps = <0>;
128 txen-skew-ps = <0>;
129 txc-skew-ps = <2600>;
130 rxdv-skew-ps = <0>;
131 rxc-skew-ps = <2000>;
132 };
133 };
134};
135
136&gpio0 { /* GPIO 0..29 */
137 status = "okay";
138};
139
140&gpio1 { /* GPIO 30..57 */
141 status = "okay";
142};
143
144&gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
145 status = "okay";
146};
147
148&i2c0 {
149 status = "okay";
150
151 gpio: pca9557@1f {
152 compatible = "nxp,pca9557";
153 reg = <0x1f>;
154 gpio-controller;
155 #gpio-cells = <2>;
156 };
157
158 temp: lm75@48 {
159 compatible = "lm75";
160 reg = <0x48>;
161 };
162
163 at24@50 {
164 compatible = "at24,24c01";
165 pagesize = <8>;
166 reg = <0x50>;
167 };
168
169 i2cswitch@70 {
170 compatible = "nxp,pca9548";
171 #address-cells = <1>;
172 #size-cells = <0>;
173 reg = <0x70>;
174
175 i2c@0 {
176 #address-cells = <1>;
177 #size-cells = <0>;
178 reg = <0>;
179 };
180
181 i2c@1 {
182 #address-cells = <1>;
183 #size-cells = <0>;
184 reg = <1>;
185 };
186
187 i2c@2 {
188 #address-cells = <1>;
189 #size-cells = <0>;
190 reg = <2>;
191 };
192
193 i2c@3 {
194 #address-cells = <1>;
195 #size-cells = <0>;
196 reg = <3>;
197 };
198
199 i2c@4 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 reg = <4>;
203 };
204
205 i2c@5 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 reg = <5>;
209 };
210
211 i2c@6 { /* Backplane EEPROM */
212 #address-cells = <1>;
213 #size-cells = <0>;
214 reg = <6>;
215 eeprom@51 {
216 compatible = "at,24c01";
217 pagesize = <8>;
218 reg = <0x51>;
219 };
220 };
221
222 i2c@7 { /* Power board EEPROM */
223 #address-cells = <1>;
224 #size-cells = <0>;
225 reg = <7>;
226 eeprom@51 {
227 compatible = "at,24c01";
228 pagesize = <8>;
229 reg = <0x51>;
230 };
231 };
232 };
233};
234
235&i2c1 {
236 status = "okay";
237 clock-frequency = <100000>;
238
239 at24@50 {
240 compatible = "atmel,24c02";
241 pagesize = <8>;
242 reg = <0x50>;
243 };
244};
245
246&qspi {
247 status = "okay";
248
249 n25q128@0 {
250 #address-cells = <1>;
251 #size-cells = <1>;
252 compatible = "n25q128";
253 reg = <0>; /* chip select */
254 spi-max-frequency = <100000000>;
255 m25p,fast-read;
256
257 cdns,page-size = <256>;
258 cdns,block-size = <16>;
259 cdns,read-delay = <4>;
260 cdns,tshsl-ns = <50>;
261 cdns,tsd2d-ns = <50>;
262 cdns,tchsh-ns = <4>;
263 cdns,tslch-ns = <4>;
264 };
265
266 n25q00@1 {
267 #address-cells = <1>;
268 #size-cells = <1>;
269 compatible = "n25q00";
270 reg = <1>; /* chip select */
271 spi-max-frequency = <100000000>;
272 m25p,fast-read;
273
274 cdns,page-size = <256>;
275 cdns,block-size = <16>;
276 cdns,read-delay = <4>;
277 cdns,tshsl-ns = <50>;
278 cdns,tsd2d-ns = <50>;
279 cdns,tchsh-ns = <4>;
280 cdns,tslch-ns = <4>;
281 };
282};
283
284&usb0 {
285 dr_mode = "host";
286 status = "okay";
287};
288
289&usb1 {
290 dr_mode = "peripheral";
291 status = "okay";
292};
1// SPDX-License-Identifier: (GPL-2.0+ OR X11)
2/*
3 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4 */
5
6#include "socfpga_cyclone5.dtsi"
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>
9
10/ {
11 model = "samtec VIN|ING FPGA";
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
13
14 chosen {
15 bootargs = "earlyprintk";
16 stdout-path = "serial0:115200n8";
17 };
18
19 memory@0 {
20 name = "memory";
21 device_type = "memory";
22 reg = <0x0 0x40000000>; /* 1GB */
23 };
24
25 aliases {
26 /*
27 * This allow the ethaddr uboot environment variable contents
28 * to be added to the gmac1 device tree blob.
29 */
30 ethernet0 = &gmac1;
31 ethernet1 = &gmac0;
32 };
33
34 gpio-keys {
35 compatible = "gpio-keys";
36
37 hps_temp0 {
38 label = "BTN_0"; /* TEMP_OS */
39 gpios = <&portc 18 GPIO_ACTIVE_LOW>; /* HPS_GPI5 */
40 linux,code = <BTN_0>;
41 };
42
43 hps_hkey0 {
44 label = "GP_SWITCH"; /* GP_SWITCH */
45 gpios = <&portc 19 GPIO_ACTIVE_LOW>; /* HPS_GPI6 */
46 linux,code = <BTN_1>;
47 };
48
49 hps_hkey1 {
50 label = "RESET_SWITCH"; /* RESET_SWITCH */
51 gpios = <&portc 20 GPIO_ACTIVE_LOW>; /* HPS_GPI7 */
52 linux,code = <BTN_2>;
53 };
54
55 hps_hkey2 {
56 label = "POWER_DOWN"; /* POWER_DOWN */
57 gpios = <&portc 4 GPIO_ACTIVE_LOW>; /* HPS_GPIO62 */
58 linux,code = <KEY_POWER>;
59 };
60
61 hps_hkey3 {
62 label = "SENSE"; /* SENSE */
63 gpios = <&porta 9 GPIO_ACTIVE_LOW>; /* HPS_GPIO9 */
64 linux,code = <BTN_3>;
65 };
66 };
67
68 regulator-usb-nrst {
69 compatible = "regulator-fixed";
70 regulator-name = "usb_nrst";
71 regulator-min-microvolt = <5000000>;
72 regulator-max-microvolt = <5000000>;
73 gpio = <&portb 5 GPIO_ACTIVE_HIGH>;
74 startup-delay-us = <70000>;
75 enable-active-high;
76 regulator-always-on;
77 };
78};
79
80&gmac1 {
81 status = "okay";
82 phy-mode = "rgmii";
83 phy-handle = <&phy1>;
84
85 snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
86 snps,reset-active-low;
87 snps,reset-delays-us = <10000 10000 10000>;
88
89 mdio0 {
90 #address-cells = <1>;
91 #size-cells = <0>;
92 compatible = "snps,dwmac-mdio";
93 phy1: ethernet-phy@1 {
94 reg = <1>;
95 rxd0-skew-ps = <0>;
96 rxd1-skew-ps = <0>;
97 rxd2-skew-ps = <0>;
98 rxd3-skew-ps = <0>;
99 txd0-skew-ps = <0>;
100 txd1-skew-ps = <0>;
101 txd2-skew-ps = <0>;
102 txd3-skew-ps = <0>;
103 txen-skew-ps = <0>;
104 txc-skew-ps = <1860>;
105 rxdv-skew-ps = <0>;
106 rxc-skew-ps = <1860>;
107 };
108 };
109};
110
111&gpio0 { /* GPIO 0..29 */
112 status = "okay";
113};
114
115&gpio1 { /* GPIO 30..57 */
116 status = "okay";
117};
118
119&gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
120 status = "okay";
121};
122
123&i2c0 {
124 status = "okay";
125
126 gpio: pca9557@1f {
127 compatible = "nxp,pca9557";
128 reg = <0x1f>;
129 gpio-controller;
130 #gpio-cells = <2>;
131 };
132
133 temp: lm75@48 {
134 compatible = "lm75";
135 reg = <0x48>;
136 };
137
138 at24@50 {
139 compatible = "atmel,24c01";
140 pagesize = <8>;
141 reg = <0x50>;
142 };
143
144 i2cswitch@70 {
145 compatible = "nxp,pca9548";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 reg = <0x70>;
149
150 i2c@0 {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0>;
154 };
155
156 i2c@1 {
157 #address-cells = <1>;
158 #size-cells = <0>;
159 reg = <1>;
160 };
161
162 i2c@2 {
163 #address-cells = <1>;
164 #size-cells = <0>;
165 reg = <2>;
166 };
167
168 i2c@3 {
169 #address-cells = <1>;
170 #size-cells = <0>;
171 reg = <3>;
172 };
173
174 i2c@4 {
175 #address-cells = <1>;
176 #size-cells = <0>;
177 reg = <4>;
178 };
179
180 i2c@5 {
181 #address-cells = <1>;
182 #size-cells = <0>;
183 reg = <5>;
184 };
185
186 i2c@6 { /* Backplane EEPROM */
187 #address-cells = <1>;
188 #size-cells = <0>;
189 reg = <6>;
190 eeprom@51 {
191 compatible = "atmel,24c01";
192 pagesize = <8>;
193 reg = <0x51>;
194 };
195 };
196
197 i2c@7 { /* Power board EEPROM */
198 #address-cells = <1>;
199 #size-cells = <0>;
200 reg = <7>;
201 eeprom@51 {
202 compatible = "atmel,24c01";
203 pagesize = <8>;
204 reg = <0x51>;
205 };
206 };
207 };
208};
209
210&i2c1 {
211 status = "okay";
212 clock-frequency = <100000>;
213
214 at24@50 {
215 compatible = "atmel,24c02";
216 pagesize = <8>;
217 reg = <0x50>;
218 };
219};
220
221&qspi {
222 status = "okay";
223
224 n25q128@0 {
225 #address-cells = <1>;
226 #size-cells = <1>;
227 compatible = "n25q128";
228 reg = <0>; /* chip select */
229 spi-max-frequency = <100000000>;
230 m25p,fast-read;
231
232 cdns,page-size = <256>;
233 cdns,block-size = <16>;
234 cdns,read-delay = <4>;
235 cdns,tshsl-ns = <50>;
236 cdns,tsd2d-ns = <50>;
237 cdns,tchsh-ns = <4>;
238 cdns,tslch-ns = <4>;
239 };
240
241 n25q00@1 {
242 #address-cells = <1>;
243 #size-cells = <1>;
244 compatible = "n25q00";
245 reg = <1>; /* chip select */
246 spi-max-frequency = <100000000>;
247 m25p,fast-read;
248
249 cdns,page-size = <256>;
250 cdns,block-size = <16>;
251 cdns,read-delay = <4>;
252 cdns,tshsl-ns = <50>;
253 cdns,tsd2d-ns = <50>;
254 cdns,tchsh-ns = <4>;
255 cdns,tslch-ns = <4>;
256 };
257};
258
259&usb0 {
260 dr_mode = "host";
261 status = "okay";
262};
263
264&usb1 {
265 dr_mode = "peripheral";
266 status = "okay";
267};