1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * SAMSUNG XYREF5260 board device tree source
 4 *
 5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 6 *		http://www.samsung.com
 7 */
 8
 9/dts-v1/;
10#include "exynos5260.dtsi"
11
12/ {
13	model = "SAMSUNG XYREF5260 board based on EXYNOS5260";
14	compatible = "samsung,xyref5260", "samsung,exynos5260", "samsung,exynos5";
15
16	memory@20000000 {
17		device_type = "memory";
18		reg = <0x20000000 0x80000000>;
19	};
20
21	chosen {
22		bootargs = "console=ttySAC2,115200";
23	};
24
25	fin_pll: xxti {
26		compatible = "fixed-clock";
27		clock-frequency = <24000000>;
28		clock-output-names = "fin_pll";
29		#clock-cells = <0>;
30	};
31
32	xrtcxti: xrtcxti {
33		compatible = "fixed-clock";
34		clock-frequency = <32768>;
35		clock-output-names = "xrtcxti";
36		#clock-cells = <0>;
37	};
38};
39
40&pinctrl_0 {
41	hdmi_hpd_irq: hdmi-hpd-irq {
42		samsung,pins = "gpx3-7";
43		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
44		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
45		samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
46	};
47};
48
49&uart0 {
50	status = "okay";
51};
52
53&uart1 {
54	status = "okay";
55};
56
57&uart2 {
58	status = "okay";
59};
60
61&uart3 {
62	status = "okay";
63};
64
65&mmc_0 {
66	status = "okay";
67	broken-cd;
68	cap-mmc-highspeed;
69	supports-hs200-mode; /* 200 MHz */
70	card-detect-delay = <200>;
71	samsung,dw-mshc-ciu-div = <3>;
72	samsung,dw-mshc-sdr-timing = <0 4>;
73	samsung,dw-mshc-ddr-timing = <0 2>;
74	pinctrl-names = "default";
75	pinctrl-0 = <&sd0_rdqs &sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
76	bus-width = <8>;
77};
78
79&mmc_2 {
80	status = "okay";
81	cap-sd-highspeed;
82	card-detect-delay = <200>;
83	samsung,dw-mshc-ciu-div = <3>;
84	samsung,dw-mshc-sdr-timing = <2 3>;
85	samsung,dw-mshc-ddr-timing = <1 2>;
86	pinctrl-names = "default";
87	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
88	bus-width = <4>;
89	disable-wp;
90};

 1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * SAMSUNG XYREF5260 board device tree source
 4 *
 5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 6 *		http://www.samsung.com
 7 */
 8
 9/dts-v1/;
10#include "exynos5260.dtsi"
11
12/ {
13	model = "SAMSUNG XYREF5260 board based on EXYNOS5260";
14	compatible = "samsung,xyref5260", "samsung,exynos5260", "samsung,exynos5";
15
16	memory@20000000 {
17		device_type = "memory";
18		reg = <0x20000000 0x80000000>;
19	};
20
21	chosen {
22		stdout-path = "serial2:115200n8";
23	};
24
25	fin_pll: xxti {
26		compatible = "fixed-clock";
27		clock-frequency = <24000000>;
28		clock-output-names = "fin_pll";
29		#clock-cells = <0>;
30	};
31
32	xrtcxti: xrtcxti {
33		compatible = "fixed-clock";
34		clock-frequency = <32768>;
35		clock-output-names = "xrtcxti";
36		#clock-cells = <0>;
37	};
38};
39
40&pinctrl_0 {
41	hdmi_hpd_irq: hdmi-hpd-irq {
42		samsung,pins = "gpx3-7";
43		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
44		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
45		samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
46	};
47};
48
49&uart0 {
50	status = "okay";
51};
52
53&uart1 {
54	status = "okay";
55};
56
57&uart2 {
58	status = "okay";
59};
60
61&uart3 {
62	status = "okay";
63};
64
65&mmc_0 {
66	status = "okay";
67	broken-cd;
68	cap-mmc-highspeed;
69	supports-hs200-mode; /* 200 MHz */
70	card-detect-delay = <200>;
71	samsung,dw-mshc-ciu-div = <3>;
72	samsung,dw-mshc-sdr-timing = <0 4>;
73	samsung,dw-mshc-ddr-timing = <0 2>;
74	pinctrl-names = "default";
75	pinctrl-0 = <&sd0_rdqs &sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
76	bus-width = <8>;
77};
78
79&mmc_2 {
80	status = "okay";
81	cap-sd-highspeed;
82	card-detect-delay = <200>;
83	samsung,dw-mshc-ciu-div = <3>;
84	samsung,dw-mshc-sdr-timing = <2 3>;
85	samsung,dw-mshc-ddr-timing = <1 2>;
86	pinctrl-names = "default";
87	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
88	bus-width = <4>;
89	disable-wp;
90};