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v4.17
 
 1/*
 2 * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
 3 *
 4 * Copyright (C) 2017 Axentia Technologies AB
 5 *
 6 * Author: Peter Rosin <peda@axentia.se>
 7 *
 8 * Licensed under GPLv2 or later.
 9 */
10
11#include "sama5d31.dtsi"
12
13/ {
14	compatible = "axentia,linea",
15		     "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
16
17	memory {
18		reg = <0x20000000 0x4000000>;
19	};
20};
21
22&slow_xtal {
23	clock-frequency = <32768>;
24};
25
26&main_xtal {
27	clock-frequency = <12000000>;
28};
29
30&tcb0 {
31	timer@0 {
32		compatible = "atmel,tcb-timer";
33		reg = <0>;
34	};
35
36	timer@1 {
37		compatible = "atmel,tcb-timer";
38		reg = <1>;
39	};
40};
41
42&i2c0 {
43	status = "okay";
44
45	eeprom@51 {
46		compatible = "st,24c64", "atmel,24c64";
47		reg = <0x51>;
48		pagesize = <32>;
49	};
50};
51
52&ebi {
53	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
54	pinctrl-names = "default";
55	status = "okay";
56};
57
58
59&nand_controller {
60	status = "okay";
61
62	nand: nand@3 {
63		reg = <0x3 0x0 0x2>;
64		atmel,rb = <0>;
65		nand-bus-width = <8>;
66		nand-ecc-mode = "hw";
67		nand-ecc-strength = <4>;
68		nand-ecc-step-size = <512>;
69		nand-on-flash-bbt;
70		label = "atmel_nand";
71	};
72};
v5.4
 1// SPDX-License-Identifier: GPL-2.0-or-later
 2/*
 3 * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
 4 *
 5 * Copyright (C) 2017 Axentia Technologies AB
 6 *
 7 * Author: Peter Rosin <peda@axentia.se>
 
 
 8 */
 9
10#include "sama5d31.dtsi"
11
12/ {
13	compatible = "axentia,linea",
14		     "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
15
16	memory {
17		reg = <0x20000000 0x4000000>;
18	};
19};
20
21&slow_xtal {
22	clock-frequency = <32768>;
23};
24
25&main_xtal {
26	clock-frequency = <12000000>;
27};
28
29&tcb0 {
30	timer@0 {
31		compatible = "atmel,tcb-timer";
32		reg = <0>;
33	};
34
35	timer@1 {
36		compatible = "atmel,tcb-timer";
37		reg = <1>;
38	};
39};
40
41&i2c0 {
42	status = "okay";
43
44	eeprom@51 {
45		compatible = "st,24c64", "atmel,24c64";
46		reg = <0x51>;
47		pagesize = <32>;
48	};
49};
50
51&ebi {
52	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
53	pinctrl-names = "default";
54	status = "okay";
55};
56
57
58&nand_controller {
59	status = "okay";
60
61	nand: nand@3 {
62		reg = <0x3 0x0 0x2>;
63		atmel,rb = <0>;
64		nand-bus-width = <8>;
65		nand-ecc-mode = "hw";
66		nand-ecc-strength = <4>;
67		nand-ecc-step-size = <512>;
68		nand-on-flash-bbt;
69		label = "atmel_nand";
70	};
71};