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1/*
2 * skl-i2s.h - i2s blob mapping
3 *
4 * Copyright (C) 2017 Intel Corp
5 * Author: Subhransu S. Prusty < subhransu.s.prusty@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
17 *
18 */
19
20#ifndef __SOUND_SOC_SKL_I2S_H
21#define __SOUND_SOC_SKL_I2S_H
22
23#define SKL_I2S_MAX_TIME_SLOTS 8
24#define SKL_MCLK_DIV_CLK_SRC_MASK GENMASK(17, 16)
25
26#define SKL_MNDSS_DIV_CLK_SRC_MASK GENMASK(21, 20)
27#define SKL_SHIFT(x) (ffs(x) - 1)
28#define SKL_MCLK_DIV_RATIO_MASK GENMASK(11, 0)
29
30#define is_legacy_blob(x) (x.signature != 0xEE)
31#define ext_to_legacy_blob(i2s_config_blob_ext) \
32 ((struct skl_i2s_config_blob_legacy *) i2s_config_blob_ext)
33
34#define get_clk_src(mclk, mask) \
35 ((mclk.mdivctrl & mask) >> SKL_SHIFT(mask))
36struct skl_i2s_config {
37 u32 ssc0;
38 u32 ssc1;
39 u32 sscto;
40 u32 sspsp;
41 u32 sstsa;
42 u32 ssrsa;
43 u32 ssc2;
44 u32 sspsp2;
45 u32 ssc3;
46 u32 ssioc;
47} __packed;
48
49struct skl_i2s_config_mclk {
50 u32 mdivctrl;
51 u32 mdivr;
52};
53
54struct skl_i2s_config_mclk_ext {
55 u32 mdivctrl;
56 u32 mdivr_count;
57 u32 mdivr[0];
58} __packed;
59
60struct skl_i2s_config_blob_signature {
61 u32 minor_ver : 8;
62 u32 major_ver : 8;
63 u32 resvdz : 8;
64 u32 signature : 8;
65} __packed;
66
67struct skl_i2s_config_blob_header {
68 struct skl_i2s_config_blob_signature sig;
69 u32 size;
70};
71
72/**
73 * struct skl_i2s_config_blob_legacy - Structure defines I2S Gateway
74 * configuration legacy blob
75 *
76 * @gtw_attr: Gateway attribute for the I2S Gateway
77 * @tdm_ts_group: TDM slot mapping against channels in the Gateway.
78 * @i2s_cfg: I2S HW registers
79 * @mclk: MCLK clock source and divider values
80 */
81struct skl_i2s_config_blob_legacy {
82 u32 gtw_attr;
83 u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS];
84 struct skl_i2s_config i2s_cfg;
85 struct skl_i2s_config_mclk mclk;
86};
87
88struct skl_i2s_config_blob_ext {
89 u32 gtw_attr;
90 struct skl_i2s_config_blob_header hdr;
91 u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS];
92 struct skl_i2s_config i2s_cfg;
93 struct skl_i2s_config_mclk_ext mclk;
94} __packed;
95#endif /* __SOUND_SOC_SKL_I2S_H */
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * skl-i2s.h - i2s blob mapping
4 *
5 * Copyright (C) 2017 Intel Corp
6 * Author: Subhransu S. Prusty < subhransu.s.prusty@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 */
11
12#ifndef __SOUND_SOC_SKL_I2S_H
13#define __SOUND_SOC_SKL_I2S_H
14
15#define SKL_I2S_MAX_TIME_SLOTS 8
16#define SKL_MCLK_DIV_CLK_SRC_MASK GENMASK(17, 16)
17
18#define SKL_MNDSS_DIV_CLK_SRC_MASK GENMASK(21, 20)
19#define SKL_SHIFT(x) (ffs(x) - 1)
20#define SKL_MCLK_DIV_RATIO_MASK GENMASK(11, 0)
21
22#define is_legacy_blob(x) (x.signature != 0xEE)
23#define ext_to_legacy_blob(i2s_config_blob_ext) \
24 ((struct skl_i2s_config_blob_legacy *) i2s_config_blob_ext)
25
26#define get_clk_src(mclk, mask) \
27 ((mclk.mdivctrl & mask) >> SKL_SHIFT(mask))
28struct skl_i2s_config {
29 u32 ssc0;
30 u32 ssc1;
31 u32 sscto;
32 u32 sspsp;
33 u32 sstsa;
34 u32 ssrsa;
35 u32 ssc2;
36 u32 sspsp2;
37 u32 ssc3;
38 u32 ssioc;
39} __packed;
40
41struct skl_i2s_config_mclk {
42 u32 mdivctrl;
43 u32 mdivr;
44};
45
46struct skl_i2s_config_mclk_ext {
47 u32 mdivctrl;
48 u32 mdivr_count;
49 u32 mdivr[0];
50} __packed;
51
52struct skl_i2s_config_blob_signature {
53 u32 minor_ver : 8;
54 u32 major_ver : 8;
55 u32 resvdz : 8;
56 u32 signature : 8;
57} __packed;
58
59struct skl_i2s_config_blob_header {
60 struct skl_i2s_config_blob_signature sig;
61 u32 size;
62};
63
64/**
65 * struct skl_i2s_config_blob_legacy - Structure defines I2S Gateway
66 * configuration legacy blob
67 *
68 * @gtw_attr: Gateway attribute for the I2S Gateway
69 * @tdm_ts_group: TDM slot mapping against channels in the Gateway.
70 * @i2s_cfg: I2S HW registers
71 * @mclk: MCLK clock source and divider values
72 */
73struct skl_i2s_config_blob_legacy {
74 u32 gtw_attr;
75 u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS];
76 struct skl_i2s_config i2s_cfg;
77 struct skl_i2s_config_mclk mclk;
78};
79
80struct skl_i2s_config_blob_ext {
81 u32 gtw_attr;
82 struct skl_i2s_config_blob_header hdr;
83 u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS];
84 struct skl_i2s_config i2s_cfg;
85 struct skl_i2s_config_mclk_ext mclk;
86} __packed;
87#endif /* __SOUND_SOC_SKL_I2S_H */