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1/*
2 * Driver for the MMC / SD / SDIO IP found in:
3 *
4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
5 *
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2017 Horms Solutions, Simon Horman
9 * Copyright (C) 2011 Guennadi Liakhovetski
10 * Copyright (C) 2007 Ian Molton
11 * Copyright (C) 2004 Ian Molton
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * This driver draws mainly on scattered spec sheets, Reverse engineering
18 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
19 * support). (Further 4 bit support from a later datasheet).
20 *
21 * TODO:
22 * Investigate using a workqueue for PIO transfers
23 * Eliminate FIXMEs
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
27 *
28 */
29
30#include <linux/delay.h>
31#include <linux/device.h>
32#include <linux/highmem.h>
33#include <linux/interrupt.h>
34#include <linux/io.h>
35#include <linux/irq.h>
36#include <linux/mfd/tmio.h>
37#include <linux/mmc/card.h>
38#include <linux/mmc/host.h>
39#include <linux/mmc/mmc.h>
40#include <linux/mmc/slot-gpio.h>
41#include <linux/module.h>
42#include <linux/pagemap.h>
43#include <linux/platform_device.h>
44#include <linux/pm_qos.h>
45#include <linux/pm_runtime.h>
46#include <linux/regulator/consumer.h>
47#include <linux/mmc/sdio.h>
48#include <linux/scatterlist.h>
49#include <linux/spinlock.h>
50#include <linux/swiotlb.h>
51#include <linux/workqueue.h>
52
53#include "tmio_mmc.h"
54
55static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
56 struct mmc_data *data)
57{
58 if (host->dma_ops)
59 host->dma_ops->start(host, data);
60}
61
62static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
63{
64 if (host->dma_ops)
65 host->dma_ops->enable(host, enable);
66}
67
68static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
69 struct tmio_mmc_data *pdata)
70{
71 if (host->dma_ops) {
72 host->dma_ops->request(host, pdata);
73 } else {
74 host->chan_tx = NULL;
75 host->chan_rx = NULL;
76 }
77}
78
79static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
80{
81 if (host->dma_ops)
82 host->dma_ops->release(host);
83}
84
85static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
86{
87 if (host->dma_ops)
88 host->dma_ops->abort(host);
89}
90
91static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
92{
93 if (host->dma_ops)
94 host->dma_ops->dataend(host);
95}
96
97void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
98{
99 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
100 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
101}
102EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
103
104void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
105{
106 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
107 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
108}
109EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
110
111static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
112{
113 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
114}
115
116static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
117{
118 host->sg_len = data->sg_len;
119 host->sg_ptr = data->sg;
120 host->sg_orig = data->sg;
121 host->sg_off = 0;
122}
123
124static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
125{
126 host->sg_ptr = sg_next(host->sg_ptr);
127 host->sg_off = 0;
128 return --host->sg_len;
129}
130
131#define CMDREQ_TIMEOUT 5000
132
133static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
134{
135 struct tmio_mmc_host *host = mmc_priv(mmc);
136
137 if (enable && !host->sdio_irq_enabled) {
138 u16 sdio_status;
139
140 /* Keep device active while SDIO irq is enabled */
141 pm_runtime_get_sync(mmc_dev(mmc));
142
143 host->sdio_irq_enabled = true;
144 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
145
146 /* Clear obsolete interrupts before enabling */
147 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
148 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
149 sdio_status |= TMIO_SDIO_SETBITS_MASK;
150 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
151
152 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
153 } else if (!enable && host->sdio_irq_enabled) {
154 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
155 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
156
157 host->sdio_irq_enabled = false;
158 pm_runtime_mark_last_busy(mmc_dev(mmc));
159 pm_runtime_put_autosuspend(mmc_dev(mmc));
160 }
161}
162
163static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
164{
165 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
166 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
167
168 /* HW engineers overrode docs: no sleep needed on R-Car2+ */
169 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
170 usleep_range(10000, 11000);
171
172 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
173 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
174 usleep_range(10000, 11000);
175 }
176}
177
178static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
179{
180 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
181 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
182 usleep_range(10000, 11000);
183 }
184
185 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
186 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
187
188 /* HW engineers overrode docs: no sleep needed on R-Car2+ */
189 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
190 usleep_range(10000, 11000);
191}
192
193static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
194 unsigned int new_clock)
195{
196 u32 clk = 0, clock;
197
198 if (new_clock == 0) {
199 tmio_mmc_clk_stop(host);
200 return;
201 }
202
203 if (host->clk_update)
204 clock = host->clk_update(host, new_clock) / 512;
205 else
206 clock = host->mmc->f_min;
207
208 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
209 clock <<= 1;
210
211 /* 1/1 clock is option */
212 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
213 clk |= 0xff;
214
215 if (host->set_clk_div)
216 host->set_clk_div(host->pdev, (clk >> 22) & 1);
217
218 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
219 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
220 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
221 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
222 usleep_range(10000, 11000);
223
224 tmio_mmc_clk_start(host);
225}
226
227static void tmio_mmc_reset(struct tmio_mmc_host *host)
228{
229 /* FIXME - should we set stop clock reg here */
230 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
231 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
232 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
233 usleep_range(10000, 11000);
234 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
235 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
236 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
237 usleep_range(10000, 11000);
238
239 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
240 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
241 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
242 }
243
244}
245
246static void tmio_mmc_reset_work(struct work_struct *work)
247{
248 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
249 delayed_reset_work.work);
250 struct mmc_request *mrq;
251 unsigned long flags;
252
253 spin_lock_irqsave(&host->lock, flags);
254 mrq = host->mrq;
255
256 /*
257 * is request already finished? Since we use a non-blocking
258 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
259 * us, so, have to check for IS_ERR(host->mrq)
260 */
261 if (IS_ERR_OR_NULL(mrq) ||
262 time_is_after_jiffies(host->last_req_ts +
263 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
264 spin_unlock_irqrestore(&host->lock, flags);
265 return;
266 }
267
268 dev_warn(&host->pdev->dev,
269 "timeout waiting for hardware interrupt (CMD%u)\n",
270 mrq->cmd->opcode);
271
272 if (host->data)
273 host->data->error = -ETIMEDOUT;
274 else if (host->cmd)
275 host->cmd->error = -ETIMEDOUT;
276 else
277 mrq->cmd->error = -ETIMEDOUT;
278
279 host->cmd = NULL;
280 host->data = NULL;
281
282 spin_unlock_irqrestore(&host->lock, flags);
283
284 tmio_mmc_reset(host);
285
286 /* Ready for new calls */
287 host->mrq = NULL;
288
289 tmio_mmc_abort_dma(host);
290 mmc_request_done(host->mmc, mrq);
291}
292
293/* These are the bitmasks the tmio chip requires to implement the MMC response
294 * types. Note that R1 and R6 are the same in this scheme. */
295#define APP_CMD 0x0040
296#define RESP_NONE 0x0300
297#define RESP_R1 0x0400
298#define RESP_R1B 0x0500
299#define RESP_R2 0x0600
300#define RESP_R3 0x0700
301#define DATA_PRESENT 0x0800
302#define TRANSFER_READ 0x1000
303#define TRANSFER_MULTI 0x2000
304#define SECURITY_CMD 0x4000
305#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
306
307static int tmio_mmc_start_command(struct tmio_mmc_host *host,
308 struct mmc_command *cmd)
309{
310 struct mmc_data *data = host->data;
311 int c = cmd->opcode;
312 u32 irq_mask = TMIO_MASK_CMD;
313
314 switch (mmc_resp_type(cmd)) {
315 case MMC_RSP_NONE: c |= RESP_NONE; break;
316 case MMC_RSP_R1:
317 case MMC_RSP_R1_NO_CRC:
318 c |= RESP_R1; break;
319 case MMC_RSP_R1B: c |= RESP_R1B; break;
320 case MMC_RSP_R2: c |= RESP_R2; break;
321 case MMC_RSP_R3: c |= RESP_R3; break;
322 default:
323 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
324 return -EINVAL;
325 }
326
327 host->cmd = cmd;
328
329/* FIXME - this seems to be ok commented out but the spec suggest this bit
330 * should be set when issuing app commands.
331 * if(cmd->flags & MMC_FLAG_ACMD)
332 * c |= APP_CMD;
333 */
334 if (data) {
335 c |= DATA_PRESENT;
336 if (data->blocks > 1) {
337 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
338 c |= TRANSFER_MULTI;
339
340 /*
341 * Disable auto CMD12 at IO_RW_EXTENDED and
342 * SET_BLOCK_COUNT when doing multiple block transfer
343 */
344 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
345 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
346 c |= NO_CMD12_ISSUE;
347 }
348 if (data->flags & MMC_DATA_READ)
349 c |= TRANSFER_READ;
350 }
351
352 tmio_mmc_enable_mmc_irqs(host, irq_mask);
353
354 /* Fire off the command */
355 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
356 sd_ctrl_write16(host, CTL_SD_CMD, c);
357
358 return 0;
359}
360
361static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
362 unsigned short *buf,
363 unsigned int count)
364{
365 int is_read = host->data->flags & MMC_DATA_READ;
366 u8 *buf8;
367
368 /*
369 * Transfer the data
370 */
371 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
372 u32 data = 0;
373 u32 *buf32 = (u32 *)buf;
374
375 if (is_read)
376 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
377 count >> 2);
378 else
379 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
380 count >> 2);
381
382 /* if count was multiple of 4 */
383 if (!(count & 0x3))
384 return;
385
386 buf32 += count >> 2;
387 count %= 4;
388
389 if (is_read) {
390 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
391 memcpy(buf32, &data, count);
392 } else {
393 memcpy(&data, buf32, count);
394 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
395 }
396
397 return;
398 }
399
400 if (is_read)
401 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
402 else
403 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
404
405 /* if count was even number */
406 if (!(count & 0x1))
407 return;
408
409 /* if count was odd number */
410 buf8 = (u8 *)(buf + (count >> 1));
411
412 /*
413 * FIXME
414 *
415 * driver and this function are assuming that
416 * it is used as little endian
417 */
418 if (is_read)
419 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
420 else
421 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
422}
423
424/*
425 * This chip always returns (at least?) as much data as you ask for.
426 * I'm unsure what happens if you ask for less than a block. This should be
427 * looked into to ensure that a funny length read doesn't hose the controller.
428 */
429static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
430{
431 struct mmc_data *data = host->data;
432 void *sg_virt;
433 unsigned short *buf;
434 unsigned int count;
435 unsigned long flags;
436
437 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
438 pr_err("PIO IRQ in DMA mode!\n");
439 return;
440 } else if (!data) {
441 pr_debug("Spurious PIO IRQ\n");
442 return;
443 }
444
445 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
446 buf = (unsigned short *)(sg_virt + host->sg_off);
447
448 count = host->sg_ptr->length - host->sg_off;
449 if (count > data->blksz)
450 count = data->blksz;
451
452 pr_debug("count: %08x offset: %08x flags %08x\n",
453 count, host->sg_off, data->flags);
454
455 /* Transfer the data */
456 tmio_mmc_transfer_data(host, buf, count);
457
458 host->sg_off += count;
459
460 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
461
462 if (host->sg_off == host->sg_ptr->length)
463 tmio_mmc_next_sg(host);
464}
465
466static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
467{
468 if (host->sg_ptr == &host->bounce_sg) {
469 unsigned long flags;
470 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
471
472 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
473 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
474 }
475}
476
477/* needs to be called with host->lock held */
478void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
479{
480 struct mmc_data *data = host->data;
481 struct mmc_command *stop;
482
483 host->data = NULL;
484
485 if (!data) {
486 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
487 return;
488 }
489 stop = data->stop;
490
491 /* FIXME - return correct transfer count on errors */
492 if (!data->error)
493 data->bytes_xfered = data->blocks * data->blksz;
494 else
495 data->bytes_xfered = 0;
496
497 pr_debug("Completed data request\n");
498
499 /*
500 * FIXME: other drivers allow an optional stop command of any given type
501 * which we dont do, as the chip can auto generate them.
502 * Perhaps we can be smarter about when to use auto CMD12 and
503 * only issue the auto request when we know this is the desired
504 * stop command, allowing fallback to the stop command the
505 * upper layers expect. For now, we do what works.
506 */
507
508 if (data->flags & MMC_DATA_READ) {
509 if (host->chan_rx && !host->force_pio)
510 tmio_mmc_check_bounce_buffer(host);
511 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
512 host->mrq);
513 } else {
514 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
515 host->mrq);
516 }
517
518 if (stop && !host->mrq->sbc) {
519 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
520 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
521 stop->opcode, stop->arg);
522
523 /* fill in response from auto CMD12 */
524 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
525
526 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
527 }
528
529 schedule_work(&host->done);
530}
531EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
532
533static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
534{
535 struct mmc_data *data;
536
537 spin_lock(&host->lock);
538 data = host->data;
539
540 if (!data)
541 goto out;
542
543 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
544 stat & TMIO_STAT_TXUNDERRUN)
545 data->error = -EILSEQ;
546 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
547 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
548 bool done = false;
549
550 /*
551 * Has all data been written out yet? Testing on SuperH showed,
552 * that in most cases the first interrupt comes already with the
553 * BUSY status bit clear, but on some operations, like mount or
554 * in the beginning of a write / sync / umount, there is one
555 * DATAEND interrupt with the BUSY bit set, in this cases
556 * waiting for one more interrupt fixes the problem.
557 */
558 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
559 if (status & TMIO_STAT_SCLKDIVEN)
560 done = true;
561 } else {
562 if (!(status & TMIO_STAT_CMD_BUSY))
563 done = true;
564 }
565
566 if (done) {
567 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
568 tmio_mmc_dataend_dma(host);
569 }
570 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
571 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
572 tmio_mmc_dataend_dma(host);
573 } else {
574 tmio_mmc_do_data_irq(host);
575 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
576 }
577out:
578 spin_unlock(&host->lock);
579}
580
581static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
582{
583 struct mmc_command *cmd = host->cmd;
584 int i, addr;
585
586 spin_lock(&host->lock);
587
588 if (!host->cmd) {
589 pr_debug("Spurious CMD irq\n");
590 goto out;
591 }
592
593 /* This controller is sicker than the PXA one. Not only do we need to
594 * drop the top 8 bits of the first response word, we also need to
595 * modify the order of the response for short response command types.
596 */
597
598 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
599 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
600
601 if (cmd->flags & MMC_RSP_136) {
602 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
603 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
604 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
605 cmd->resp[3] <<= 8;
606 } else if (cmd->flags & MMC_RSP_R3) {
607 cmd->resp[0] = cmd->resp[3];
608 }
609
610 if (stat & TMIO_STAT_CMDTIMEOUT)
611 cmd->error = -ETIMEDOUT;
612 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
613 stat & TMIO_STAT_STOPBIT_ERR ||
614 stat & TMIO_STAT_CMD_IDX_ERR)
615 cmd->error = -EILSEQ;
616
617 /* If there is data to handle we enable data IRQs here, and
618 * we will ultimatley finish the request in the data_end handler.
619 * If theres no data or we encountered an error, finish now.
620 */
621 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
622 if (host->data->flags & MMC_DATA_READ) {
623 if (host->force_pio || !host->chan_rx) {
624 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
625 } else {
626 tmio_mmc_disable_mmc_irqs(host,
627 TMIO_MASK_READOP);
628 tasklet_schedule(&host->dma_issue);
629 }
630 } else {
631 if (host->force_pio || !host->chan_tx) {
632 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
633 } else {
634 tmio_mmc_disable_mmc_irqs(host,
635 TMIO_MASK_WRITEOP);
636 tasklet_schedule(&host->dma_issue);
637 }
638 }
639 } else {
640 schedule_work(&host->done);
641 }
642
643out:
644 spin_unlock(&host->lock);
645}
646
647static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
648 int ireg, int status)
649{
650 struct mmc_host *mmc = host->mmc;
651
652 /* Card insert / remove attempts */
653 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
654 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
655 TMIO_STAT_CARD_REMOVE);
656 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
657 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
658 !work_pending(&mmc->detect.work))
659 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
660 return true;
661 }
662
663 return false;
664}
665
666static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
667 int status)
668{
669 /* Command completion */
670 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
671 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
672 TMIO_STAT_CMDTIMEOUT);
673 tmio_mmc_cmd_irq(host, status);
674 return true;
675 }
676
677 /* Data transfer */
678 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
679 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
680 tmio_mmc_pio_irq(host);
681 return true;
682 }
683
684 /* Data transfer completion */
685 if (ireg & TMIO_STAT_DATAEND) {
686 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
687 tmio_mmc_data_irq(host, status);
688 return true;
689 }
690
691 return false;
692}
693
694static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
695{
696 struct mmc_host *mmc = host->mmc;
697 struct tmio_mmc_data *pdata = host->pdata;
698 unsigned int ireg, status;
699 unsigned int sdio_status;
700
701 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
702 return;
703
704 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
705 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
706
707 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
708 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
709 sdio_status |= TMIO_SDIO_SETBITS_MASK;
710
711 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
712
713 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
714 mmc_signal_sdio_irq(mmc);
715}
716
717irqreturn_t tmio_mmc_irq(int irq, void *devid)
718{
719 struct tmio_mmc_host *host = devid;
720 unsigned int ireg, status;
721
722 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
723 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
724
725 /* Clear the status except the interrupt status */
726 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
727
728 if (__tmio_mmc_card_detect_irq(host, ireg, status))
729 return IRQ_HANDLED;
730 if (__tmio_mmc_sdcard_irq(host, ireg, status))
731 return IRQ_HANDLED;
732
733 __tmio_mmc_sdio_irq(host);
734
735 return IRQ_HANDLED;
736}
737EXPORT_SYMBOL_GPL(tmio_mmc_irq);
738
739static int tmio_mmc_start_data(struct tmio_mmc_host *host,
740 struct mmc_data *data)
741{
742 struct tmio_mmc_data *pdata = host->pdata;
743
744 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
745 data->blksz, data->blocks);
746
747 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
748 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
749 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
750 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
751
752 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
753 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
754 mmc_hostname(host->mmc), data->blksz);
755 return -EINVAL;
756 }
757 }
758
759 tmio_mmc_init_sg(host, data);
760 host->data = data;
761 host->force_pio = false;
762
763 /* Set transfer length / blocksize */
764 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
765 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
766
767 tmio_mmc_start_dma(host, data);
768
769 return 0;
770}
771
772static void tmio_mmc_hw_reset(struct mmc_host *mmc)
773{
774 struct tmio_mmc_host *host = mmc_priv(mmc);
775
776 if (host->hw_reset)
777 host->hw_reset(host);
778}
779
780static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
781{
782 struct tmio_mmc_host *host = mmc_priv(mmc);
783 int i, ret = 0;
784
785 if (!host->init_tuning || !host->select_tuning)
786 /* Tuning is not supported */
787 goto out;
788
789 host->tap_num = host->init_tuning(host);
790 if (!host->tap_num)
791 /* Tuning is not supported */
792 goto out;
793
794 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
795 dev_warn_once(&host->pdev->dev,
796 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
797 goto out;
798 }
799
800 bitmap_zero(host->taps, host->tap_num * 2);
801
802 /* Issue CMD19 twice for each tap */
803 for (i = 0; i < 2 * host->tap_num; i++) {
804 if (host->prepare_tuning)
805 host->prepare_tuning(host, i % host->tap_num);
806
807 ret = mmc_send_tuning(mmc, opcode, NULL);
808 if (ret && ret != -EILSEQ)
809 goto out;
810 if (ret == 0)
811 set_bit(i, host->taps);
812
813 usleep_range(1000, 1200);
814 }
815
816 ret = host->select_tuning(host);
817
818out:
819 if (ret < 0) {
820 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
821 tmio_mmc_hw_reset(mmc);
822 }
823
824 return ret;
825}
826
827static void tmio_process_mrq(struct tmio_mmc_host *host,
828 struct mmc_request *mrq)
829{
830 struct mmc_command *cmd;
831 int ret;
832
833 if (mrq->sbc && host->cmd != mrq->sbc) {
834 cmd = mrq->sbc;
835 } else {
836 cmd = mrq->cmd;
837 if (mrq->data) {
838 ret = tmio_mmc_start_data(host, mrq->data);
839 if (ret)
840 goto fail;
841 }
842 }
843
844 ret = tmio_mmc_start_command(host, cmd);
845 if (ret)
846 goto fail;
847
848 schedule_delayed_work(&host->delayed_reset_work,
849 msecs_to_jiffies(CMDREQ_TIMEOUT));
850 return;
851
852fail:
853 host->mrq = NULL;
854 mrq->cmd->error = ret;
855 mmc_request_done(host->mmc, mrq);
856}
857
858/* Process requests from the MMC layer */
859static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
860{
861 struct tmio_mmc_host *host = mmc_priv(mmc);
862 unsigned long flags;
863
864 spin_lock_irqsave(&host->lock, flags);
865
866 if (host->mrq) {
867 pr_debug("request not null\n");
868 if (IS_ERR(host->mrq)) {
869 spin_unlock_irqrestore(&host->lock, flags);
870 mrq->cmd->error = -EAGAIN;
871 mmc_request_done(mmc, mrq);
872 return;
873 }
874 }
875
876 host->last_req_ts = jiffies;
877 wmb();
878 host->mrq = mrq;
879
880 spin_unlock_irqrestore(&host->lock, flags);
881
882 tmio_process_mrq(host, mrq);
883}
884
885static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
886{
887 struct mmc_request *mrq;
888 unsigned long flags;
889
890 spin_lock_irqsave(&host->lock, flags);
891
892 mrq = host->mrq;
893 if (IS_ERR_OR_NULL(mrq)) {
894 spin_unlock_irqrestore(&host->lock, flags);
895 return;
896 }
897
898 /* If not SET_BLOCK_COUNT, clear old data */
899 if (host->cmd != mrq->sbc) {
900 host->cmd = NULL;
901 host->data = NULL;
902 host->mrq = NULL;
903 }
904
905 cancel_delayed_work(&host->delayed_reset_work);
906
907 spin_unlock_irqrestore(&host->lock, flags);
908
909 if (mrq->cmd->error || (mrq->data && mrq->data->error))
910 tmio_mmc_abort_dma(host);
911
912 if (host->check_scc_error)
913 host->check_scc_error(host);
914
915 /* If SET_BLOCK_COUNT, continue with main command */
916 if (host->mrq && !mrq->cmd->error) {
917 tmio_process_mrq(host, mrq);
918 return;
919 }
920
921 mmc_request_done(host->mmc, mrq);
922}
923
924static void tmio_mmc_done_work(struct work_struct *work)
925{
926 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
927 done);
928 tmio_mmc_finish_request(host);
929}
930
931static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
932{
933 struct mmc_host *mmc = host->mmc;
934 int ret = 0;
935
936 /* .set_ios() is returning void, so, no chance to report an error */
937
938 if (host->set_pwr)
939 host->set_pwr(host->pdev, 1);
940
941 if (!IS_ERR(mmc->supply.vmmc)) {
942 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
943 /*
944 * Attention: empiric value. With a b43 WiFi SDIO card this
945 * delay proved necessary for reliable card-insertion probing.
946 * 100us were not enough. Is this the same 140us delay, as in
947 * tmio_mmc_set_ios()?
948 */
949 usleep_range(200, 300);
950 }
951 /*
952 * It seems, VccQ should be switched on after Vcc, this is also what the
953 * omap_hsmmc.c driver does.
954 */
955 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
956 ret = regulator_enable(mmc->supply.vqmmc);
957 usleep_range(200, 300);
958 }
959
960 if (ret < 0)
961 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
962 ret);
963}
964
965static void tmio_mmc_power_off(struct tmio_mmc_host *host)
966{
967 struct mmc_host *mmc = host->mmc;
968
969 if (!IS_ERR(mmc->supply.vqmmc))
970 regulator_disable(mmc->supply.vqmmc);
971
972 if (!IS_ERR(mmc->supply.vmmc))
973 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
974
975 if (host->set_pwr)
976 host->set_pwr(host->pdev, 0);
977}
978
979static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
980 unsigned char bus_width)
981{
982 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
983 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
984
985 /* reg now applies to MMC_BUS_WIDTH_4 */
986 if (bus_width == MMC_BUS_WIDTH_1)
987 reg |= CARD_OPT_WIDTH;
988 else if (bus_width == MMC_BUS_WIDTH_8)
989 reg |= CARD_OPT_WIDTH8;
990
991 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
992}
993
994/* Set MMC clock / power.
995 * Note: This controller uses a simple divider scheme therefore it cannot
996 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
997 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
998 * slowest setting.
999 */
1000static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1001{
1002 struct tmio_mmc_host *host = mmc_priv(mmc);
1003 struct device *dev = &host->pdev->dev;
1004 unsigned long flags;
1005
1006 mutex_lock(&host->ios_lock);
1007
1008 spin_lock_irqsave(&host->lock, flags);
1009 if (host->mrq) {
1010 if (IS_ERR(host->mrq)) {
1011 dev_dbg(dev,
1012 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
1013 current->comm, task_pid_nr(current),
1014 ios->clock, ios->power_mode);
1015 host->mrq = ERR_PTR(-EINTR);
1016 } else {
1017 dev_dbg(dev,
1018 "%s.%d: CMD%u active since %lu, now %lu!\n",
1019 current->comm, task_pid_nr(current),
1020 host->mrq->cmd->opcode, host->last_req_ts,
1021 jiffies);
1022 }
1023 spin_unlock_irqrestore(&host->lock, flags);
1024
1025 mutex_unlock(&host->ios_lock);
1026 return;
1027 }
1028
1029 host->mrq = ERR_PTR(-EBUSY);
1030
1031 spin_unlock_irqrestore(&host->lock, flags);
1032
1033 switch (ios->power_mode) {
1034 case MMC_POWER_OFF:
1035 tmio_mmc_power_off(host);
1036 tmio_mmc_clk_stop(host);
1037 break;
1038 case MMC_POWER_UP:
1039 tmio_mmc_power_on(host, ios->vdd);
1040 tmio_mmc_set_clock(host, ios->clock);
1041 tmio_mmc_set_bus_width(host, ios->bus_width);
1042 break;
1043 case MMC_POWER_ON:
1044 tmio_mmc_set_clock(host, ios->clock);
1045 tmio_mmc_set_bus_width(host, ios->bus_width);
1046 break;
1047 }
1048
1049 /* Let things settle. delay taken from winCE driver */
1050 usleep_range(140, 200);
1051 if (PTR_ERR(host->mrq) == -EINTR)
1052 dev_dbg(&host->pdev->dev,
1053 "%s.%d: IOS interrupted: clk %u, mode %u",
1054 current->comm, task_pid_nr(current),
1055 ios->clock, ios->power_mode);
1056 host->mrq = NULL;
1057
1058 host->clk_cache = ios->clock;
1059
1060 mutex_unlock(&host->ios_lock);
1061}
1062
1063static int tmio_mmc_get_ro(struct mmc_host *mmc)
1064{
1065 struct tmio_mmc_host *host = mmc_priv(mmc);
1066
1067 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1068 TMIO_STAT_WRPROTECT);
1069}
1070
1071static int tmio_mmc_get_cd(struct mmc_host *mmc)
1072{
1073 struct tmio_mmc_host *host = mmc_priv(mmc);
1074
1075 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1076 TMIO_STAT_SIGSTATE);
1077}
1078
1079static int tmio_multi_io_quirk(struct mmc_card *card,
1080 unsigned int direction, int blk_size)
1081{
1082 struct tmio_mmc_host *host = mmc_priv(card->host);
1083
1084 if (host->multi_io_quirk)
1085 return host->multi_io_quirk(card, direction, blk_size);
1086
1087 return blk_size;
1088}
1089
1090static const struct mmc_host_ops tmio_mmc_ops = {
1091 .request = tmio_mmc_request,
1092 .set_ios = tmio_mmc_set_ios,
1093 .get_ro = tmio_mmc_get_ro,
1094 .get_cd = tmio_mmc_get_cd,
1095 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1096 .multi_io_quirk = tmio_multi_io_quirk,
1097 .hw_reset = tmio_mmc_hw_reset,
1098 .execute_tuning = tmio_mmc_execute_tuning,
1099};
1100
1101static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1102{
1103 struct tmio_mmc_data *pdata = host->pdata;
1104 struct mmc_host *mmc = host->mmc;
1105 int err;
1106
1107 err = mmc_regulator_get_supply(mmc);
1108 if (err)
1109 return err;
1110
1111 /* use ocr_mask if no regulator */
1112 if (!mmc->ocr_avail)
1113 mmc->ocr_avail = pdata->ocr_mask;
1114
1115 /*
1116 * try again.
1117 * There is possibility that regulator has not been probed
1118 */
1119 if (!mmc->ocr_avail)
1120 return -EPROBE_DEFER;
1121
1122 return 0;
1123}
1124
1125static void tmio_mmc_of_parse(struct platform_device *pdev,
1126 struct mmc_host *mmc)
1127{
1128 const struct device_node *np = pdev->dev.of_node;
1129
1130 if (!np)
1131 return;
1132
1133 /*
1134 * DEPRECATED:
1135 * For new platforms, please use "disable-wp" instead of
1136 * "toshiba,mmc-wrprotect-disable"
1137 */
1138 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1139 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1140}
1141
1142struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1143 struct tmio_mmc_data *pdata)
1144{
1145 struct tmio_mmc_host *host;
1146 struct mmc_host *mmc;
1147 struct resource *res;
1148 void __iomem *ctl;
1149 int ret;
1150
1151 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1152 ctl = devm_ioremap_resource(&pdev->dev, res);
1153 if (IS_ERR(ctl))
1154 return ERR_CAST(ctl);
1155
1156 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1157 if (!mmc)
1158 return ERR_PTR(-ENOMEM);
1159
1160 host = mmc_priv(mmc);
1161 host->ctl = ctl;
1162 host->mmc = mmc;
1163 host->pdev = pdev;
1164 host->pdata = pdata;
1165 host->ops = tmio_mmc_ops;
1166 mmc->ops = &host->ops;
1167
1168 ret = mmc_of_parse(host->mmc);
1169 if (ret) {
1170 host = ERR_PTR(ret);
1171 goto free;
1172 }
1173
1174 tmio_mmc_of_parse(pdev, mmc);
1175
1176 platform_set_drvdata(pdev, host);
1177
1178 return host;
1179free:
1180 mmc_free_host(mmc);
1181
1182 return host;
1183}
1184EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1185
1186void tmio_mmc_host_free(struct tmio_mmc_host *host)
1187{
1188 mmc_free_host(host->mmc);
1189}
1190EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1191
1192int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1193{
1194 struct platform_device *pdev = _host->pdev;
1195 struct tmio_mmc_data *pdata = _host->pdata;
1196 struct mmc_host *mmc = _host->mmc;
1197 int ret;
1198
1199 /*
1200 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1201 * looping forever...
1202 */
1203 if (mmc->f_min == 0)
1204 return -EINVAL;
1205
1206 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1207 _host->write16_hook = NULL;
1208
1209 _host->set_pwr = pdata->set_pwr;
1210 _host->set_clk_div = pdata->set_clk_div;
1211
1212 ret = tmio_mmc_init_ocr(_host);
1213 if (ret < 0)
1214 return ret;
1215
1216 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1217 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1218 if (ret)
1219 return ret;
1220 }
1221
1222 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1223 mmc->caps2 |= pdata->capabilities2;
1224 mmc->max_segs = pdata->max_segs ? : 32;
1225 mmc->max_blk_size = 512;
1226 mmc->max_blk_count = pdata->max_blk_count ? :
1227 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1228 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1229 /*
1230 * Since swiotlb has memory size limitation, this will calculate
1231 * the maximum size locally (because we don't have any APIs for it now)
1232 * and check the current max_req_size. And then, this will update
1233 * the max_req_size if needed as a workaround.
1234 */
1235 if (swiotlb_max_segment()) {
1236 unsigned int max_size = (1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
1237
1238 if (mmc->max_req_size > max_size)
1239 mmc->max_req_size = max_size;
1240 }
1241 mmc->max_seg_size = mmc->max_req_size;
1242
1243 if (mmc_can_gpio_ro(mmc))
1244 _host->ops.get_ro = mmc_gpio_get_ro;
1245
1246 if (mmc_can_gpio_cd(mmc))
1247 _host->ops.get_cd = mmc_gpio_get_cd;
1248
1249 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1250 mmc->caps & MMC_CAP_NEEDS_POLL ||
1251 !mmc_card_is_removable(mmc));
1252
1253 /*
1254 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1255 * hotplug gets disabled. It seems RuntimePM related yet we need further
1256 * research. Since we are planning a PM overhaul anyway, let's enforce
1257 * for now the device being active by enabling native hotplug always.
1258 */
1259 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1260 _host->native_hotplug = true;
1261
1262 /*
1263 * While using internal tmio hardware logic for card detection, we need
1264 * to ensure it stays powered for it to work.
1265 */
1266 if (_host->native_hotplug)
1267 pm_runtime_get_noresume(&pdev->dev);
1268
1269 _host->sdio_irq_enabled = false;
1270 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1271 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1272
1273 tmio_mmc_clk_stop(_host);
1274 tmio_mmc_reset(_host);
1275
1276 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1277 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1278
1279 if (_host->native_hotplug)
1280 tmio_mmc_enable_mmc_irqs(_host,
1281 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1282
1283 spin_lock_init(&_host->lock);
1284 mutex_init(&_host->ios_lock);
1285
1286 /* Init delayed work for request timeouts */
1287 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1288 INIT_WORK(&_host->done, tmio_mmc_done_work);
1289
1290 /* See if we also get DMA */
1291 tmio_mmc_request_dma(_host, pdata);
1292
1293 pm_runtime_set_active(&pdev->dev);
1294 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1295 pm_runtime_use_autosuspend(&pdev->dev);
1296 pm_runtime_enable(&pdev->dev);
1297
1298 ret = mmc_add_host(mmc);
1299 if (ret)
1300 goto remove_host;
1301
1302 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1303
1304 return 0;
1305
1306remove_host:
1307 tmio_mmc_host_remove(_host);
1308 return ret;
1309}
1310EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1311
1312void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1313{
1314 struct platform_device *pdev = host->pdev;
1315 struct mmc_host *mmc = host->mmc;
1316
1317 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1318 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1319
1320 if (!host->native_hotplug)
1321 pm_runtime_get_sync(&pdev->dev);
1322
1323 dev_pm_qos_hide_latency_limit(&pdev->dev);
1324
1325 mmc_remove_host(mmc);
1326 cancel_work_sync(&host->done);
1327 cancel_delayed_work_sync(&host->delayed_reset_work);
1328 tmio_mmc_release_dma(host);
1329
1330 pm_runtime_put_sync(&pdev->dev);
1331 pm_runtime_disable(&pdev->dev);
1332}
1333EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1334
1335#ifdef CONFIG_PM
1336static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1337{
1338 if (!host->clk_enable)
1339 return -ENOTSUPP;
1340
1341 return host->clk_enable(host);
1342}
1343
1344static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1345{
1346 if (host->clk_disable)
1347 host->clk_disable(host);
1348}
1349
1350int tmio_mmc_host_runtime_suspend(struct device *dev)
1351{
1352 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1353
1354 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1355
1356 if (host->clk_cache)
1357 tmio_mmc_clk_stop(host);
1358
1359 tmio_mmc_clk_disable(host);
1360
1361 return 0;
1362}
1363EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1364
1365static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1366{
1367 return host->tap_num && mmc_can_retune(host->mmc);
1368}
1369
1370int tmio_mmc_host_runtime_resume(struct device *dev)
1371{
1372 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1373
1374 tmio_mmc_reset(host);
1375 tmio_mmc_clk_enable(host);
1376
1377 if (host->clk_cache)
1378 tmio_mmc_set_clock(host, host->clk_cache);
1379
1380 if (host->native_hotplug)
1381 tmio_mmc_enable_mmc_irqs(host,
1382 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1383
1384 tmio_mmc_enable_dma(host, true);
1385
1386 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1387 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1388
1389 return 0;
1390}
1391EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1392#endif
1393
1394MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Driver for the MMC / SD / SDIO IP found in:
4 *
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6 *
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
13 *
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
17 *
18 * TODO:
19 * Investigate using a workqueue for PIO transfers
20 * Eliminate FIXMEs
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
24 *
25 */
26
27#include <linux/delay.h>
28#include <linux/device.h>
29#include <linux/dma-mapping.h>
30#include <linux/highmem.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/irq.h>
34#include <linux/mfd/tmio.h>
35#include <linux/mmc/card.h>
36#include <linux/mmc/host.h>
37#include <linux/mmc/mmc.h>
38#include <linux/mmc/slot-gpio.h>
39#include <linux/module.h>
40#include <linux/pagemap.h>
41#include <linux/platform_device.h>
42#include <linux/pm_qos.h>
43#include <linux/pm_runtime.h>
44#include <linux/regulator/consumer.h>
45#include <linux/mmc/sdio.h>
46#include <linux/scatterlist.h>
47#include <linux/sizes.h>
48#include <linux/spinlock.h>
49#include <linux/workqueue.h>
50
51#include "tmio_mmc.h"
52
53static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 struct mmc_data *data)
55{
56 if (host->dma_ops)
57 host->dma_ops->start(host, data);
58}
59
60static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
61{
62 if (host->dma_ops)
63 host->dma_ops->enable(host, enable);
64}
65
66static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
67 struct tmio_mmc_data *pdata)
68{
69 if (host->dma_ops) {
70 host->dma_ops->request(host, pdata);
71 } else {
72 host->chan_tx = NULL;
73 host->chan_rx = NULL;
74 }
75}
76
77static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
78{
79 if (host->dma_ops)
80 host->dma_ops->release(host);
81}
82
83static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
84{
85 if (host->dma_ops)
86 host->dma_ops->abort(host);
87}
88
89static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
90{
91 if (host->dma_ops)
92 host->dma_ops->dataend(host);
93}
94
95void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
96{
97 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
98 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
99}
100EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
101
102void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
103{
104 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
105 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
106}
107EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
108
109static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
110{
111 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
112}
113
114static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
115{
116 host->sg_len = data->sg_len;
117 host->sg_ptr = data->sg;
118 host->sg_orig = data->sg;
119 host->sg_off = 0;
120}
121
122static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
123{
124 host->sg_ptr = sg_next(host->sg_ptr);
125 host->sg_off = 0;
126 return --host->sg_len;
127}
128
129#define CMDREQ_TIMEOUT 5000
130
131static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
132{
133 struct tmio_mmc_host *host = mmc_priv(mmc);
134
135 if (enable && !host->sdio_irq_enabled) {
136 u16 sdio_status;
137
138 /* Keep device active while SDIO irq is enabled */
139 pm_runtime_get_sync(mmc_dev(mmc));
140
141 host->sdio_irq_enabled = true;
142 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
143
144 /* Clear obsolete interrupts before enabling */
145 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
146 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
147 sdio_status |= TMIO_SDIO_SETBITS_MASK;
148 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
149
150 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
151 } else if (!enable && host->sdio_irq_enabled) {
152 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
153 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
154
155 host->sdio_irq_enabled = false;
156 pm_runtime_mark_last_busy(mmc_dev(mmc));
157 pm_runtime_put_autosuspend(mmc_dev(mmc));
158 }
159}
160
161static void tmio_mmc_reset(struct tmio_mmc_host *host)
162{
163 /* FIXME - should we set stop clock reg here */
164 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
165 usleep_range(10000, 11000);
166 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
167 usleep_range(10000, 11000);
168
169 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
170 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
171 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
172 }
173}
174
175static void tmio_mmc_hw_reset(struct mmc_host *mmc)
176{
177 struct tmio_mmc_host *host = mmc_priv(mmc);
178
179 host->reset(host);
180
181 tmio_mmc_abort_dma(host);
182
183 if (host->hw_reset)
184 host->hw_reset(host);
185}
186
187static void tmio_mmc_reset_work(struct work_struct *work)
188{
189 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
190 delayed_reset_work.work);
191 struct mmc_request *mrq;
192 unsigned long flags;
193
194 spin_lock_irqsave(&host->lock, flags);
195 mrq = host->mrq;
196
197 /*
198 * is request already finished? Since we use a non-blocking
199 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
200 * us, so, have to check for IS_ERR(host->mrq)
201 */
202 if (IS_ERR_OR_NULL(mrq) ||
203 time_is_after_jiffies(host->last_req_ts +
204 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
205 spin_unlock_irqrestore(&host->lock, flags);
206 return;
207 }
208
209 dev_warn(&host->pdev->dev,
210 "timeout waiting for hardware interrupt (CMD%u)\n",
211 mrq->cmd->opcode);
212
213 if (host->data)
214 host->data->error = -ETIMEDOUT;
215 else if (host->cmd)
216 host->cmd->error = -ETIMEDOUT;
217 else
218 mrq->cmd->error = -ETIMEDOUT;
219
220 host->cmd = NULL;
221 host->data = NULL;
222
223 spin_unlock_irqrestore(&host->lock, flags);
224
225 tmio_mmc_hw_reset(host->mmc);
226
227 /* Ready for new calls */
228 host->mrq = NULL;
229
230 mmc_request_done(host->mmc, mrq);
231}
232
233/* These are the bitmasks the tmio chip requires to implement the MMC response
234 * types. Note that R1 and R6 are the same in this scheme. */
235#define APP_CMD 0x0040
236#define RESP_NONE 0x0300
237#define RESP_R1 0x0400
238#define RESP_R1B 0x0500
239#define RESP_R2 0x0600
240#define RESP_R3 0x0700
241#define DATA_PRESENT 0x0800
242#define TRANSFER_READ 0x1000
243#define TRANSFER_MULTI 0x2000
244#define SECURITY_CMD 0x4000
245#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
246
247static int tmio_mmc_start_command(struct tmio_mmc_host *host,
248 struct mmc_command *cmd)
249{
250 struct mmc_data *data = host->data;
251 int c = cmd->opcode;
252
253 switch (mmc_resp_type(cmd)) {
254 case MMC_RSP_NONE: c |= RESP_NONE; break;
255 case MMC_RSP_R1:
256 case MMC_RSP_R1_NO_CRC:
257 c |= RESP_R1; break;
258 case MMC_RSP_R1B: c |= RESP_R1B; break;
259 case MMC_RSP_R2: c |= RESP_R2; break;
260 case MMC_RSP_R3: c |= RESP_R3; break;
261 default:
262 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
263 return -EINVAL;
264 }
265
266 host->cmd = cmd;
267
268/* FIXME - this seems to be ok commented out but the spec suggest this bit
269 * should be set when issuing app commands.
270 * if(cmd->flags & MMC_FLAG_ACMD)
271 * c |= APP_CMD;
272 */
273 if (data) {
274 c |= DATA_PRESENT;
275 if (data->blocks > 1) {
276 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
277 c |= TRANSFER_MULTI;
278
279 /*
280 * Disable auto CMD12 at IO_RW_EXTENDED and
281 * SET_BLOCK_COUNT when doing multiple block transfer
282 */
283 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
284 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
285 c |= NO_CMD12_ISSUE;
286 }
287 if (data->flags & MMC_DATA_READ)
288 c |= TRANSFER_READ;
289 }
290
291 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
292
293 /* Fire off the command */
294 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
295 sd_ctrl_write16(host, CTL_SD_CMD, c);
296
297 return 0;
298}
299
300static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
301 unsigned short *buf,
302 unsigned int count)
303{
304 int is_read = host->data->flags & MMC_DATA_READ;
305 u8 *buf8;
306
307 /*
308 * Transfer the data
309 */
310 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
311 u32 data = 0;
312 u32 *buf32 = (u32 *)buf;
313
314 if (is_read)
315 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
316 count >> 2);
317 else
318 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
319 count >> 2);
320
321 /* if count was multiple of 4 */
322 if (!(count & 0x3))
323 return;
324
325 buf32 += count >> 2;
326 count %= 4;
327
328 if (is_read) {
329 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
330 memcpy(buf32, &data, count);
331 } else {
332 memcpy(&data, buf32, count);
333 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
334 }
335
336 return;
337 }
338
339 if (is_read)
340 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
341 else
342 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
343
344 /* if count was even number */
345 if (!(count & 0x1))
346 return;
347
348 /* if count was odd number */
349 buf8 = (u8 *)(buf + (count >> 1));
350
351 /*
352 * FIXME
353 *
354 * driver and this function are assuming that
355 * it is used as little endian
356 */
357 if (is_read)
358 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
359 else
360 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
361}
362
363/*
364 * This chip always returns (at least?) as much data as you ask for.
365 * I'm unsure what happens if you ask for less than a block. This should be
366 * looked into to ensure that a funny length read doesn't hose the controller.
367 */
368static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
369{
370 struct mmc_data *data = host->data;
371 void *sg_virt;
372 unsigned short *buf;
373 unsigned int count;
374 unsigned long flags;
375
376 if (host->dma_on) {
377 pr_err("PIO IRQ in DMA mode!\n");
378 return;
379 } else if (!data) {
380 pr_debug("Spurious PIO IRQ\n");
381 return;
382 }
383
384 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
385 buf = (unsigned short *)(sg_virt + host->sg_off);
386
387 count = host->sg_ptr->length - host->sg_off;
388 if (count > data->blksz)
389 count = data->blksz;
390
391 pr_debug("count: %08x offset: %08x flags %08x\n",
392 count, host->sg_off, data->flags);
393
394 /* Transfer the data */
395 tmio_mmc_transfer_data(host, buf, count);
396
397 host->sg_off += count;
398
399 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
400
401 if (host->sg_off == host->sg_ptr->length)
402 tmio_mmc_next_sg(host);
403}
404
405static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
406{
407 if (host->sg_ptr == &host->bounce_sg) {
408 unsigned long flags;
409 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
410
411 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
412 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
413 }
414}
415
416/* needs to be called with host->lock held */
417void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
418{
419 struct mmc_data *data = host->data;
420 struct mmc_command *stop;
421
422 host->data = NULL;
423
424 if (!data) {
425 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
426 return;
427 }
428 stop = data->stop;
429
430 /* FIXME - return correct transfer count on errors */
431 if (!data->error)
432 data->bytes_xfered = data->blocks * data->blksz;
433 else
434 data->bytes_xfered = 0;
435
436 pr_debug("Completed data request\n");
437
438 /*
439 * FIXME: other drivers allow an optional stop command of any given type
440 * which we dont do, as the chip can auto generate them.
441 * Perhaps we can be smarter about when to use auto CMD12 and
442 * only issue the auto request when we know this is the desired
443 * stop command, allowing fallback to the stop command the
444 * upper layers expect. For now, we do what works.
445 */
446
447 if (data->flags & MMC_DATA_READ) {
448 if (host->dma_on)
449 tmio_mmc_check_bounce_buffer(host);
450 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
451 host->mrq);
452 } else {
453 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
454 host->mrq);
455 }
456
457 if (stop && !host->mrq->sbc) {
458 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
459 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
460 stop->opcode, stop->arg);
461
462 /* fill in response from auto CMD12 */
463 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
464
465 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
466 }
467
468 schedule_work(&host->done);
469}
470EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
471
472static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
473{
474 struct mmc_data *data;
475
476 spin_lock(&host->lock);
477 data = host->data;
478
479 if (!data)
480 goto out;
481
482 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
483 stat & TMIO_STAT_TXUNDERRUN)
484 data->error = -EILSEQ;
485 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
486 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
487 bool done = false;
488
489 /*
490 * Has all data been written out yet? Testing on SuperH showed,
491 * that in most cases the first interrupt comes already with the
492 * BUSY status bit clear, but on some operations, like mount or
493 * in the beginning of a write / sync / umount, there is one
494 * DATAEND interrupt with the BUSY bit set, in this cases
495 * waiting for one more interrupt fixes the problem.
496 */
497 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
498 if (status & TMIO_STAT_SCLKDIVEN)
499 done = true;
500 } else {
501 if (!(status & TMIO_STAT_CMD_BUSY))
502 done = true;
503 }
504
505 if (done) {
506 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
507 tmio_mmc_dataend_dma(host);
508 }
509 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
510 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
511 tmio_mmc_dataend_dma(host);
512 } else {
513 tmio_mmc_do_data_irq(host);
514 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
515 }
516out:
517 spin_unlock(&host->lock);
518}
519
520static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
521{
522 struct mmc_command *cmd = host->cmd;
523 int i, addr;
524
525 spin_lock(&host->lock);
526
527 if (!host->cmd) {
528 pr_debug("Spurious CMD irq\n");
529 goto out;
530 }
531
532 /* This controller is sicker than the PXA one. Not only do we need to
533 * drop the top 8 bits of the first response word, we also need to
534 * modify the order of the response for short response command types.
535 */
536
537 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
538 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
539
540 if (cmd->flags & MMC_RSP_136) {
541 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
542 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
543 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
544 cmd->resp[3] <<= 8;
545 } else if (cmd->flags & MMC_RSP_R3) {
546 cmd->resp[0] = cmd->resp[3];
547 }
548
549 if (stat & TMIO_STAT_CMDTIMEOUT)
550 cmd->error = -ETIMEDOUT;
551 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
552 stat & TMIO_STAT_STOPBIT_ERR ||
553 stat & TMIO_STAT_CMD_IDX_ERR)
554 cmd->error = -EILSEQ;
555
556 /* If there is data to handle we enable data IRQs here, and
557 * we will ultimatley finish the request in the data_end handler.
558 * If theres no data or we encountered an error, finish now.
559 */
560 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
561 if (host->data->flags & MMC_DATA_READ) {
562 if (!host->dma_on) {
563 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
564 } else {
565 tmio_mmc_disable_mmc_irqs(host,
566 TMIO_MASK_READOP);
567 tasklet_schedule(&host->dma_issue);
568 }
569 } else {
570 if (!host->dma_on) {
571 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
572 } else {
573 tmio_mmc_disable_mmc_irqs(host,
574 TMIO_MASK_WRITEOP);
575 tasklet_schedule(&host->dma_issue);
576 }
577 }
578 } else {
579 schedule_work(&host->done);
580 }
581
582out:
583 spin_unlock(&host->lock);
584}
585
586static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
587 int ireg, int status)
588{
589 struct mmc_host *mmc = host->mmc;
590
591 /* Card insert / remove attempts */
592 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
593 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
594 TMIO_STAT_CARD_REMOVE);
595 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
596 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
597 !work_pending(&mmc->detect.work))
598 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
599 return true;
600 }
601
602 return false;
603}
604
605static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
606 int status)
607{
608 /* Command completion */
609 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
610 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
611 TMIO_STAT_CMDTIMEOUT);
612 tmio_mmc_cmd_irq(host, status);
613 return true;
614 }
615
616 /* Data transfer */
617 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
618 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
619 tmio_mmc_pio_irq(host);
620 return true;
621 }
622
623 /* Data transfer completion */
624 if (ireg & TMIO_STAT_DATAEND) {
625 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
626 tmio_mmc_data_irq(host, status);
627 return true;
628 }
629
630 return false;
631}
632
633static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
634{
635 struct mmc_host *mmc = host->mmc;
636 struct tmio_mmc_data *pdata = host->pdata;
637 unsigned int ireg, status;
638 unsigned int sdio_status;
639
640 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
641 return false;
642
643 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
644 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
645
646 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
647 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
648 sdio_status |= TMIO_SDIO_SETBITS_MASK;
649
650 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
651
652 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
653 mmc_signal_sdio_irq(mmc);
654
655 return ireg;
656}
657
658irqreturn_t tmio_mmc_irq(int irq, void *devid)
659{
660 struct tmio_mmc_host *host = devid;
661 unsigned int ireg, status;
662
663 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
664 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
665
666 /* Clear the status except the interrupt status */
667 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
668
669 if (__tmio_mmc_card_detect_irq(host, ireg, status))
670 return IRQ_HANDLED;
671 if (__tmio_mmc_sdcard_irq(host, ireg, status))
672 return IRQ_HANDLED;
673
674 if (__tmio_mmc_sdio_irq(host))
675 return IRQ_HANDLED;
676
677 return IRQ_NONE;
678}
679EXPORT_SYMBOL_GPL(tmio_mmc_irq);
680
681static int tmio_mmc_start_data(struct tmio_mmc_host *host,
682 struct mmc_data *data)
683{
684 struct tmio_mmc_data *pdata = host->pdata;
685
686 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
687 data->blksz, data->blocks);
688
689 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
690 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
691 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
692 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
693
694 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
695 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
696 mmc_hostname(host->mmc), data->blksz);
697 return -EINVAL;
698 }
699 }
700
701 tmio_mmc_init_sg(host, data);
702 host->data = data;
703 host->dma_on = false;
704
705 /* Set transfer length / blocksize */
706 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
707 if (host->mmc->max_blk_count >= SZ_64K)
708 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
709 else
710 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
711
712 tmio_mmc_start_dma(host, data);
713
714 return 0;
715}
716
717static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
718{
719 struct tmio_mmc_host *host = mmc_priv(mmc);
720 int i, ret = 0;
721
722 if (!host->init_tuning || !host->select_tuning)
723 /* Tuning is not supported */
724 goto out;
725
726 host->tap_num = host->init_tuning(host);
727 if (!host->tap_num)
728 /* Tuning is not supported */
729 goto out;
730
731 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
732 dev_warn_once(&host->pdev->dev,
733 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
734 goto out;
735 }
736
737 bitmap_zero(host->taps, host->tap_num * 2);
738
739 /* Issue CMD19 twice for each tap */
740 for (i = 0; i < 2 * host->tap_num; i++) {
741 if (host->prepare_tuning)
742 host->prepare_tuning(host, i % host->tap_num);
743
744 ret = mmc_send_tuning(mmc, opcode, NULL);
745 if (ret == 0)
746 set_bit(i, host->taps);
747 }
748
749 ret = host->select_tuning(host);
750
751out:
752 if (ret < 0) {
753 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
754 tmio_mmc_hw_reset(mmc);
755 }
756
757 return ret;
758}
759
760static void tmio_process_mrq(struct tmio_mmc_host *host,
761 struct mmc_request *mrq)
762{
763 struct mmc_command *cmd;
764 int ret;
765
766 if (mrq->sbc && host->cmd != mrq->sbc) {
767 cmd = mrq->sbc;
768 } else {
769 cmd = mrq->cmd;
770 if (mrq->data) {
771 ret = tmio_mmc_start_data(host, mrq->data);
772 if (ret)
773 goto fail;
774 }
775 }
776
777 ret = tmio_mmc_start_command(host, cmd);
778 if (ret)
779 goto fail;
780
781 schedule_delayed_work(&host->delayed_reset_work,
782 msecs_to_jiffies(CMDREQ_TIMEOUT));
783 return;
784
785fail:
786 host->mrq = NULL;
787 mrq->cmd->error = ret;
788 mmc_request_done(host->mmc, mrq);
789}
790
791/* Process requests from the MMC layer */
792static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
793{
794 struct tmio_mmc_host *host = mmc_priv(mmc);
795 unsigned long flags;
796
797 spin_lock_irqsave(&host->lock, flags);
798
799 if (host->mrq) {
800 pr_debug("request not null\n");
801 if (IS_ERR(host->mrq)) {
802 spin_unlock_irqrestore(&host->lock, flags);
803 mrq->cmd->error = -EAGAIN;
804 mmc_request_done(mmc, mrq);
805 return;
806 }
807 }
808
809 host->last_req_ts = jiffies;
810 wmb();
811 host->mrq = mrq;
812
813 spin_unlock_irqrestore(&host->lock, flags);
814
815 tmio_process_mrq(host, mrq);
816}
817
818static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
819{
820 struct mmc_request *mrq;
821 unsigned long flags;
822
823 spin_lock_irqsave(&host->lock, flags);
824
825 mrq = host->mrq;
826 if (IS_ERR_OR_NULL(mrq)) {
827 spin_unlock_irqrestore(&host->lock, flags);
828 return;
829 }
830
831 /* If not SET_BLOCK_COUNT, clear old data */
832 if (host->cmd != mrq->sbc) {
833 host->cmd = NULL;
834 host->data = NULL;
835 host->mrq = NULL;
836 }
837
838 cancel_delayed_work(&host->delayed_reset_work);
839
840 spin_unlock_irqrestore(&host->lock, flags);
841
842 if (mrq->cmd->error || (mrq->data && mrq->data->error))
843 tmio_mmc_abort_dma(host);
844
845 /* SCC error means retune, but executed command was still successful */
846 if (host->check_scc_error && host->check_scc_error(host))
847 mmc_retune_needed(host->mmc);
848
849 /* If SET_BLOCK_COUNT, continue with main command */
850 if (host->mrq && !mrq->cmd->error) {
851 tmio_process_mrq(host, mrq);
852 return;
853 }
854
855 mmc_request_done(host->mmc, mrq);
856}
857
858static void tmio_mmc_done_work(struct work_struct *work)
859{
860 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
861 done);
862 tmio_mmc_finish_request(host);
863}
864
865static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
866{
867 struct mmc_host *mmc = host->mmc;
868 int ret = 0;
869
870 /* .set_ios() is returning void, so, no chance to report an error */
871
872 if (host->set_pwr)
873 host->set_pwr(host->pdev, 1);
874
875 if (!IS_ERR(mmc->supply.vmmc)) {
876 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
877 /*
878 * Attention: empiric value. With a b43 WiFi SDIO card this
879 * delay proved necessary for reliable card-insertion probing.
880 * 100us were not enough. Is this the same 140us delay, as in
881 * tmio_mmc_set_ios()?
882 */
883 usleep_range(200, 300);
884 }
885 /*
886 * It seems, VccQ should be switched on after Vcc, this is also what the
887 * omap_hsmmc.c driver does.
888 */
889 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
890 ret = regulator_enable(mmc->supply.vqmmc);
891 usleep_range(200, 300);
892 }
893
894 if (ret < 0)
895 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
896 ret);
897}
898
899static void tmio_mmc_power_off(struct tmio_mmc_host *host)
900{
901 struct mmc_host *mmc = host->mmc;
902
903 if (!IS_ERR(mmc->supply.vqmmc))
904 regulator_disable(mmc->supply.vqmmc);
905
906 if (!IS_ERR(mmc->supply.vmmc))
907 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
908
909 if (host->set_pwr)
910 host->set_pwr(host->pdev, 0);
911}
912
913static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
914 unsigned char bus_width)
915{
916 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
917 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
918
919 /* reg now applies to MMC_BUS_WIDTH_4 */
920 if (bus_width == MMC_BUS_WIDTH_1)
921 reg |= CARD_OPT_WIDTH;
922 else if (bus_width == MMC_BUS_WIDTH_8)
923 reg |= CARD_OPT_WIDTH8;
924
925 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
926}
927
928/* Set MMC clock / power.
929 * Note: This controller uses a simple divider scheme therefore it cannot
930 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
931 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
932 * slowest setting.
933 */
934static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
935{
936 struct tmio_mmc_host *host = mmc_priv(mmc);
937 struct device *dev = &host->pdev->dev;
938 unsigned long flags;
939
940 mutex_lock(&host->ios_lock);
941
942 spin_lock_irqsave(&host->lock, flags);
943 if (host->mrq) {
944 if (IS_ERR(host->mrq)) {
945 dev_dbg(dev,
946 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
947 current->comm, task_pid_nr(current),
948 ios->clock, ios->power_mode);
949 host->mrq = ERR_PTR(-EINTR);
950 } else {
951 dev_dbg(dev,
952 "%s.%d: CMD%u active since %lu, now %lu!\n",
953 current->comm, task_pid_nr(current),
954 host->mrq->cmd->opcode, host->last_req_ts,
955 jiffies);
956 }
957 spin_unlock_irqrestore(&host->lock, flags);
958
959 mutex_unlock(&host->ios_lock);
960 return;
961 }
962
963 host->mrq = ERR_PTR(-EBUSY);
964
965 spin_unlock_irqrestore(&host->lock, flags);
966
967 switch (ios->power_mode) {
968 case MMC_POWER_OFF:
969 tmio_mmc_power_off(host);
970 host->set_clock(host, 0);
971 break;
972 case MMC_POWER_UP:
973 tmio_mmc_power_on(host, ios->vdd);
974 host->set_clock(host, ios->clock);
975 tmio_mmc_set_bus_width(host, ios->bus_width);
976 break;
977 case MMC_POWER_ON:
978 host->set_clock(host, ios->clock);
979 tmio_mmc_set_bus_width(host, ios->bus_width);
980 break;
981 }
982
983 /* Let things settle. delay taken from winCE driver */
984 usleep_range(140, 200);
985 if (PTR_ERR(host->mrq) == -EINTR)
986 dev_dbg(&host->pdev->dev,
987 "%s.%d: IOS interrupted: clk %u, mode %u",
988 current->comm, task_pid_nr(current),
989 ios->clock, ios->power_mode);
990 host->mrq = NULL;
991
992 host->clk_cache = ios->clock;
993
994 mutex_unlock(&host->ios_lock);
995}
996
997static int tmio_mmc_get_ro(struct mmc_host *mmc)
998{
999 struct tmio_mmc_host *host = mmc_priv(mmc);
1000
1001 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1002 TMIO_STAT_WRPROTECT);
1003}
1004
1005static int tmio_mmc_get_cd(struct mmc_host *mmc)
1006{
1007 struct tmio_mmc_host *host = mmc_priv(mmc);
1008
1009 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1010 TMIO_STAT_SIGSTATE);
1011}
1012
1013static int tmio_multi_io_quirk(struct mmc_card *card,
1014 unsigned int direction, int blk_size)
1015{
1016 struct tmio_mmc_host *host = mmc_priv(card->host);
1017
1018 if (host->multi_io_quirk)
1019 return host->multi_io_quirk(card, direction, blk_size);
1020
1021 return blk_size;
1022}
1023
1024static int tmio_mmc_prepare_hs400_tuning(struct mmc_host *mmc,
1025 struct mmc_ios *ios)
1026{
1027 struct tmio_mmc_host *host = mmc_priv(mmc);
1028
1029 if (host->prepare_hs400_tuning)
1030 host->prepare_hs400_tuning(host);
1031
1032 return 0;
1033}
1034
1035static void tmio_mmc_hs400_downgrade(struct mmc_host *mmc)
1036{
1037 struct tmio_mmc_host *host = mmc_priv(mmc);
1038
1039 if (host->hs400_downgrade)
1040 host->hs400_downgrade(host);
1041}
1042
1043static void tmio_mmc_hs400_complete(struct mmc_host *mmc)
1044{
1045 struct tmio_mmc_host *host = mmc_priv(mmc);
1046
1047 if (host->hs400_complete)
1048 host->hs400_complete(host);
1049}
1050
1051static const struct mmc_host_ops tmio_mmc_ops = {
1052 .request = tmio_mmc_request,
1053 .set_ios = tmio_mmc_set_ios,
1054 .get_ro = tmio_mmc_get_ro,
1055 .get_cd = tmio_mmc_get_cd,
1056 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1057 .multi_io_quirk = tmio_multi_io_quirk,
1058 .hw_reset = tmio_mmc_hw_reset,
1059 .execute_tuning = tmio_mmc_execute_tuning,
1060 .prepare_hs400_tuning = tmio_mmc_prepare_hs400_tuning,
1061 .hs400_downgrade = tmio_mmc_hs400_downgrade,
1062 .hs400_complete = tmio_mmc_hs400_complete,
1063};
1064
1065static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1066{
1067 struct tmio_mmc_data *pdata = host->pdata;
1068 struct mmc_host *mmc = host->mmc;
1069 int err;
1070
1071 err = mmc_regulator_get_supply(mmc);
1072 if (err)
1073 return err;
1074
1075 /* use ocr_mask if no regulator */
1076 if (!mmc->ocr_avail)
1077 mmc->ocr_avail = pdata->ocr_mask;
1078
1079 /*
1080 * try again.
1081 * There is possibility that regulator has not been probed
1082 */
1083 if (!mmc->ocr_avail)
1084 return -EPROBE_DEFER;
1085
1086 return 0;
1087}
1088
1089static void tmio_mmc_of_parse(struct platform_device *pdev,
1090 struct mmc_host *mmc)
1091{
1092 const struct device_node *np = pdev->dev.of_node;
1093
1094 if (!np)
1095 return;
1096
1097 /*
1098 * DEPRECATED:
1099 * For new platforms, please use "disable-wp" instead of
1100 * "toshiba,mmc-wrprotect-disable"
1101 */
1102 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1103 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1104}
1105
1106struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1107 struct tmio_mmc_data *pdata)
1108{
1109 struct tmio_mmc_host *host;
1110 struct mmc_host *mmc;
1111 struct resource *res;
1112 void __iomem *ctl;
1113 int ret;
1114
1115 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1116 ctl = devm_ioremap_resource(&pdev->dev, res);
1117 if (IS_ERR(ctl))
1118 return ERR_CAST(ctl);
1119
1120 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1121 if (!mmc)
1122 return ERR_PTR(-ENOMEM);
1123
1124 host = mmc_priv(mmc);
1125 host->ctl = ctl;
1126 host->mmc = mmc;
1127 host->pdev = pdev;
1128 host->pdata = pdata;
1129 host->ops = tmio_mmc_ops;
1130 mmc->ops = &host->ops;
1131
1132 ret = mmc_of_parse(host->mmc);
1133 if (ret) {
1134 host = ERR_PTR(ret);
1135 goto free;
1136 }
1137
1138 tmio_mmc_of_parse(pdev, mmc);
1139
1140 platform_set_drvdata(pdev, host);
1141
1142 return host;
1143free:
1144 mmc_free_host(mmc);
1145
1146 return host;
1147}
1148EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1149
1150void tmio_mmc_host_free(struct tmio_mmc_host *host)
1151{
1152 mmc_free_host(host->mmc);
1153}
1154EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1155
1156int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1157{
1158 struct platform_device *pdev = _host->pdev;
1159 struct tmio_mmc_data *pdata = _host->pdata;
1160 struct mmc_host *mmc = _host->mmc;
1161 int ret;
1162
1163 /*
1164 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1165 * looping forever...
1166 */
1167 if (mmc->f_min == 0)
1168 return -EINVAL;
1169
1170 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1171 _host->write16_hook = NULL;
1172
1173 _host->set_pwr = pdata->set_pwr;
1174
1175 ret = tmio_mmc_init_ocr(_host);
1176 if (ret < 0)
1177 return ret;
1178
1179 /*
1180 * Look for a card detect GPIO, if it fails with anything
1181 * else than a probe deferral, just live without it.
1182 */
1183 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0, NULL);
1184 if (ret == -EPROBE_DEFER)
1185 return ret;
1186
1187 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1188 mmc->caps2 |= pdata->capabilities2;
1189 mmc->max_segs = pdata->max_segs ? : 32;
1190 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1191 mmc->max_blk_count = pdata->max_blk_count ? :
1192 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1193 mmc->max_req_size = min_t(size_t,
1194 mmc->max_blk_size * mmc->max_blk_count,
1195 dma_max_mapping_size(&pdev->dev));
1196 mmc->max_seg_size = mmc->max_req_size;
1197
1198 if (mmc_can_gpio_ro(mmc))
1199 _host->ops.get_ro = mmc_gpio_get_ro;
1200
1201 if (mmc_can_gpio_cd(mmc))
1202 _host->ops.get_cd = mmc_gpio_get_cd;
1203
1204 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1205 mmc->caps & MMC_CAP_NEEDS_POLL ||
1206 !mmc_card_is_removable(mmc));
1207
1208 if (!_host->reset)
1209 _host->reset = tmio_mmc_reset;
1210
1211 /*
1212 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1213 * hotplug gets disabled. It seems RuntimePM related yet we need further
1214 * research. Since we are planning a PM overhaul anyway, let's enforce
1215 * for now the device being active by enabling native hotplug always.
1216 */
1217 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1218 _host->native_hotplug = true;
1219
1220 /*
1221 * While using internal tmio hardware logic for card detection, we need
1222 * to ensure it stays powered for it to work.
1223 */
1224 if (_host->native_hotplug)
1225 pm_runtime_get_noresume(&pdev->dev);
1226
1227 _host->sdio_irq_enabled = false;
1228 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1229 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1230
1231 _host->set_clock(_host, 0);
1232 tmio_mmc_hw_reset(mmc);
1233
1234 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1235 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1236
1237 if (_host->native_hotplug)
1238 tmio_mmc_enable_mmc_irqs(_host,
1239 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1240
1241 spin_lock_init(&_host->lock);
1242 mutex_init(&_host->ios_lock);
1243
1244 /* Init delayed work for request timeouts */
1245 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1246 INIT_WORK(&_host->done, tmio_mmc_done_work);
1247
1248 /* See if we also get DMA */
1249 tmio_mmc_request_dma(_host, pdata);
1250
1251 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1252 pm_runtime_use_autosuspend(&pdev->dev);
1253 pm_runtime_enable(&pdev->dev);
1254 pm_runtime_get_sync(&pdev->dev);
1255
1256 ret = mmc_add_host(mmc);
1257 if (ret)
1258 goto remove_host;
1259
1260 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1261 pm_runtime_put(&pdev->dev);
1262
1263 return 0;
1264
1265remove_host:
1266 pm_runtime_put_noidle(&pdev->dev);
1267 tmio_mmc_host_remove(_host);
1268 return ret;
1269}
1270EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1271
1272void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1273{
1274 struct platform_device *pdev = host->pdev;
1275 struct mmc_host *mmc = host->mmc;
1276
1277 pm_runtime_get_sync(&pdev->dev);
1278
1279 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1280 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1281
1282 dev_pm_qos_hide_latency_limit(&pdev->dev);
1283
1284 mmc_remove_host(mmc);
1285 cancel_work_sync(&host->done);
1286 cancel_delayed_work_sync(&host->delayed_reset_work);
1287 tmio_mmc_release_dma(host);
1288
1289 pm_runtime_dont_use_autosuspend(&pdev->dev);
1290 if (host->native_hotplug)
1291 pm_runtime_put_noidle(&pdev->dev);
1292 pm_runtime_put_sync(&pdev->dev);
1293 pm_runtime_disable(&pdev->dev);
1294}
1295EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1296
1297#ifdef CONFIG_PM
1298static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1299{
1300 if (!host->clk_enable)
1301 return -ENOTSUPP;
1302
1303 return host->clk_enable(host);
1304}
1305
1306static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1307{
1308 if (host->clk_disable)
1309 host->clk_disable(host);
1310}
1311
1312int tmio_mmc_host_runtime_suspend(struct device *dev)
1313{
1314 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1315
1316 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1317
1318 if (host->clk_cache)
1319 host->set_clock(host, 0);
1320
1321 tmio_mmc_clk_disable(host);
1322
1323 return 0;
1324}
1325EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1326
1327static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1328{
1329 return host->tap_num && mmc_can_retune(host->mmc);
1330}
1331
1332int tmio_mmc_host_runtime_resume(struct device *dev)
1333{
1334 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1335
1336 if (!host->runtime_synced) {
1337 host->runtime_synced = true;
1338 return 0;
1339 }
1340
1341 tmio_mmc_clk_enable(host);
1342 tmio_mmc_hw_reset(host->mmc);
1343
1344 if (host->clk_cache)
1345 host->set_clock(host, host->clk_cache);
1346
1347 if (host->native_hotplug)
1348 tmio_mmc_enable_mmc_irqs(host,
1349 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1350
1351 tmio_mmc_enable_dma(host, true);
1352
1353 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1354 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1355
1356 return 0;
1357}
1358EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1359#endif
1360
1361MODULE_LICENSE("GPL v2");