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v4.17
  1// SPDX-License-Identifier: GPL-2.0+
  2//
  3// Security related flags and so on.
  4//
  5// Copyright 2018, Michael Ellerman, IBM Corporation.
  6
 
  7#include <linux/kernel.h>
  8#include <linux/device.h>
  9#include <linux/seq_buf.h>
 10
 
 
 11#include <asm/debugfs.h>
 12#include <asm/security_features.h>
 
 13
 14
 15unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
 16
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 17ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
 18{
 19	bool thread_priv;
 20
 21	thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
 22
 23	if (rfi_flush || thread_priv) {
 24		struct seq_buf s;
 25		seq_buf_init(&s, buf, PAGE_SIZE - 1);
 26
 27		seq_buf_printf(&s, "Mitigation: ");
 28
 29		if (rfi_flush)
 30			seq_buf_printf(&s, "RFI Flush");
 31
 32		if (rfi_flush && thread_priv)
 33			seq_buf_printf(&s, ", ");
 34
 35		if (thread_priv)
 36			seq_buf_printf(&s, "L1D private per thread");
 37
 38		seq_buf_printf(&s, "\n");
 39
 40		return s.len;
 41	}
 42
 43	if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
 44	    !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
 45		return sprintf(buf, "Not affected\n");
 46
 47	return sprintf(buf, "Vulnerable\n");
 48}
 
 49
 50ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
 51{
 52	if (!security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR))
 53		return sprintf(buf, "Not affected\n");
 54
 55	return sprintf(buf, "Vulnerable\n");
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 56}
 57
 58ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
 59{
 60	bool bcs, ccd, ori;
 61	struct seq_buf s;
 
 62
 63	seq_buf_init(&s, buf, PAGE_SIZE - 1);
 64
 65	bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
 66	ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
 67	ori = security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31);
 68
 69	if (bcs || ccd) {
 70		seq_buf_printf(&s, "Mitigation: ");
 71
 72		if (bcs)
 73			seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
 74
 75		if (bcs && ccd)
 76			seq_buf_printf(&s, ", ");
 77
 78		if (ccd)
 79			seq_buf_printf(&s, "Indirect branch cache disabled");
 80	} else
 81		seq_buf_printf(&s, "Vulnerable");
 82
 83	if (ori)
 84		seq_buf_printf(&s, ", ori31 speculation barrier enabled");
 
 
 
 
 
 85
 86	seq_buf_printf(&s, "\n");
 87
 88	return s.len;
 89}
 90
 
 91/*
 92 * Store-forwarding barrier support.
 93 */
 94
 95static enum stf_barrier_type stf_enabled_flush_types;
 96static bool no_stf_barrier;
 97bool stf_barrier;
 98
 99static int __init handle_no_stf_barrier(char *p)
100{
101	pr_info("stf-barrier: disabled on command line.");
102	no_stf_barrier = true;
103	return 0;
104}
105
106early_param("no_stf_barrier", handle_no_stf_barrier);
107
108/* This is the generic flag used by other architectures */
109static int __init handle_ssbd(char *p)
110{
111	if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
112		/* Until firmware tells us, we have the barrier with auto */
113		return 0;
114	} else if (strncmp(p, "off", 3) == 0) {
115		handle_no_stf_barrier(NULL);
116		return 0;
117	} else
118		return 1;
119
120	return 0;
121}
122early_param("spec_store_bypass_disable", handle_ssbd);
123
124/* This is the generic flag used by other architectures */
125static int __init handle_no_ssbd(char *p)
126{
127	handle_no_stf_barrier(NULL);
128	return 0;
129}
130early_param("nospec_store_bypass_disable", handle_no_ssbd);
131
132static void stf_barrier_enable(bool enable)
133{
134	if (enable)
135		do_stf_barrier_fixups(stf_enabled_flush_types);
136	else
137		do_stf_barrier_fixups(STF_BARRIER_NONE);
138
139	stf_barrier = enable;
140}
141
142void setup_stf_barrier(void)
143{
144	enum stf_barrier_type type;
145	bool enable, hv;
146
147	hv = cpu_has_feature(CPU_FTR_HVMODE);
148
149	/* Default to fallback in case fw-features are not available */
150	if (cpu_has_feature(CPU_FTR_ARCH_300))
151		type = STF_BARRIER_EIEIO;
152	else if (cpu_has_feature(CPU_FTR_ARCH_207S))
153		type = STF_BARRIER_SYNC_ORI;
154	else if (cpu_has_feature(CPU_FTR_ARCH_206))
155		type = STF_BARRIER_FALLBACK;
156	else
157		type = STF_BARRIER_NONE;
158
159	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
160		(security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
161		 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
162
163	if (type == STF_BARRIER_FALLBACK) {
164		pr_info("stf-barrier: fallback barrier available\n");
165	} else if (type == STF_BARRIER_SYNC_ORI) {
166		pr_info("stf-barrier: hwsync barrier available\n");
167	} else if (type == STF_BARRIER_EIEIO) {
168		pr_info("stf-barrier: eieio barrier available\n");
169	}
170
171	stf_enabled_flush_types = type;
172
173	if (!no_stf_barrier)
174		stf_barrier_enable(enable);
175}
176
177ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
178{
179	if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
180		const char *type;
181		switch (stf_enabled_flush_types) {
182		case STF_BARRIER_EIEIO:
183			type = "eieio";
184			break;
185		case STF_BARRIER_SYNC_ORI:
186			type = "hwsync";
187			break;
188		case STF_BARRIER_FALLBACK:
189			type = "fallback";
190			break;
191		default:
192			type = "unknown";
193		}
194		return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
195	}
196
197	if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
198	    !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
199		return sprintf(buf, "Not affected\n");
200
201	return sprintf(buf, "Vulnerable\n");
202}
203
204#ifdef CONFIG_DEBUG_FS
205static int stf_barrier_set(void *data, u64 val)
206{
207	bool enable;
208
209	if (val == 1)
210		enable = true;
211	else if (val == 0)
212		enable = false;
213	else
214		return -EINVAL;
215
216	/* Only do anything if we're changing state */
217	if (enable != stf_barrier)
218		stf_barrier_enable(enable);
219
220	return 0;
221}
222
223static int stf_barrier_get(void *data, u64 *val)
224{
225	*val = stf_barrier ? 1 : 0;
226	return 0;
227}
228
229DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
230
231static __init int stf_barrier_debugfs_init(void)
232{
233	debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
234	return 0;
235}
236device_initcall(stf_barrier_debugfs_init);
237#endif /* CONFIG_DEBUG_FS */
v5.4
  1// SPDX-License-Identifier: GPL-2.0+
  2//
  3// Security related flags and so on.
  4//
  5// Copyright 2018, Michael Ellerman, IBM Corporation.
  6
  7#include <linux/cpu.h>
  8#include <linux/kernel.h>
  9#include <linux/device.h>
 10#include <linux/seq_buf.h>
 11
 12#include <asm/asm-prototypes.h>
 13#include <asm/code-patching.h>
 14#include <asm/debugfs.h>
 15#include <asm/security_features.h>
 16#include <asm/setup.h>
 17
 18
 19unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
 20
 21enum count_cache_flush_type {
 22	COUNT_CACHE_FLUSH_NONE	= 0x1,
 23	COUNT_CACHE_FLUSH_SW	= 0x2,
 24	COUNT_CACHE_FLUSH_HW	= 0x4,
 25};
 26static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
 27
 28bool barrier_nospec_enabled;
 29static bool no_nospec;
 30static bool btb_flush_enabled;
 31#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
 32static bool no_spectrev2;
 33#endif
 34
 35static void enable_barrier_nospec(bool enable)
 36{
 37	barrier_nospec_enabled = enable;
 38	do_barrier_nospec_fixups(enable);
 39}
 40
 41void setup_barrier_nospec(void)
 42{
 43	bool enable;
 44
 45	/*
 46	 * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
 47	 * But there's a good reason not to. The two flags we check below are
 48	 * both are enabled by default in the kernel, so if the hcall is not
 49	 * functional they will be enabled.
 50	 * On a system where the host firmware has been updated (so the ori
 51	 * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
 52	 * not been updated, we would like to enable the barrier. Dropping the
 53	 * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
 54	 * we potentially enable the barrier on systems where the host firmware
 55	 * is not updated, but that's harmless as it's a no-op.
 56	 */
 57	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 58		 security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
 59
 60	if (!no_nospec && !cpu_mitigations_off())
 61		enable_barrier_nospec(enable);
 62}
 63
 64static int __init handle_nospectre_v1(char *p)
 65{
 66	no_nospec = true;
 67
 68	return 0;
 69}
 70early_param("nospectre_v1", handle_nospectre_v1);
 71
 72#ifdef CONFIG_DEBUG_FS
 73static int barrier_nospec_set(void *data, u64 val)
 74{
 75	switch (val) {
 76	case 0:
 77	case 1:
 78		break;
 79	default:
 80		return -EINVAL;
 81	}
 82
 83	if (!!val == !!barrier_nospec_enabled)
 84		return 0;
 85
 86	enable_barrier_nospec(!!val);
 87
 88	return 0;
 89}
 90
 91static int barrier_nospec_get(void *data, u64 *val)
 92{
 93	*val = barrier_nospec_enabled ? 1 : 0;
 94	return 0;
 95}
 96
 97DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec,
 98			barrier_nospec_get, barrier_nospec_set, "%llu\n");
 99
100static __init int barrier_nospec_debugfs_init(void)
101{
102	debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root, NULL,
103			    &fops_barrier_nospec);
104	return 0;
105}
106device_initcall(barrier_nospec_debugfs_init);
107
108static __init int security_feature_debugfs_init(void)
109{
110	debugfs_create_x64("security_features", 0400, powerpc_debugfs_root,
111			   (u64 *)&powerpc_security_features);
112	return 0;
113}
114device_initcall(security_feature_debugfs_init);
115#endif /* CONFIG_DEBUG_FS */
116
117#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
118static int __init handle_nospectre_v2(char *p)
119{
120	no_spectrev2 = true;
121
122	return 0;
123}
124early_param("nospectre_v2", handle_nospectre_v2);
125#endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
126
127#ifdef CONFIG_PPC_FSL_BOOK3E
128void setup_spectre_v2(void)
129{
130	if (no_spectrev2 || cpu_mitigations_off())
131		do_btb_flush_fixups();
132	else
133		btb_flush_enabled = true;
134}
135#endif /* CONFIG_PPC_FSL_BOOK3E */
136
137#ifdef CONFIG_PPC_BOOK3S_64
138ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
139{
140	bool thread_priv;
141
142	thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
143
144	if (rfi_flush || thread_priv) {
145		struct seq_buf s;
146		seq_buf_init(&s, buf, PAGE_SIZE - 1);
147
148		seq_buf_printf(&s, "Mitigation: ");
149
150		if (rfi_flush)
151			seq_buf_printf(&s, "RFI Flush");
152
153		if (rfi_flush && thread_priv)
154			seq_buf_printf(&s, ", ");
155
156		if (thread_priv)
157			seq_buf_printf(&s, "L1D private per thread");
158
159		seq_buf_printf(&s, "\n");
160
161		return s.len;
162	}
163
164	if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
165	    !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
166		return sprintf(buf, "Not affected\n");
167
168	return sprintf(buf, "Vulnerable\n");
169}
170#endif
171
172ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
173{
174	struct seq_buf s;
 
175
176	seq_buf_init(&s, buf, PAGE_SIZE - 1);
177
178	if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
179		if (barrier_nospec_enabled)
180			seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
181		else
182			seq_buf_printf(&s, "Vulnerable");
183
184		if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
185			seq_buf_printf(&s, ", ori31 speculation barrier enabled");
186
187		seq_buf_printf(&s, "\n");
188	} else
189		seq_buf_printf(&s, "Not affected\n");
190
191	return s.len;
192}
193
194ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
195{
 
196	struct seq_buf s;
197	bool bcs, ccd;
198
199	seq_buf_init(&s, buf, PAGE_SIZE - 1);
200
201	bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
202	ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
 
203
204	if (bcs || ccd) {
205		seq_buf_printf(&s, "Mitigation: ");
206
207		if (bcs)
208			seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
209
210		if (bcs && ccd)
211			seq_buf_printf(&s, ", ");
212
213		if (ccd)
214			seq_buf_printf(&s, "Indirect branch cache disabled");
215	} else if (count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
216		seq_buf_printf(&s, "Mitigation: Software count cache flush");
217
218		if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
219			seq_buf_printf(&s, " (hardware accelerated)");
220	} else if (btb_flush_enabled) {
221		seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
222	} else {
223		seq_buf_printf(&s, "Vulnerable");
224	}
225
226	seq_buf_printf(&s, "\n");
227
228	return s.len;
229}
230
231#ifdef CONFIG_PPC_BOOK3S_64
232/*
233 * Store-forwarding barrier support.
234 */
235
236static enum stf_barrier_type stf_enabled_flush_types;
237static bool no_stf_barrier;
238bool stf_barrier;
239
240static int __init handle_no_stf_barrier(char *p)
241{
242	pr_info("stf-barrier: disabled on command line.");
243	no_stf_barrier = true;
244	return 0;
245}
246
247early_param("no_stf_barrier", handle_no_stf_barrier);
248
249/* This is the generic flag used by other architectures */
250static int __init handle_ssbd(char *p)
251{
252	if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
253		/* Until firmware tells us, we have the barrier with auto */
254		return 0;
255	} else if (strncmp(p, "off", 3) == 0) {
256		handle_no_stf_barrier(NULL);
257		return 0;
258	} else
259		return 1;
260
261	return 0;
262}
263early_param("spec_store_bypass_disable", handle_ssbd);
264
265/* This is the generic flag used by other architectures */
266static int __init handle_no_ssbd(char *p)
267{
268	handle_no_stf_barrier(NULL);
269	return 0;
270}
271early_param("nospec_store_bypass_disable", handle_no_ssbd);
272
273static void stf_barrier_enable(bool enable)
274{
275	if (enable)
276		do_stf_barrier_fixups(stf_enabled_flush_types);
277	else
278		do_stf_barrier_fixups(STF_BARRIER_NONE);
279
280	stf_barrier = enable;
281}
282
283void setup_stf_barrier(void)
284{
285	enum stf_barrier_type type;
286	bool enable, hv;
287
288	hv = cpu_has_feature(CPU_FTR_HVMODE);
289
290	/* Default to fallback in case fw-features are not available */
291	if (cpu_has_feature(CPU_FTR_ARCH_300))
292		type = STF_BARRIER_EIEIO;
293	else if (cpu_has_feature(CPU_FTR_ARCH_207S))
294		type = STF_BARRIER_SYNC_ORI;
295	else if (cpu_has_feature(CPU_FTR_ARCH_206))
296		type = STF_BARRIER_FALLBACK;
297	else
298		type = STF_BARRIER_NONE;
299
300	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
301		(security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
302		 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
303
304	if (type == STF_BARRIER_FALLBACK) {
305		pr_info("stf-barrier: fallback barrier available\n");
306	} else if (type == STF_BARRIER_SYNC_ORI) {
307		pr_info("stf-barrier: hwsync barrier available\n");
308	} else if (type == STF_BARRIER_EIEIO) {
309		pr_info("stf-barrier: eieio barrier available\n");
310	}
311
312	stf_enabled_flush_types = type;
313
314	if (!no_stf_barrier && !cpu_mitigations_off())
315		stf_barrier_enable(enable);
316}
317
318ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
319{
320	if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
321		const char *type;
322		switch (stf_enabled_flush_types) {
323		case STF_BARRIER_EIEIO:
324			type = "eieio";
325			break;
326		case STF_BARRIER_SYNC_ORI:
327			type = "hwsync";
328			break;
329		case STF_BARRIER_FALLBACK:
330			type = "fallback";
331			break;
332		default:
333			type = "unknown";
334		}
335		return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
336	}
337
338	if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
339	    !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
340		return sprintf(buf, "Not affected\n");
341
342	return sprintf(buf, "Vulnerable\n");
343}
344
345#ifdef CONFIG_DEBUG_FS
346static int stf_barrier_set(void *data, u64 val)
347{
348	bool enable;
349
350	if (val == 1)
351		enable = true;
352	else if (val == 0)
353		enable = false;
354	else
355		return -EINVAL;
356
357	/* Only do anything if we're changing state */
358	if (enable != stf_barrier)
359		stf_barrier_enable(enable);
360
361	return 0;
362}
363
364static int stf_barrier_get(void *data, u64 *val)
365{
366	*val = stf_barrier ? 1 : 0;
367	return 0;
368}
369
370DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
371
372static __init int stf_barrier_debugfs_init(void)
373{
374	debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
375	return 0;
376}
377device_initcall(stf_barrier_debugfs_init);
378#endif /* CONFIG_DEBUG_FS */
379
380static void toggle_count_cache_flush(bool enable)
381{
382	if (!enable || !security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
383		patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP);
384		count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
385		pr_info("count-cache-flush: software flush disabled.\n");
386		return;
387	}
388
389	patch_branch_site(&patch__call_flush_count_cache,
390			  (u64)&flush_count_cache, BRANCH_SET_LINK);
391
392	if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
393		count_cache_flush_type = COUNT_CACHE_FLUSH_SW;
394		pr_info("count-cache-flush: full software flush sequence enabled.\n");
395		return;
396	}
397
398	patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR);
399	count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
400	pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
401}
402
403void setup_count_cache_flush(void)
404{
405	bool enable = true;
406
407	if (no_spectrev2 || cpu_mitigations_off()) {
408		if (security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED) ||
409		    security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED))
410			pr_warn("Spectre v2 mitigations not under software control, can't disable\n");
411
412		enable = false;
413	}
414
415	toggle_count_cache_flush(enable);
416}
417
418#ifdef CONFIG_DEBUG_FS
419static int count_cache_flush_set(void *data, u64 val)
420{
421	bool enable;
422
423	if (val == 1)
424		enable = true;
425	else if (val == 0)
426		enable = false;
427	else
428		return -EINVAL;
429
430	toggle_count_cache_flush(enable);
431
432	return 0;
433}
434
435static int count_cache_flush_get(void *data, u64 *val)
436{
437	if (count_cache_flush_type == COUNT_CACHE_FLUSH_NONE)
438		*val = 0;
439	else
440		*val = 1;
441
442	return 0;
443}
444
445DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
446			count_cache_flush_set, "%llu\n");
447
448static __init int count_cache_flush_debugfs_init(void)
449{
450	debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root,
451			    NULL, &fops_count_cache_flush);
452	return 0;
453}
454device_initcall(count_cache_flush_debugfs_init);
455#endif /* CONFIG_DEBUG_FS */
456#endif /* CONFIG_PPC_BOOK3S_64 */