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1/*
2 * Copyright (C) 2001, 2002, MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 * Copyright (c) 2003 Maciej W. Rozycki
5 *
6 * include/asm-mips/time.h
7 * header file for the new style time.c file and time services.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14#ifndef _ASM_TIME_H
15#define _ASM_TIME_H
16
17#include <linux/rtc.h>
18#include <linux/spinlock.h>
19#include <linux/clockchips.h>
20#include <linux/clocksource.h>
21
22extern spinlock_t rtc_lock;
23
24/*
25 * RTC ops. By default, they point to weak no-op RTC functions.
26 * rtc_mips_set_time - reverse the above translation and set time to RTC.
27 * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need
28 * to be set. Used by RTC sync-up.
29 */
30extern int rtc_mips_set_time(unsigned long);
31extern int rtc_mips_set_mmss(unsigned long);
32
33/*
34 * board specific routines required by time_init().
35 */
36extern void plat_time_init(void);
37
38/*
39 * mips_hpt_frequency - must be set if you intend to use an R4k-compatible
40 * counter as a timer interrupt source.
41 */
42extern unsigned int mips_hpt_frequency;
43
44/*
45 * The performance counter IRQ on MIPS is a close relative to the timer IRQ
46 * so it lives here.
47 */
48extern int (*perf_irq)(void);
49extern int __weak get_c0_perfcount_int(void);
50
51/*
52 * Initialize the calling CPU's compare interrupt as clockevent device
53 */
54extern unsigned int get_c0_compare_int(void);
55extern int r4k_clockevent_init(void);
56
57static inline int mips_clockevent_init(void)
58{
59#ifdef CONFIG_CEVT_R4K
60 return r4k_clockevent_init();
61#else
62 return -ENXIO;
63#endif
64}
65
66/*
67 * Initialize the count register as a clocksource
68 */
69extern int init_r4k_clocksource(void);
70
71static inline int init_mips_clocksource(void)
72{
73#ifdef CONFIG_CSRC_R4K
74 return init_r4k_clocksource();
75#else
76 return 0;
77#endif
78}
79
80static inline void clockevent_set_clock(struct clock_event_device *cd,
81 unsigned int clock)
82{
83 clockevents_calc_mult_shift(cd, clock, 4);
84}
85
86#endif /* _ASM_TIME_H */
1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright (C) 2001, 2002, MontaVista Software Inc.
4 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
5 * Copyright (c) 2003 Maciej W. Rozycki
6 *
7 * include/asm-mips/time.h
8 * header file for the new style time.c file and time services.
9 */
10#ifndef _ASM_TIME_H
11#define _ASM_TIME_H
12
13#include <linux/rtc.h>
14#include <linux/spinlock.h>
15#include <linux/clockchips.h>
16#include <linux/clocksource.h>
17
18extern spinlock_t rtc_lock;
19
20/*
21 * board specific routines required by time_init().
22 */
23extern void plat_time_init(void);
24
25/*
26 * mips_hpt_frequency - must be set if you intend to use an R4k-compatible
27 * counter as a timer interrupt source.
28 */
29extern unsigned int mips_hpt_frequency;
30
31/*
32 * The performance counter IRQ on MIPS is a close relative to the timer IRQ
33 * so it lives here.
34 */
35extern int (*perf_irq)(void);
36extern int __weak get_c0_perfcount_int(void);
37
38/*
39 * Initialize the calling CPU's compare interrupt as clockevent device
40 */
41extern unsigned int get_c0_compare_int(void);
42extern int r4k_clockevent_init(void);
43
44static inline int mips_clockevent_init(void)
45{
46#ifdef CONFIG_CEVT_R4K
47 return r4k_clockevent_init();
48#else
49 return -ENXIO;
50#endif
51}
52
53/*
54 * Initialize the count register as a clocksource
55 */
56extern int init_r4k_clocksource(void);
57
58static inline int init_mips_clocksource(void)
59{
60#ifdef CONFIG_CSRC_R4K
61 return init_r4k_clocksource();
62#else
63 return 0;
64#endif
65}
66
67static inline void clockevent_set_clock(struct clock_event_device *cd,
68 unsigned int clock)
69{
70 clockevents_calc_mult_shift(cd, clock, 4);
71}
72
73#endif /* _ASM_TIME_H */