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1/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/* AM437x SK EVM */
10
11/dts-v1/;
12
13#include "am4372.dtsi"
14#include <dt-bindings/pinctrl/am43xx.h>
15#include <dt-bindings/pwm/pwm.h>
16#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/input/input.h>
18
19/ {
20 model = "TI AM437x SK EVM";
21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
22
23 aliases {
24 display0 = &lcd0;
25 };
26
27 chosen {
28 stdout-path = &uart0;
29 };
30
31 /* fixed 32k external oscillator clock */
32 clk_32k_rtc: clk_32k_rtc {
33 #clock-cells = <0>;
34 compatible = "fixed-clock";
35 clock-frequency = <32768>;
36 };
37
38 lcd_bl: backlight {
39 compatible = "pwm-backlight";
40 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
41 brightness-levels = <0 51 53 56 62 75 101 152 255>;
42 default-brightness-level = <8>;
43 };
44
45 sound {
46 compatible = "simple-audio-card";
47 simple-audio-card,name = "AM437x-SK-EVM";
48 simple-audio-card,widgets =
49 "Headphone", "Headphone Jack",
50 "Line", "Line In";
51 simple-audio-card,routing =
52 "Headphone Jack", "HPLOUT",
53 "Headphone Jack", "HPROUT",
54 "LINE1L", "Line In",
55 "LINE1R", "Line In";
56 simple-audio-card,format = "dsp_b";
57 simple-audio-card,bitclock-master = <&sound_master>;
58 simple-audio-card,frame-master = <&sound_master>;
59 simple-audio-card,bitclock-inversion;
60
61 simple-audio-card,cpu {
62 sound-dai = <&mcasp1>;
63 };
64
65 sound_master: simple-audio-card,codec {
66 sound-dai = <&tlv320aic3106>;
67 system-clock-frequency = <24000000>;
68 };
69 };
70
71 matrix_keypad: matrix_keypad0 {
72 compatible = "gpio-matrix-keypad";
73
74 pinctrl-names = "default";
75 pinctrl-0 = <&matrix_keypad_pins>;
76
77 debounce-delay-ms = <5>;
78 col-scan-delay-us = <5>;
79
80 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
81 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
82
83 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
84 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
85
86 linux,keymap = <
87 MATRIX_KEY(0, 0, KEY_DOWN)
88 MATRIX_KEY(0, 1, KEY_RIGHT)
89 MATRIX_KEY(1, 0, KEY_LEFT)
90 MATRIX_KEY(1, 1, KEY_UP)
91 >;
92 };
93
94 leds {
95 compatible = "gpio-leds";
96
97 pinctrl-names = "default";
98 pinctrl-0 = <&leds_pins>;
99
100 led0 {
101 label = "am437x-sk:red:heartbeat";
102 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
103 linux,default-trigger = "heartbeat";
104 default-state = "off";
105 };
106
107 led1 {
108 label = "am437x-sk:green:mmc1";
109 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
110 linux,default-trigger = "mmc0";
111 default-state = "off";
112 };
113
114 led2 {
115 label = "am437x-sk:blue:cpu0";
116 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
117 linux,default-trigger = "cpu0";
118 default-state = "off";
119 };
120
121 led3 {
122 label = "am437x-sk:blue:usr3";
123 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
124 default-state = "off";
125 };
126 };
127
128 lcd0: display {
129 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
130 label = "lcd";
131
132 pinctrl-names = "default";
133 pinctrl-0 = <&lcd_pins>;
134
135 backlight = <&lcd_bl>;
136
137 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
138
139 panel-timing {
140 clock-frequency = <9000000>;
141 hactive = <480>;
142 vactive = <272>;
143 hfront-porch = <2>;
144 hback-porch = <2>;
145 hsync-len = <41>;
146 vfront-porch = <2>;
147 vback-porch = <2>;
148 vsync-len = <10>;
149 hsync-active = <0>;
150 vsync-active = <0>;
151 de-active = <1>;
152 pixelclk-active = <1>;
153 };
154
155 port {
156 lcd_in: endpoint {
157 remote-endpoint = <&dpi_out>;
158 };
159 };
160 };
161};
162
163&am43xx_pinmux {
164 matrix_keypad_pins: matrix_keypad_pins {
165 pinctrl-single,pins = <
166 AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
167 AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
168 AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
169 AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
170 >;
171 };
172
173 leds_pins: leds_pins {
174 pinctrl-single,pins = <
175 AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
176 AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
177 AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
178 AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
179 >;
180 };
181
182 i2c0_pins: i2c0_pins {
183 pinctrl-single,pins = <
184 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
185 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
186 >;
187 };
188
189 i2c1_pins: i2c1_pins {
190 pinctrl-single,pins = <
191 AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
192 AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
193 >;
194 };
195
196 mmc1_pins: pinmux_mmc1_pins {
197 pinctrl-single,pins = <
198 AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
199 AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
200 AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
201 AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
202 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
203 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
204 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
205 >;
206 };
207
208 ecap0_pins: backlight_pins {
209 pinctrl-single,pins = <
210 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
211 >;
212 };
213
214 edt_ft5306_ts_pins: edt_ft5306_ts_pins {
215 pinctrl-single,pins = <
216 AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
217 AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
218 >;
219 };
220
221 vpfe0_pins_default: vpfe0_pins_default {
222 pinctrl-single,pins = <
223 AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
224 AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
225 AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
226 AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
227 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
228 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
229 AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
230 AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
231 AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
232 AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
233 AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
234 AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
235 AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
236 AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
237 AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
238 >;
239 };
240
241 vpfe0_pins_sleep: vpfe0_pins_sleep {
242 pinctrl-single,pins = <
243 AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
244 AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
245 AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
246 AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
247 AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
248 AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
249 AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
250 AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
251 AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
252 AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
253 AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
254 AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
255 AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
256 AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
257 AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
258 >;
259 };
260
261 cpsw_default: cpsw_default {
262 pinctrl-single,pins = <
263 /* Slave 1 */
264 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
265 AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
266 AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
267 AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
268 AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
269 AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
270 AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
271 AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
272 AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
273 AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
274 AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
275 AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
276
277 /* Slave 2 */
278 AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
279 AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
280 AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
281 AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
282 AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
283 AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
284 AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
285 AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
286 AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
287 AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
288 AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
289 AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
290 >;
291 };
292
293 cpsw_sleep: cpsw_sleep {
294 pinctrl-single,pins = <
295 /* Slave 1 reset value */
296 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
297 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
298 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
299 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
300 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
301 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
302 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
303 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
304 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
305 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
306 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
307 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
308
309 /* Slave 2 reset value */
310 AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
311 AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
312 AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
313 AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
314 AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
315 AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
316 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
317 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
318 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
319 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
320 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
321 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
322 >;
323 };
324
325 davinci_mdio_default: davinci_mdio_default {
326 pinctrl-single,pins = <
327 /* MDIO */
328 AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
329 AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
330 >;
331 };
332
333 davinci_mdio_sleep: davinci_mdio_sleep {
334 pinctrl-single,pins = <
335 /* MDIO reset value */
336 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
337 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
338 >;
339 };
340
341 dss_pins: dss_pins {
342 pinctrl-single,pins = <
343 AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
344 AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
345 AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
346 AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
347 AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
348 AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
349 AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
350 AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
351 AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
352 AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
353 AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
354 AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
355 AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
356 AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
357 AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
358 AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
359 AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
360 AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
361 AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
362 AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
363 AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
364 AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
365 AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
366 AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
367 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
368 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
369 AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
370 AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
371
372 >;
373 };
374
375 qspi_pins: qspi_pins {
376 pinctrl-single,pins = <
377 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
378 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
379 AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
380 AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
381 AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
382 AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
383 >;
384 };
385
386 mcasp1_pins: mcasp1_pins {
387 pinctrl-single,pins = <
388 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
389 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
390 AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
391 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
392 >;
393 };
394
395 mcasp1_pins_sleep: mcasp1_pins_sleep {
396 pinctrl-single,pins = <
397 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
398 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
399 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
400 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
401 >;
402 };
403
404 lcd_pins: lcd_pins {
405 pinctrl-single,pins = <
406 AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
407 >;
408 };
409
410 usb1_pins: usb1_pins {
411 pinctrl-single,pins = <
412 AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
413 >;
414 };
415
416 usb2_pins: usb2_pins {
417 pinctrl-single,pins = <
418 AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
419 >;
420 };
421};
422
423&i2c0 {
424 status = "okay";
425 pinctrl-names = "default";
426 pinctrl-0 = <&i2c0_pins>;
427 clock-frequency = <100000>;
428
429 tps@24 {
430 compatible = "ti,tps65218";
431 reg = <0x24>;
432 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
433 interrupt-controller;
434 #interrupt-cells = <2>;
435
436 dcdc1: regulator-dcdc1 {
437 /* VDD_CORE limits min of OPP50 and max of OPP100 */
438 regulator-name = "vdd_core";
439 regulator-min-microvolt = <912000>;
440 regulator-max-microvolt = <1144000>;
441 regulator-boot-on;
442 regulator-always-on;
443 };
444
445 dcdc2: regulator-dcdc2 {
446 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
447 regulator-name = "vdd_mpu";
448 regulator-min-microvolt = <912000>;
449 regulator-max-microvolt = <1378000>;
450 regulator-boot-on;
451 regulator-always-on;
452 };
453
454 dcdc3: regulator-dcdc3 {
455 regulator-name = "vdds_ddr";
456 regulator-boot-on;
457 regulator-always-on;
458 regulator-state-mem {
459 regulator-on-in-suspend;
460 };
461 regulator-state-disk {
462 regulator-off-in-suspend;
463 };
464 };
465
466 dcdc4: regulator-dcdc4 {
467 regulator-name = "v3_3d";
468 regulator-min-microvolt = <3300000>;
469 regulator-max-microvolt = <3300000>;
470 regulator-boot-on;
471 regulator-always-on;
472 };
473
474 dcdc5: regulator-dcdc5 {
475 compatible = "ti,tps65218-dcdc5";
476 regulator-name = "v1_0bat";
477 regulator-min-microvolt = <1000000>;
478 regulator-max-microvolt = <1000000>;
479 regulator-boot-on;
480 regulator-always-on;
481 regulator-state-mem {
482 regulator-on-in-suspend;
483 };
484 };
485
486 dcdc6: regulator-dcdc6 {
487 compatible = "ti,tps65218-dcdc6";
488 regulator-name = "v1_8bat";
489 regulator-min-microvolt = <1800000>;
490 regulator-max-microvolt = <1800000>;
491 regulator-boot-on;
492 regulator-always-on;
493 regulator-state-mem {
494 regulator-on-in-suspend;
495 };
496 };
497
498 ldo1: regulator-ldo1 {
499 regulator-name = "v1_8d";
500 regulator-min-microvolt = <1800000>;
501 regulator-max-microvolt = <1800000>;
502 regulator-boot-on;
503 regulator-always-on;
504 };
505
506 power-button {
507 compatible = "ti,tps65218-pwrbutton";
508 status = "okay";
509 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
510 };
511 };
512
513 at24@50 {
514 compatible = "atmel,24c256";
515 pagesize = <64>;
516 reg = <0x50>;
517 };
518};
519
520&i2c1 {
521 status = "okay";
522 pinctrl-names = "default";
523 pinctrl-0 = <&i2c1_pins>;
524 clock-frequency = <400000>;
525
526 edt-ft5306@38 {
527 status = "okay";
528 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
529 pinctrl-names = "default";
530 pinctrl-0 = <&edt_ft5306_ts_pins>;
531
532 reg = <0x38>;
533 interrupt-parent = <&gpio0>;
534 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
535
536 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
537
538 touchscreen-size-x = <480>;
539 touchscreen-size-y = <272>;
540 };
541
542 tlv320aic3106: tlv320aic3106@1b {
543 #sound-dai-cells = <0>;
544 compatible = "ti,tlv320aic3106";
545 reg = <0x1b>;
546 status = "okay";
547
548 /* Regulators */
549 AVDD-supply = <&dcdc4>;
550 IOVDD-supply = <&dcdc4>;
551 DRVDD-supply = <&dcdc4>;
552 DVDD-supply = <&ldo1>;
553 };
554
555 lis331dlh@18 {
556 compatible = "st,lis331dlh";
557 reg = <0x18>;
558 status = "okay";
559
560 Vdd-supply = <&dcdc4>;
561 Vdd_IO-supply = <&dcdc4>;
562 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
563 };
564};
565
566&epwmss0 {
567 status = "okay";
568};
569
570&ecap0 {
571 status = "okay";
572 pinctrl-names = "default";
573 pinctrl-0 = <&ecap0_pins>;
574};
575
576&gpio0 {
577 status = "okay";
578};
579
580&gpio1 {
581 status = "okay";
582};
583
584&gpio5 {
585 status = "okay";
586};
587
588&mmc1 {
589 status = "okay";
590 pinctrl-names = "default";
591 pinctrl-0 = <&mmc1_pins>;
592
593 vmmc-supply = <&dcdc4>;
594 bus-width = <4>;
595 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
596};
597
598&usb2_phy1 {
599 status = "okay";
600};
601
602&usb1 {
603 dr_mode = "otg";
604 status = "okay";
605 pinctrl-names = "default";
606 pinctrl-0 = <&usb1_pins>;
607};
608
609&usb2_phy2 {
610 status = "okay";
611};
612
613&usb2 {
614 dr_mode = "host";
615 status = "okay";
616 pinctrl-names = "default";
617 pinctrl-0 = <&usb2_pins>;
618};
619
620&qspi {
621 status = "okay";
622 pinctrl-names = "default";
623 pinctrl-0 = <&qspi_pins>;
624
625 spi-max-frequency = <48000000>;
626 m25p80@0 {
627 compatible = "mx66l51235l";
628 spi-max-frequency = <48000000>;
629 reg = <0>;
630 spi-cpol;
631 spi-cpha;
632 spi-tx-bus-width = <1>;
633 spi-rx-bus-width = <4>;
634 #address-cells = <1>;
635 #size-cells = <1>;
636
637 /* MTD partition table.
638 * The ROM checks the first 512KiB
639 * for a valid file to boot(XIP).
640 */
641 partition@0 {
642 label = "QSPI.U_BOOT";
643 reg = <0x00000000 0x000080000>;
644 };
645 partition@1 {
646 label = "QSPI.U_BOOT.backup";
647 reg = <0x00080000 0x00080000>;
648 };
649 partition@2 {
650 label = "QSPI.U-BOOT-SPL_OS";
651 reg = <0x00100000 0x00010000>;
652 };
653 partition@3 {
654 label = "QSPI.U_BOOT_ENV";
655 reg = <0x00110000 0x00010000>;
656 };
657 partition@4 {
658 label = "QSPI.U-BOOT-ENV.backup";
659 reg = <0x00120000 0x00010000>;
660 };
661 partition@5 {
662 label = "QSPI.KERNEL";
663 reg = <0x00130000 0x0800000>;
664 };
665 partition@6 {
666 label = "QSPI.FILESYSTEM";
667 reg = <0x00930000 0x36D0000>;
668 };
669 };
670};
671
672&mac {
673 pinctrl-names = "default", "sleep";
674 pinctrl-0 = <&cpsw_default>;
675 pinctrl-1 = <&cpsw_sleep>;
676 dual_emac = <1>;
677 status = "okay";
678};
679
680&davinci_mdio {
681 pinctrl-names = "default", "sleep";
682 pinctrl-0 = <&davinci_mdio_default>;
683 pinctrl-1 = <&davinci_mdio_sleep>;
684 status = "okay";
685};
686
687&cpsw_emac0 {
688 phy_id = <&davinci_mdio>, <4>;
689 phy-mode = "rgmii";
690 dual_emac_res_vlan = <1>;
691};
692
693&cpsw_emac1 {
694 phy_id = <&davinci_mdio>, <5>;
695 phy-mode = "rgmii";
696 dual_emac_res_vlan = <2>;
697};
698
699&elm {
700 status = "okay";
701};
702
703&mcasp1 {
704 #sound-dai-cells = <0>;
705 pinctrl-names = "default", "sleep";
706 pinctrl-0 = <&mcasp1_pins>;
707 pinctrl-1 = <&mcasp1_pins_sleep>;
708
709 status = "okay";
710
711 op-mode = <0>;
712 tdm-slots = <2>;
713 serial-dir = <
714 0 0 1 2
715 >;
716
717 tx-num-evt = <1>;
718 rx-num-evt = <1>;
719};
720
721&dss {
722 status = "okay";
723
724 pinctrl-names = "default";
725 pinctrl-0 = <&dss_pins>;
726
727 port {
728 dpi_out: endpoint@0 {
729 remote-endpoint = <&lcd_in>;
730 data-lines = <24>;
731 };
732 };
733};
734
735&rtc {
736 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
737 clock-names = "ext-clk", "int-clk";
738 status = "okay";
739};
740
741&wdt {
742 status = "okay";
743};
744
745&cpu {
746 cpu0-supply = <&dcdc2>;
747};
748
749&vpfe0 {
750 status = "okay";
751 pinctrl-names = "default", "sleep";
752 pinctrl-0 = <&vpfe0_pins_default>;
753 pinctrl-1 = <&vpfe0_pins_sleep>;
754
755 /* Camera port */
756 port {
757 vpfe0_ep: endpoint {
758 /* remote-endpoint = <&sensor>; add once we have it */
759 ti,am437x-vpfe-interface = <0>;
760 bus-width = <8>;
761 hsync-active = <0>;
762 vsync-active = <0>;
763 };
764 };
765};
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6/* AM437x SK EVM */
7
8/dts-v1/;
9
10#include "am4372.dtsi"
11#include <dt-bindings/pinctrl/am43xx.h>
12#include <dt-bindings/pwm/pwm.h>
13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/input/input.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16
17/ {
18 model = "TI AM437x SK EVM";
19 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
20
21 aliases {
22 display0 = &lcd0;
23 };
24
25 chosen {
26 stdout-path = &uart0;
27 };
28
29 /* fixed 32k external oscillator clock */
30 clk_32k_rtc: clk_32k_rtc {
31 #clock-cells = <0>;
32 compatible = "fixed-clock";
33 clock-frequency = <32768>;
34 };
35
36 lcd_bl: backlight {
37 compatible = "pwm-backlight";
38 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
39 brightness-levels = <0 51 53 56 62 75 101 152 255>;
40 default-brightness-level = <8>;
41 };
42
43 sound {
44 compatible = "simple-audio-card";
45 simple-audio-card,name = "AM437x-SK-EVM";
46 simple-audio-card,widgets =
47 "Headphone", "Headphone Jack",
48 "Line", "Line In";
49 simple-audio-card,routing =
50 "Headphone Jack", "HPLOUT",
51 "Headphone Jack", "HPROUT",
52 "LINE1L", "Line In",
53 "LINE1R", "Line In";
54 simple-audio-card,format = "dsp_b";
55 simple-audio-card,bitclock-master = <&sound_master>;
56 simple-audio-card,frame-master = <&sound_master>;
57 simple-audio-card,bitclock-inversion;
58
59 simple-audio-card,cpu {
60 sound-dai = <&mcasp1>;
61 };
62
63 sound_master: simple-audio-card,codec {
64 sound-dai = <&tlv320aic3106>;
65 system-clock-frequency = <24000000>;
66 };
67 };
68
69 matrix_keypad: matrix_keypad0 {
70 compatible = "gpio-matrix-keypad";
71
72 pinctrl-names = "default";
73 pinctrl-0 = <&matrix_keypad_pins>;
74
75 debounce-delay-ms = <5>;
76 col-scan-delay-us = <5>;
77
78 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
79 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
80
81 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
82 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
83
84 linux,keymap = <
85 MATRIX_KEY(0, 0, KEY_DOWN)
86 MATRIX_KEY(0, 1, KEY_RIGHT)
87 MATRIX_KEY(1, 0, KEY_LEFT)
88 MATRIX_KEY(1, 1, KEY_UP)
89 >;
90 };
91
92 leds {
93 compatible = "gpio-leds";
94
95 pinctrl-names = "default";
96 pinctrl-0 = <&leds_pins>;
97
98 led0 {
99 label = "am437x-sk:red:heartbeat";
100 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
101 linux,default-trigger = "heartbeat";
102 default-state = "off";
103 };
104
105 led1 {
106 label = "am437x-sk:green:mmc1";
107 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
108 linux,default-trigger = "mmc0";
109 default-state = "off";
110 };
111
112 led2 {
113 label = "am437x-sk:blue:cpu0";
114 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
115 linux,default-trigger = "cpu0";
116 default-state = "off";
117 };
118
119 led3 {
120 label = "am437x-sk:blue:usr3";
121 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
122 default-state = "off";
123 };
124 };
125
126 lcd0: display {
127 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
128 label = "lcd";
129
130 pinctrl-names = "default";
131 pinctrl-0 = <&lcd_pins>;
132
133 backlight = <&lcd_bl>;
134
135 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
136
137 panel-timing {
138 clock-frequency = <9000000>;
139 hactive = <480>;
140 vactive = <272>;
141 hfront-porch = <2>;
142 hback-porch = <2>;
143 hsync-len = <41>;
144 vfront-porch = <2>;
145 vback-porch = <2>;
146 vsync-len = <10>;
147 hsync-active = <0>;
148 vsync-active = <0>;
149 de-active = <1>;
150 pixelclk-active = <1>;
151 };
152
153 port {
154 lcd_in: endpoint {
155 remote-endpoint = <&dpi_out>;
156 };
157 };
158 };
159
160 vmmcwl_fixed: fixedregulator-mmcwl {
161 /*
162 * WL_EN is not SDIO standard compliant. It is an out of band
163 * signal and hard to be dealt with in a standard way by the
164 * SDIO core driver.
165 * So modelling the WL_EN line as a regulator was a natural
166 * choice as the MMC core already deals with MMC supplies.
167 */
168 compatible = "regulator-fixed";
169 regulator-name = "vmmcwl_fixed";
170 regulator-min-microvolt = <1800000>;
171 regulator-max-microvolt = <1800000>;
172 gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
173 enable-active-high;
174 };
175};
176
177&am43xx_pinmux {
178 matrix_keypad_pins: matrix_keypad_pins {
179 pinctrl-single,pins = <
180 AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
181 AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
182 AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
183 AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
184 >;
185 };
186
187 leds_pins: leds_pins {
188 pinctrl-single,pins = <
189 AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
190 AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
191 AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
192 AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
193 >;
194 };
195
196 i2c0_pins: i2c0_pins {
197 pinctrl-single,pins = <
198 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
199 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
200 >;
201 };
202
203 i2c1_pins: i2c1_pins {
204 pinctrl-single,pins = <
205 AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
206 AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
207 >;
208 };
209
210 mmc1_pins: pinmux_mmc1_pins {
211 pinctrl-single,pins = <
212 AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
213 AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
214 AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
215 AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
216 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
217 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
218 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
219 >;
220 };
221
222 ecap0_pins: backlight_pins {
223 pinctrl-single,pins = <
224 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
225 >;
226 };
227
228 edt_ft5306_ts_pins: edt_ft5306_ts_pins {
229 pinctrl-single,pins = <
230 AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
231 AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
232 >;
233 };
234
235 vpfe0_pins_default: vpfe0_pins_default {
236 pinctrl-single,pins = <
237 AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
238 AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
239 AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
240 AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
241 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
242 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
243 AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
244 AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
245 AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
246 AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
247 AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
248 AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
249 AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
250 AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
251 AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
252 >;
253 };
254
255 vpfe0_pins_sleep: vpfe0_pins_sleep {
256 pinctrl-single,pins = <
257 AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
258 AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
259 AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
260 AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
261 AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
262 AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
263 AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
264 AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
265 AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
266 AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
267 AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
268 AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
269 AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
270 AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
271 AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
272 >;
273 };
274
275 cpsw_default: cpsw_default {
276 pinctrl-single,pins = <
277 /* Slave 1 */
278 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
279 AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
280 AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
281 AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
282 AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
283 AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
284 AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
285 AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
286 AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
287 AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
288 AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
289 AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
290
291 /* Slave 2 */
292 AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
293 AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
294 AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
295 AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
296 AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
297 AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
298 AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
299 AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
300 AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
301 AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
302 AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
303 AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
304 >;
305 };
306
307 cpsw_sleep: cpsw_sleep {
308 pinctrl-single,pins = <
309 /* Slave 1 reset value */
310 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
311 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
312 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
313 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
314 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
315 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
316 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
317 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
318 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
319 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
320 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
321 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
322
323 /* Slave 2 reset value */
324 AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
325 AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
326 AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
327 AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
328 AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
329 AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
330 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
331 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
332 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
333 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
334 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
335 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
336 >;
337 };
338
339 davinci_mdio_default: davinci_mdio_default {
340 pinctrl-single,pins = <
341 /* MDIO */
342 AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
343 AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
344 >;
345 };
346
347 davinci_mdio_sleep: davinci_mdio_sleep {
348 pinctrl-single,pins = <
349 /* MDIO reset value */
350 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
351 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
352 >;
353 };
354
355 dss_pins: dss_pins {
356 pinctrl-single,pins = <
357 AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
358 AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
359 AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
360 AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
361 AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
362 AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
363 AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
364 AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
365 AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
366 AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
367 AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
368 AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
369 AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
370 AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
371 AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
372 AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
373 AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
374 AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
375 AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
376 AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
377 AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
378 AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
379 AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
380 AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
381 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
382 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
383 AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
384 AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
385
386 >;
387 };
388
389 qspi_pins: qspi_pins {
390 pinctrl-single,pins = <
391 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
392 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
393 AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
394 AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
395 AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
396 AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
397 >;
398 };
399
400 mcasp1_pins: mcasp1_pins {
401 pinctrl-single,pins = <
402 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
403 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
404 AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
405 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
406 >;
407 };
408
409 mcasp1_pins_sleep: mcasp1_pins_sleep {
410 pinctrl-single,pins = <
411 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
412 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
413 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
414 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
415 >;
416 };
417
418 lcd_pins: lcd_pins {
419 pinctrl-single,pins = <
420 AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
421 >;
422 };
423
424 usb1_pins: usb1_pins {
425 pinctrl-single,pins = <
426 AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
427 >;
428 };
429
430 usb2_pins: usb2_pins {
431 pinctrl-single,pins = <
432 AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
433 >;
434 };
435
436 mmc3_pins_default: pinmux_mmc3_pins_default {
437 pinctrl-single,pins = <
438 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */
439 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */
440 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */
441 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */
442 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */
443 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */
444 >;
445 };
446
447 mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
448 pinctrl-single,pins = <
449 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */
450 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */
451 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */
452 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */
453 AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */
454 AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */
455 >;
456 };
457
458 wlan_pins_default: pinmux_wlan_pins_default {
459 pinctrl-single,pins = <
460 AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
461 AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
462 >;
463 };
464
465 wlan_pins_sleep: pinmux_wlan_pins_sleep {
466 pinctrl-single,pins = <
467 AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
468 AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
469 >;
470 };
471
472 uart1_bt_pins_default: pinmux_uart1_bt_pins_default {
473 pinctrl-single,pins = <
474 AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */
475 AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
476 AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
477 AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
478 AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
479 >;
480 };
481
482 uart1_bt_pins_sleep: pinmux_uart1_bt_pins_sleep {
483 pinctrl-single,pins = <
484 AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.uart1_rxd */
485 AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.uart1_txd */
486 AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
487 AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
488 AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
489 >;
490 };
491};
492
493&i2c0 {
494 status = "okay";
495 pinctrl-names = "default";
496 pinctrl-0 = <&i2c0_pins>;
497 clock-frequency = <100000>;
498
499 tps@24 {
500 compatible = "ti,tps65218";
501 reg = <0x24>;
502 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
503 interrupt-controller;
504 #interrupt-cells = <2>;
505
506 dcdc1: regulator-dcdc1 {
507 /* VDD_CORE limits min of OPP50 and max of OPP100 */
508 regulator-name = "vdd_core";
509 regulator-min-microvolt = <912000>;
510 regulator-max-microvolt = <1144000>;
511 regulator-boot-on;
512 regulator-always-on;
513 };
514
515 dcdc2: regulator-dcdc2 {
516 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
517 regulator-name = "vdd_mpu";
518 regulator-min-microvolt = <912000>;
519 regulator-max-microvolt = <1378000>;
520 regulator-boot-on;
521 regulator-always-on;
522 };
523
524 dcdc3: regulator-dcdc3 {
525 regulator-name = "vdds_ddr";
526 regulator-boot-on;
527 regulator-always-on;
528 regulator-state-mem {
529 regulator-on-in-suspend;
530 };
531 regulator-state-disk {
532 regulator-off-in-suspend;
533 };
534 };
535
536 dcdc4: regulator-dcdc4 {
537 regulator-name = "v3_3d";
538 regulator-min-microvolt = <3300000>;
539 regulator-max-microvolt = <3300000>;
540 regulator-boot-on;
541 regulator-always-on;
542 };
543
544 dcdc5: regulator-dcdc5 {
545 compatible = "ti,tps65218-dcdc5";
546 regulator-name = "v1_0bat";
547 regulator-min-microvolt = <1000000>;
548 regulator-max-microvolt = <1000000>;
549 regulator-boot-on;
550 regulator-always-on;
551 regulator-state-mem {
552 regulator-on-in-suspend;
553 };
554 };
555
556 dcdc6: regulator-dcdc6 {
557 compatible = "ti,tps65218-dcdc6";
558 regulator-name = "v1_8bat";
559 regulator-min-microvolt = <1800000>;
560 regulator-max-microvolt = <1800000>;
561 regulator-boot-on;
562 regulator-always-on;
563 regulator-state-mem {
564 regulator-on-in-suspend;
565 };
566 };
567
568 ldo1: regulator-ldo1 {
569 regulator-name = "v1_8d";
570 regulator-min-microvolt = <1800000>;
571 regulator-max-microvolt = <1800000>;
572 regulator-boot-on;
573 regulator-always-on;
574 };
575
576 power-button {
577 compatible = "ti,tps65218-pwrbutton";
578 status = "okay";
579 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
580 };
581 };
582
583 at24@50 {
584 compatible = "atmel,24c256";
585 pagesize = <64>;
586 reg = <0x50>;
587 };
588};
589
590&i2c1 {
591 status = "okay";
592 pinctrl-names = "default";
593 pinctrl-0 = <&i2c1_pins>;
594 clock-frequency = <400000>;
595
596 edt-ft5306@38 {
597 status = "okay";
598 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
599 pinctrl-names = "default";
600 pinctrl-0 = <&edt_ft5306_ts_pins>;
601
602 reg = <0x38>;
603 interrupt-parent = <&gpio0>;
604 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
605
606 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
607
608 touchscreen-size-x = <480>;
609 touchscreen-size-y = <272>;
610
611 wakeup-source;
612 };
613
614 tlv320aic3106: tlv320aic3106@1b {
615 #sound-dai-cells = <0>;
616 compatible = "ti,tlv320aic3106";
617 reg = <0x1b>;
618 status = "okay";
619
620 /* Regulators */
621 AVDD-supply = <&dcdc4>;
622 IOVDD-supply = <&dcdc4>;
623 DRVDD-supply = <&dcdc4>;
624 DVDD-supply = <&ldo1>;
625 };
626
627 lis331dlh@18 {
628 compatible = "st,lis331dlh";
629 reg = <0x18>;
630 status = "okay";
631
632 Vdd-supply = <&dcdc4>;
633 Vdd_IO-supply = <&dcdc4>;
634 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
635 };
636};
637
638&epwmss0 {
639 status = "okay";
640};
641
642&ecap0 {
643 status = "okay";
644 pinctrl-names = "default";
645 pinctrl-0 = <&ecap0_pins>;
646};
647
648&gpio0 {
649 status = "okay";
650};
651
652&gpio1 {
653 status = "okay";
654};
655
656&gpio4 {
657 status = "okay";
658};
659
660&gpio5 {
661 status = "okay";
662};
663
664&mmc1 {
665 status = "okay";
666 pinctrl-names = "default";
667 pinctrl-0 = <&mmc1_pins>;
668
669 vmmc-supply = <&dcdc4>;
670 bus-width = <4>;
671 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
672};
673
674&uart1 {
675 status = "okay";
676 pinctrl-names = "default", "sleep";
677 pinctrl-0 = <&uart1_bt_pins_default>;
678 pinctrl-1 = <&uart1_bt_pins_sleep>;
679};
680
681&mmc3 {
682 status = "okay";
683 /*
684 * these are on the crossbar and are outlined in the
685 * xbar-event-map element
686 */
687 dmas = <&edma_xbar 30 0 1>,
688 <&edma_xbar 31 0 2>;
689 dma-names = "tx", "rx";
690 vmmc-supply = <&vmmcwl_fixed>;
691 bus-width = <4>;
692 pinctrl-names = "default", "sleep";
693 pinctrl-0 = <&mmc3_pins_default>;
694 pinctrl-1 = <&mmc3_pins_sleep>;
695 cap-power-off-card;
696 keep-power-in-suspend;
697 ti,non-removable;
698
699 #address-cells = <1>;
700 #size-cells = <0>;
701 wlcore: wlcore@2 {
702 compatible = "ti,wl1835";
703 pinctrl-names = "default", "sleep";
704 pinctrl-0 = <&wlan_pins_default>;
705 pinctrl-1 = <&wlan_pins_sleep>;
706 reg = <2>;
707 interrupt-parent = <&gpio4>;
708 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
709 };
710};
711
712&usb2_phy1 {
713 status = "okay";
714};
715
716&usb1 {
717 dr_mode = "otg";
718 status = "okay";
719 pinctrl-names = "default";
720 pinctrl-0 = <&usb1_pins>;
721};
722
723&usb2_phy2 {
724 status = "okay";
725};
726
727&usb2 {
728 dr_mode = "host";
729 status = "okay";
730 pinctrl-names = "default";
731 pinctrl-0 = <&usb2_pins>;
732};
733
734&qspi {
735 status = "okay";
736 pinctrl-names = "default";
737 pinctrl-0 = <&qspi_pins>;
738
739 spi-max-frequency = <48000000>;
740 m25p80@0 {
741 compatible = "mx66l51235l";
742 spi-max-frequency = <48000000>;
743 reg = <0>;
744 spi-cpol;
745 spi-cpha;
746 spi-tx-bus-width = <1>;
747 spi-rx-bus-width = <4>;
748 #address-cells = <1>;
749 #size-cells = <1>;
750
751 /* MTD partition table.
752 * The ROM checks the first 512KiB
753 * for a valid file to boot(XIP).
754 */
755 partition@0 {
756 label = "QSPI.U_BOOT";
757 reg = <0x00000000 0x000080000>;
758 };
759 partition@1 {
760 label = "QSPI.U_BOOT.backup";
761 reg = <0x00080000 0x00080000>;
762 };
763 partition@2 {
764 label = "QSPI.U-BOOT-SPL_OS";
765 reg = <0x00100000 0x00010000>;
766 };
767 partition@3 {
768 label = "QSPI.U_BOOT_ENV";
769 reg = <0x00110000 0x00010000>;
770 };
771 partition@4 {
772 label = "QSPI.U-BOOT-ENV.backup";
773 reg = <0x00120000 0x00010000>;
774 };
775 partition@5 {
776 label = "QSPI.KERNEL";
777 reg = <0x00130000 0x0800000>;
778 };
779 partition@6 {
780 label = "QSPI.FILESYSTEM";
781 reg = <0x00930000 0x36D0000>;
782 };
783 };
784};
785
786&mac {
787 pinctrl-names = "default", "sleep";
788 pinctrl-0 = <&cpsw_default>;
789 pinctrl-1 = <&cpsw_sleep>;
790 dual_emac = <1>;
791 status = "okay";
792};
793
794&davinci_mdio {
795 pinctrl-names = "default", "sleep";
796 pinctrl-0 = <&davinci_mdio_default>;
797 pinctrl-1 = <&davinci_mdio_sleep>;
798 status = "okay";
799
800 ethphy0: ethernet-phy@4 {
801 reg = <4>;
802 };
803
804 ethphy1: ethernet-phy@5 {
805 reg = <5>;
806 };
807};
808
809&cpsw_emac0 {
810 phy-handle = <ðphy0>;
811 phy-mode = "rgmii";
812 dual_emac_res_vlan = <1>;
813};
814
815&cpsw_emac1 {
816 phy-handle = <ðphy1>;
817 phy-mode = "rgmii";
818 dual_emac_res_vlan = <2>;
819};
820
821&elm {
822 status = "okay";
823};
824
825&mcasp1 {
826 #sound-dai-cells = <0>;
827 pinctrl-names = "default", "sleep";
828 pinctrl-0 = <&mcasp1_pins>;
829 pinctrl-1 = <&mcasp1_pins_sleep>;
830
831 status = "okay";
832
833 op-mode = <0>;
834 tdm-slots = <2>;
835 serial-dir = <
836 0 0 1 2
837 >;
838
839 tx-num-evt = <1>;
840 rx-num-evt = <1>;
841};
842
843&dss {
844 status = "okay";
845
846 pinctrl-names = "default";
847 pinctrl-0 = <&dss_pins>;
848
849 port {
850 dpi_out: endpoint@0 {
851 remote-endpoint = <&lcd_in>;
852 data-lines = <24>;
853 };
854 };
855};
856
857&rtc {
858 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
859 clock-names = "ext-clk", "int-clk";
860 status = "okay";
861};
862
863&wdt {
864 status = "okay";
865};
866
867&cpu {
868 cpu0-supply = <&dcdc2>;
869};
870
871&vpfe0 {
872 status = "okay";
873 pinctrl-names = "default", "sleep";
874 pinctrl-0 = <&vpfe0_pins_default>;
875 pinctrl-1 = <&vpfe0_pins_sleep>;
876
877 /* Camera port */
878 port {
879 vpfe0_ep: endpoint {
880 /* remote-endpoint = <&sensor>; add once we have it */
881 ti,am437x-vpfe-interface = <0>;
882 bus-width = <8>;
883 hsync-active = <0>;
884 vsync-active = <0>;
885 };
886 };
887};