1 /*
   2  * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
   3  * All rights reserved.  www.lanmedia.com
   4  * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
   5  *
   6  * This code is written by:
   7  * Andrew Stanley-Jones (asj@cban.com)
   8  * Rob Braun (bbraun@vix.com),
   9  * Michael Graff (explorer@vix.com) and
  10  * Matt Thomas (matt@3am-software.com).
  11  *
  12  * With Help By:
  13  * David Boggs
  14  * Ron Crane
  15  * Alan Cox
  16  *
  17  * This software may be used and distributed according to the terms
  18  * of the GNU General Public License version 2, incorporated herein by reference.
  19  *
  20  * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
  21  *
  22  * To control link specific options lmcctl is required.
  23  * It can be obtained from ftp.lanmedia.com.
  24  *
  25  * Linux driver notes:
  26  * Linux uses the device struct lmc_private to pass private information
  27  * around.
  28  *
  29  * The initialization portion of this driver (the lmc_reset() and the
  30  * lmc_dec_reset() functions, as well as the led controls and the
  31  * lmc_initcsrs() functions.
  32  *
  33  * The watchdog function runs every second and checks to see if
  34  * we still have link, and that the timing source is what we expected
  35  * it to be.  If link is lost, the interface is marked down, and
  36  * we no longer can transmit.
  37  *
  38  */
  39
  40#include <linux/kernel.h>
  41#include <linux/module.h>
  42#include <linux/string.h>
  43#include <linux/timer.h>
  44#include <linux/ptrace.h>
  45#include <linux/errno.h>
  46#include <linux/ioport.h>
  47#include <linux/slab.h>
  48#include <linux/interrupt.h>
  49#include <linux/pci.h>
  50#include <linux/delay.h>
  51#include <linux/hdlc.h>
  52#include <linux/in.h>
  53#include <linux/if_arp.h>
  54#include <linux/netdevice.h>
  55#include <linux/etherdevice.h>
  56#include <linux/skbuff.h>
  57#include <linux/inet.h>
  58#include <linux/bitops.h>
  59#include <asm/processor.h>             /* Processor type for cache alignment. */
  60#include <asm/io.h>
  61#include <asm/dma.h>
  62#include <linux/uaccess.h>
  63//#include <asm/spinlock.h>
  64
  65#define DRIVER_MAJOR_VERSION     1
  66#define DRIVER_MINOR_VERSION    34
  67#define DRIVER_SUB_VERSION       0
  68
  69#define DRIVER_VERSION  ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
  70
  71#include "lmc.h"
  72#include "lmc_var.h"
  73#include "lmc_ioctl.h"
  74#include "lmc_debug.h"
  75#include "lmc_proto.h"
  76
  77static int LMC_PKT_BUF_SZ = 1542;
  78
  79static const struct pci_device_id lmc_pci_tbl[] = {
  80	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  81	  PCI_VENDOR_ID_LMC, PCI_ANY_ID },
  82	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  83	  PCI_ANY_ID, PCI_VENDOR_ID_LMC },
  84	{ 0 }
  85};
  86
  87MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
  88MODULE_LICENSE("GPL v2");
  89
  90
  91static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
  92					struct net_device *dev);
  93static int lmc_rx (struct net_device *dev);
  94static int lmc_open(struct net_device *dev);
  95static int lmc_close(struct net_device *dev);
  96static struct net_device_stats *lmc_get_stats(struct net_device *dev);
  97static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
  98static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
  99static void lmc_softreset(lmc_softc_t * const);
 100static void lmc_running_reset(struct net_device *dev);
 101static int lmc_ifdown(struct net_device * const);
 102static void lmc_watchdog(struct timer_list *t);
 103static void lmc_reset(lmc_softc_t * const sc);
 104static void lmc_dec_reset(lmc_softc_t * const sc);
 105static void lmc_driver_timeout(struct net_device *dev);
 106
 107/*
 108 * linux reserves 16 device specific IOCTLs.  We call them
 109 * LMCIOC* to control various bits of our world.
 110 */
 111int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
 112{
 113    lmc_softc_t *sc = dev_to_sc(dev);
 114    lmc_ctl_t ctl;
 115    int ret = -EOPNOTSUPP;
 116    u16 regVal;
 117    unsigned long flags;
 118
 119    lmc_trace(dev, "lmc_ioctl in");
 120
 121    /*
 122     * Most functions mess with the structure
 123     * Disable interrupts while we do the polling
 124     */
 125
 126    switch (cmd) {
 127        /*
 128         * Return current driver state.  Since we keep this up
 129         * To date internally, just copy this out to the user.
 130         */
 131    case LMCIOCGINFO: /*fold01*/
 132	if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
 133		ret = -EFAULT;
 134	else
 135		ret = 0;
 136        break;
 137
 138    case LMCIOCSINFO: /*fold01*/
 139        if (!capable(CAP_NET_ADMIN)) {
 140            ret = -EPERM;
 141            break;
 142        }
 143
 144        if(dev->flags & IFF_UP){
 145            ret = -EBUSY;
 146            break;
 147        }
 148
 149	if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 150		ret = -EFAULT;
 151		break;
 152	}
 153
 154	spin_lock_irqsave(&sc->lmc_lock, flags);
 155        sc->lmc_media->set_status (sc, &ctl);
 156
 157        if(ctl.crc_length != sc->ictl.crc_length) {
 158            sc->lmc_media->set_crc_length(sc, ctl.crc_length);
 159	    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
 160		sc->TxDescriptControlInit |=  LMC_TDES_ADD_CRC_DISABLE;
 161	    else
 162		sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
 163        }
 164	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 165
 166        ret = 0;
 167        break;
 168
 169    case LMCIOCIFTYPE: /*fold01*/
 170        {
 171	    u16 old_type = sc->if_type;
 172	    u16	new_type;
 173
 174	    if (!capable(CAP_NET_ADMIN)) {
 175		ret = -EPERM;
 176		break;
 177	    }
 178
 179	    if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
 180		ret = -EFAULT;
 181		break;
 182	    }
 183
 184            
 185	    if (new_type == old_type)
 186	    {
 187		ret = 0 ;
 188		break;				/* no change */
 189            }
 190            
 191	    spin_lock_irqsave(&sc->lmc_lock, flags);
 192            lmc_proto_close(sc);
 193
 194            sc->if_type = new_type;
 195            lmc_proto_attach(sc);
 196	    ret = lmc_proto_open(sc);
 197	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 198	    break;
 199	}
 200
 201    case LMCIOCGETXINFO: /*fold01*/
 202	spin_lock_irqsave(&sc->lmc_lock, flags);
 203        sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
 204
 205        sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
 206        sc->lmc_xinfo.PciSlotNumber = 0;
 207        sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
 208        sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
 209        sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
 210        sc->lmc_xinfo.XilinxRevisionNumber =
 211            lmc_mii_readreg (sc, 0, 3) & 0xf;
 212        sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
 213        sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
 214        sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
 215	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 216
 217        sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
 218
 219        if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
 220			 sizeof(struct lmc_xinfo)))
 221		ret = -EFAULT;
 222	else
 223		ret = 0;
 224
 225        break;
 226
 227    case LMCIOCGETLMCSTATS:
 228	    spin_lock_irqsave(&sc->lmc_lock, flags);
 229	    if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
 230		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
 231		    sc->extra_stats.framingBitErrorCount +=
 232			    lmc_mii_readreg(sc, 0, 18) & 0xff;
 233		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
 234		    sc->extra_stats.framingBitErrorCount +=
 235			    (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 236		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
 237		    sc->extra_stats.lineCodeViolationCount +=
 238			    lmc_mii_readreg(sc, 0, 18) & 0xff;
 239		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
 240		    sc->extra_stats.lineCodeViolationCount +=
 241			    (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 242		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
 243		    regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
 244
 245		    sc->extra_stats.lossOfFrameCount +=
 246			    (regVal & T1FRAMER_LOF_MASK) >> 4;
 247		    sc->extra_stats.changeOfFrameAlignmentCount +=
 248			    (regVal & T1FRAMER_COFA_MASK) >> 2;
 249		    sc->extra_stats.severelyErroredFrameCount +=
 250			    regVal & T1FRAMER_SEF_MASK;
 251	    }
 252	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 253	    if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
 254			     sizeof(sc->lmc_device->stats)) ||
 255		copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
 256			     &sc->extra_stats, sizeof(sc->extra_stats)))
 257		    ret = -EFAULT;
 258	    else
 259		    ret = 0;
 260	    break;
 261
 262    case LMCIOCCLEARLMCSTATS:
 263	    if (!capable(CAP_NET_ADMIN)) {
 264		    ret = -EPERM;
 265		    break;
 266	    }
 267
 268	    spin_lock_irqsave(&sc->lmc_lock, flags);
 269	    memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
 270	    memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
 271	    sc->extra_stats.check = STATCHECK;
 272	    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 273		    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 274	    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 275	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 276	    ret = 0;
 277	    break;
 278
 279    case LMCIOCSETCIRCUIT: /*fold01*/
 280        if (!capable(CAP_NET_ADMIN)){
 281            ret = -EPERM;
 282            break;
 283        }
 284
 285        if(dev->flags & IFF_UP){
 286            ret = -EBUSY;
 287            break;
 288        }
 289
 290	if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 291		ret = -EFAULT;
 292		break;
 293	}
 294	spin_lock_irqsave(&sc->lmc_lock, flags);
 295        sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
 296        sc->ictl.circuit_type = ctl.circuit_type;
 297	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 298        ret = 0;
 299
 300        break;
 301
 302    case LMCIOCRESET: /*fold01*/
 303        if (!capable(CAP_NET_ADMIN)){
 304            ret = -EPERM;
 305            break;
 306        }
 307
 308	spin_lock_irqsave(&sc->lmc_lock, flags);
 309        /* Reset driver and bring back to current state */
 310        printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 311        lmc_running_reset (dev);
 312        printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 313
 314        LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 315	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 316
 317        ret = 0;
 318        break;
 319
 320#ifdef DEBUG
 321    case LMCIOCDUMPEVENTLOG:
 322	if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
 323		ret = -EFAULT;
 324		break;
 325	}
 326	if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
 327			 sizeof(lmcEventLogBuf)))
 328		ret = -EFAULT;
 329	else
 330		ret = 0;
 331
 332        break;
 333#endif /* end ifdef _DBG_EVENTLOG */
 334    case LMCIOCT1CONTROL: /*fold01*/
 335        if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
 336            ret = -EOPNOTSUPP;
 337            break;
 338        }
 339        break;
 340    case LMCIOCXILINX: /*fold01*/
 341        {
 342            struct lmc_xilinx_control xc; /*fold02*/
 343
 344            if (!capable(CAP_NET_ADMIN)){
 345                ret = -EPERM;
 346                break;
 347            }
 348
 349            /*
 350             * Stop the xwitter whlie we restart the hardware
 351             */
 352            netif_stop_queue(dev);
 353
 354	    if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
 355		ret = -EFAULT;
 356		break;
 357	    }
 358            switch(xc.command){
 359            case lmc_xilinx_reset: /*fold02*/
 360                {
 361                    u16 mii;
 362		    spin_lock_irqsave(&sc->lmc_lock, flags);
 363                    mii = lmc_mii_readreg (sc, 0, 16);
 364
 365                    /*
 366                     * Make all of them 0 and make input
 367                     */
 368                    lmc_gpio_mkinput(sc, 0xff);
 369
 370                    /*
 371                     * make the reset output
 372                     */
 373                    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
 374
 375                    /*
 376                     * RESET low to force configuration.  This also forces
 377                     * the transmitter clock to be internal, but we expect to reset
 378                     * that later anyway.
 379                     */
 380
 381                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 382                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 383
 384
 385                    /*
 386                     * hold for more than 10 microseconds
 387                     */
 388                    udelay(50);
 389
 390                    sc->lmc_gpio |= LMC_GEP_RESET;
 391                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 392
 393
 394                    /*
 395                     * stop driving Xilinx-related signals
 396                     */
 397                    lmc_gpio_mkinput(sc, 0xff);
 398
 399                    /* Reset the frammer hardware */
 400                    sc->lmc_media->set_link_status (sc, 1);
 401                    sc->lmc_media->set_status (sc, NULL);
 402//                    lmc_softreset(sc);
 403
 404                    {
 405                        int i;
 406                        for(i = 0; i < 5; i++){
 407                            lmc_led_on(sc, LMC_DS3_LED0);
 408                            mdelay(100);
 409                            lmc_led_off(sc, LMC_DS3_LED0);
 410                            lmc_led_on(sc, LMC_DS3_LED1);
 411                            mdelay(100);
 412                            lmc_led_off(sc, LMC_DS3_LED1);
 413                            lmc_led_on(sc, LMC_DS3_LED3);
 414                            mdelay(100);
 415                            lmc_led_off(sc, LMC_DS3_LED3);
 416                            lmc_led_on(sc, LMC_DS3_LED2);
 417                            mdelay(100);
 418                            lmc_led_off(sc, LMC_DS3_LED2);
 419                        }
 420                    }
 421		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 422                    
 423                    
 424
 425                    ret = 0x0;
 426
 427                }
 428
 429                break;
 430            case lmc_xilinx_load_prom: /*fold02*/
 431                {
 432                    u16 mii;
 433                    int timeout = 500000;
 434		    spin_lock_irqsave(&sc->lmc_lock, flags);
 435                    mii = lmc_mii_readreg (sc, 0, 16);
 436
 437                    /*
 438                     * Make all of them 0 and make input
 439                     */
 440                    lmc_gpio_mkinput(sc, 0xff);
 441
 442                    /*
 443                     * make the reset output
 444                     */
 445                    lmc_gpio_mkoutput(sc,  LMC_GEP_DP | LMC_GEP_RESET);
 446
 447                    /*
 448                     * RESET low to force configuration.  This also forces
 449                     * the transmitter clock to be internal, but we expect to reset
 450                     * that later anyway.
 451                     */
 452
 453                    sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
 454                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 455
 456
 457                    /*
 458                     * hold for more than 10 microseconds
 459                     */
 460                    udelay(50);
 461
 462                    sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
 463                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 464
 465                    /*
 466                     * busy wait for the chip to reset
 467                     */
 468                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 469                           (timeout-- > 0))
 470                        cpu_relax();
 471
 472
 473                    /*
 474                     * stop driving Xilinx-related signals
 475                     */
 476                    lmc_gpio_mkinput(sc, 0xff);
 477		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 478
 479                    ret = 0x0;
 480                    
 481
 482                    break;
 483
 484                }
 485
 486            case lmc_xilinx_load: /*fold02*/
 487                {
 488                    char *data;
 489                    int pos;
 490                    int timeout = 500000;
 491
 492                    if (!xc.data) {
 493                            ret = -EINVAL;
 494                            break;
 495                    }
 496
 497                    data = memdup_user(xc.data, xc.len);
 498                    if (IS_ERR(data)) {
 499                            ret = PTR_ERR(data);
 500                            break;
 501                    }
 502
 503                    printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
 504
 505		    spin_lock_irqsave(&sc->lmc_lock, flags);
 506                    lmc_gpio_mkinput(sc, 0xff);
 507
 508                    /*
 509                     * Clear the Xilinx and start prgramming from the DEC
 510                     */
 511
 512                    /*
 513                     * Set ouput as:
 514                     * Reset: 0 (active)
 515                     * DP:    0 (active)
 516                     * Mode:  1
 517                     *
 518                     */
 519                    sc->lmc_gpio = 0x00;
 520                    sc->lmc_gpio &= ~LMC_GEP_DP;
 521                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 522                    sc->lmc_gpio |=  LMC_GEP_MODE;
 523                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 524
 525                    lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
 526
 527                    /*
 528                     * Wait at least 10 us 20 to be safe
 529                     */
 530                    udelay(50);
 531
 532                    /*
 533                     * Clear reset and activate programming lines
 534                     * Reset: Input
 535                     * DP:    Input
 536                     * Clock: Output
 537                     * Data:  Output
 538                     * Mode:  Output
 539                     */
 540                    lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
 541
 542                    /*
 543                     * Set LOAD, DATA, Clock to 1
 544                     */
 545                    sc->lmc_gpio = 0x00;
 546                    sc->lmc_gpio |= LMC_GEP_MODE;
 547                    sc->lmc_gpio |= LMC_GEP_DATA;
 548                    sc->lmc_gpio |= LMC_GEP_CLK;
 549                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 550                    
 551                    lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
 552
 553                    /*
 554                     * busy wait for the chip to reset
 555                     */
 556                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 557                           (timeout-- > 0))
 558                        cpu_relax();
 559
 560                    printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
 561
 562                    for(pos = 0; pos < xc.len; pos++){
 563                        switch(data[pos]){
 564                        case 0:
 565                            sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
 566                            break;
 567                        case 1:
 568                            sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
 569                            break;
 570                        default:
 571                            printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
 572                            sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
 573                        }
 574                        sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
 575                        sc->lmc_gpio |= LMC_GEP_MODE;
 576                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 577                        udelay(1);
 578                        
 579                        sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
 580                        sc->lmc_gpio |= LMC_GEP_MODE;
 581                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 582                        udelay(1);
 583                    }
 584                    if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
 585                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
 586                    }
 587                    else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
 588                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
 589                    }
 590                    else {
 591                        printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
 592                    }
 593
 594                    lmc_gpio_mkinput(sc, 0xff);
 595                    
 596                    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
 597                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 598
 599                    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
 600                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 601		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 602
 603                    kfree(data);
 604                    
 605                    ret = 0;
 606                    
 607                    break;
 608                }
 609            default: /*fold02*/
 610                ret = -EBADE;
 611                break;
 612            }
 613
 614            netif_wake_queue(dev);
 615            sc->lmc_txfull = 0;
 616
 617        }
 618        break;
 619    default: /*fold01*/
 620        /* If we don't know what to do, give the protocol a shot. */
 621        ret = lmc_proto_ioctl (sc, ifr, cmd);
 622        break;
 623    }
 624
 625    lmc_trace(dev, "lmc_ioctl out");
 626
 627    return ret;
 628}
 629
 630
 631/* the watchdog process that cruises around */
 632static void lmc_watchdog(struct timer_list *t) /*fold00*/
 633{
 634    lmc_softc_t *sc = from_timer(sc, t, timer);
 635    struct net_device *dev = sc->lmc_device;
 636    int link_status;
 637    u32 ticks;
 638    unsigned long flags;
 639
 640    lmc_trace(dev, "lmc_watchdog in");
 641
 642    spin_lock_irqsave(&sc->lmc_lock, flags);
 643
 644    if(sc->check != 0xBEAFCAFE){
 645        printk("LMC: Corrupt net_device struct, breaking out\n");
 646	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 647        return;
 648    }
 649
 650
 651    /* Make sure the tx jabber and rx watchdog are off,
 652     * and the transmit and receive processes are running.
 653     */
 654
 655    LMC_CSR_WRITE (sc, csr_15, 0x00000011);
 656    sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
 657    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
 658
 659    if (sc->lmc_ok == 0)
 660        goto kick_timer;
 661
 662    LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 663
 664    /* --- begin time out check -----------------------------------
 665     * check for a transmit interrupt timeout
 666     * Has the packet xmt vs xmt serviced threshold been exceeded */
 667    if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 668	sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 669	sc->tx_TimeoutInd == 0)
 670    {
 671
 672        /* wait for the watchdog to come around again */
 673        sc->tx_TimeoutInd = 1;
 674    }
 675    else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 676	     sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 677	     sc->tx_TimeoutInd)
 678    {
 679
 680        LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
 681
 682        sc->tx_TimeoutDisplay = 1;
 683	sc->extra_stats.tx_TimeoutCnt++;
 684
 685        /* DEC chip is stuck, hit it with a RESET!!!! */
 686        lmc_running_reset (dev);
 687
 688
 689        /* look at receive & transmit process state to make sure they are running */
 690        LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
 691
 692        /* look at: DSR - 02  for Reg 16
 693         *                  CTS - 08
 694         *                  DCD - 10
 695         *                  RI  - 20
 696         * for Reg 17
 697         */
 698        LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
 699
 700        /* reset the transmit timeout detection flag */
 701        sc->tx_TimeoutInd = 0;
 702        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 703	sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 704    } else {
 705        sc->tx_TimeoutInd = 0;
 706        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 707	sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 708    }
 709
 710    /* --- end time out check ----------------------------------- */
 711
 712
 713    link_status = sc->lmc_media->get_link_status (sc);
 714
 715    /*
 716     * hardware level link lost, but the interface is marked as up.
 717     * Mark it as down.
 718     */
 719    if ((link_status == 0) && (sc->last_link_status != 0)) {
 720        printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
 721        sc->last_link_status = 0;
 722        /* lmc_reset (sc); Why reset??? The link can go down ok */
 723
 724        /* Inform the world that link has been lost */
 725	netif_carrier_off(dev);
 726    }
 727
 728    /*
 729     * hardware link is up, but the interface is marked as down.
 730     * Bring it back up again.
 731     */
 732     if (link_status != 0 && sc->last_link_status == 0) {
 733         printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
 734         sc->last_link_status = 1;
 735         /* lmc_reset (sc); Again why reset??? */
 736
 737	 netif_carrier_on(dev);
 738     }
 739
 740    /* Call media specific watchdog functions */
 741    sc->lmc_media->watchdog(sc);
 742
 743    /*
 744     * Poke the transmitter to make sure it
 745     * never stops, even if we run out of mem
 746     */
 747    LMC_CSR_WRITE(sc, csr_rxpoll, 0);
 748
 749    /*
 750     * Check for code that failed
 751     * and try and fix it as appropriate
 752     */
 753    if(sc->failed_ring == 1){
 754        /*
 755         * Failed to setup the recv/xmit rin
 756         * Try again
 757         */
 758        sc->failed_ring = 0;
 759        lmc_softreset(sc);
 760    }
 761    if(sc->failed_recv_alloc == 1){
 762        /*
 763         * We failed to alloc mem in the
 764         * interrupt handler, go through the rings
 765         * and rebuild them
 766         */
 767        sc->failed_recv_alloc = 0;
 768        lmc_softreset(sc);
 769    }
 770
 771
 772    /*
 773     * remember the timer value
 774     */
 775kick_timer:
 776
 777    ticks = LMC_CSR_READ (sc, csr_gp_timer);
 778    LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
 779    sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
 780
 781    /*
 782     * restart this timer.
 783     */
 784    sc->timer.expires = jiffies + (HZ);
 785    add_timer (&sc->timer);
 786
 787    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 788
 789    lmc_trace(dev, "lmc_watchdog out");
 790
 791}
 792
 793static int lmc_attach(struct net_device *dev, unsigned short encoding,
 794		      unsigned short parity)
 795{
 796	if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
 797		return 0;
 798	return -EINVAL;
 799}
 800
 801static const struct net_device_ops lmc_ops = {
 802	.ndo_open       = lmc_open,
 803	.ndo_stop       = lmc_close,
 804	.ndo_start_xmit = hdlc_start_xmit,
 805	.ndo_do_ioctl   = lmc_ioctl,
 806	.ndo_tx_timeout = lmc_driver_timeout,
 807	.ndo_get_stats  = lmc_get_stats,
 808};
 809
 810static int lmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 811{
 812	lmc_softc_t *sc;
 813	struct net_device *dev;
 814	u16 subdevice;
 815	u16 AdapModelNum;
 816	int err;
 817	static int cards_found;
 818
 819	/* lmc_trace(dev, "lmc_init_one in"); */
 820
 821	err = pcim_enable_device(pdev);
 822	if (err) {
 823		printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
 824		return err;
 825	}
 826
 827	err = pci_request_regions(pdev, "lmc");
 828	if (err) {
 829		printk(KERN_ERR "lmc: pci_request_region failed\n");
 830		return err;
 831	}
 832
 833	/*
 834	 * Allocate our own device structure
 835	 */
 836	sc = devm_kzalloc(&pdev->dev, sizeof(lmc_softc_t), GFP_KERNEL);
 837	if (!sc)
 838		return -ENOMEM;
 839
 840	dev = alloc_hdlcdev(sc);
 841	if (!dev) {
 842		printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
 843		return -ENOMEM;
 844	}
 845
 846
 847	dev->type = ARPHRD_HDLC;
 848	dev_to_hdlc(dev)->xmit = lmc_start_xmit;
 849	dev_to_hdlc(dev)->attach = lmc_attach;
 850	dev->netdev_ops = &lmc_ops;
 851	dev->watchdog_timeo = HZ; /* 1 second */
 852	dev->tx_queue_len = 100;
 853	sc->lmc_device = dev;
 854	sc->name = dev->name;
 855	sc->if_type = LMC_PPP;
 856	sc->check = 0xBEAFCAFE;
 857	dev->base_addr = pci_resource_start(pdev, 0);
 858	dev->irq = pdev->irq;
 859	pci_set_drvdata(pdev, dev);
 860	SET_NETDEV_DEV(dev, &pdev->dev);
 861
 862	/*
 863	 * This will get the protocol layer ready and do any 1 time init's
 864	 * Must have a valid sc and dev structure
 865	 */
 866	lmc_proto_attach(sc);
 867
 868	/* Init the spin lock so can call it latter */
 869
 870	spin_lock_init(&sc->lmc_lock);
 871	pci_set_master(pdev);
 872
 873	printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
 874	       dev->base_addr, dev->irq);
 875
 876	err = register_hdlc_device(dev);
 877	if (err) {
 878		printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
 879		free_netdev(dev);
 880		return err;
 881	}
 882
 883    sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
 884    sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
 885
 886    /*
 887     *
 888     * Check either the subvendor or the subdevice, some systems reverse
 889     * the setting in the bois, seems to be version and arch dependent?
 890     * Fix the error, exchange the two values 
 891     */
 892    if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
 893	    subdevice = pdev->subsystem_vendor;
 894
 895    switch (subdevice) {
 896    case PCI_DEVICE_ID_LMC_HSSI:
 897	printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
 898        sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
 899        sc->lmc_media = &lmc_hssi_media;
 900        break;
 901    case PCI_DEVICE_ID_LMC_DS3:
 902	printk(KERN_INFO "%s: LMC DS3\n", dev->name);
 903        sc->lmc_cardtype = LMC_CARDTYPE_DS3;
 904        sc->lmc_media = &lmc_ds3_media;
 905        break;
 906    case PCI_DEVICE_ID_LMC_SSI:
 907	printk(KERN_INFO "%s: LMC SSI\n", dev->name);
 908        sc->lmc_cardtype = LMC_CARDTYPE_SSI;
 909        sc->lmc_media = &lmc_ssi_media;
 910        break;
 911    case PCI_DEVICE_ID_LMC_T1:
 912	printk(KERN_INFO "%s: LMC T1\n", dev->name);
 913        sc->lmc_cardtype = LMC_CARDTYPE_T1;
 914        sc->lmc_media = &lmc_t1_media;
 915        break;
 916    default:
 917	printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
 
 
 918        break;
 919    }
 920
 921    lmc_initcsrs (sc, dev->base_addr, 8);
 922
 923    lmc_gpio_mkinput (sc, 0xff);
 924    sc->lmc_gpio = 0;		/* drive no signals yet */
 925
 926    sc->lmc_media->defaults (sc);
 927
 928    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
 929
 930    /* verify that the PCI Sub System ID matches the Adapter Model number
 931     * from the MII register
 932     */
 933    AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
 934
 935    if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
 936	 subdevice != PCI_DEVICE_ID_LMC_T1) &&
 937	(AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
 938	 subdevice != PCI_DEVICE_ID_LMC_SSI) &&
 939	(AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
 940	 subdevice != PCI_DEVICE_ID_LMC_DS3) &&
 941	(AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
 942	 subdevice != PCI_DEVICE_ID_LMC_HSSI))
 943	    printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
 944		   " Subsystem ID = 0x%04x\n",
 945		   dev->name, AdapModelNum, subdevice);
 946
 947    /*
 948     * reset clock
 949     */
 950    LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
 951
 952    sc->board_idx = cards_found++;
 953    sc->extra_stats.check = STATCHECK;
 954    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 955	    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 956    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 957
 958    sc->lmc_ok = 0;
 959    sc->last_link_status = 0;
 960
 961    lmc_trace(dev, "lmc_init_one out");
 962    return 0;
 963}
 964
 965/*
 966 * Called from pci when removing module.
 967 */
 968static void lmc_remove_one(struct pci_dev *pdev)
 969{
 970	struct net_device *dev = pci_get_drvdata(pdev);
 971
 972	if (dev) {
 973		printk(KERN_DEBUG "%s: removing...\n", dev->name);
 974		unregister_hdlc_device(dev);
 975		free_netdev(dev);
 976	}
 977}
 978
 979/* After this is called, packets can be sent.
 980 * Does not initialize the addresses
 981 */
 982static int lmc_open(struct net_device *dev)
 983{
 984    lmc_softc_t *sc = dev_to_sc(dev);
 985    int err;
 986
 987    lmc_trace(dev, "lmc_open in");
 988
 989    lmc_led_on(sc, LMC_DS3_LED0);
 990
 991    lmc_dec_reset(sc);
 992    lmc_reset(sc);
 993
 994    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
 995    LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
 996		  lmc_mii_readreg(sc, 0, 17));
 997
 998    if (sc->lmc_ok){
 999        lmc_trace(dev, "lmc_open lmc_ok out");
1000        return 0;
1001    }
1002
1003    lmc_softreset (sc);
1004
1005    /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
1006    if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
1007        printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
1008        lmc_trace(dev, "lmc_open irq failed out");
1009        return -EAGAIN;
1010    }
1011    sc->got_irq = 1;
1012
1013    /* Assert Terminal Active */
1014    sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
1015    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1016
1017    /*
1018     * reset to last state.
1019     */
1020    sc->lmc_media->set_status (sc, NULL);
1021
1022    /* setup default bits to be used in tulip_desc_t transmit descriptor
1023     * -baz */
1024    sc->TxDescriptControlInit = (
1025                                 LMC_TDES_INTERRUPT_ON_COMPLETION
1026                                 | LMC_TDES_FIRST_SEGMENT
1027                                 | LMC_TDES_LAST_SEGMENT
1028                                 | LMC_TDES_SECOND_ADDR_CHAINED
1029                                 | LMC_TDES_DISABLE_PADDING
1030                                );
1031
1032    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1033        /* disable 32 bit CRC generated by ASIC */
1034        sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1035    }
1036    sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1037    /* Acknoledge the Terminal Active and light LEDs */
1038
1039    /* dev->flags |= IFF_UP; */
1040
1041    if ((err = lmc_proto_open(sc)) != 0)
1042	    return err;
1043
1044    netif_start_queue(dev);
1045    sc->extra_stats.tx_tbusy0++;
1046
1047    /*
1048     * select what interrupts we want to get
1049     */
1050    sc->lmc_intrmask = 0;
1051    /* Should be using the default interrupt mask defined in the .h file. */
1052    sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1053                         | TULIP_STS_RXINTR
1054                         | TULIP_STS_TXINTR
1055                         | TULIP_STS_ABNRMLINTR
1056                         | TULIP_STS_SYSERROR
1057                         | TULIP_STS_TXSTOPPED
1058                         | TULIP_STS_TXUNDERFLOW
1059                         | TULIP_STS_RXSTOPPED
1060		         | TULIP_STS_RXNOBUF
1061                        );
1062    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1063
1064    sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1065    sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1066    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1067
1068    sc->lmc_ok = 1; /* Run watchdog */
1069
1070    /*
1071     * Set the if up now - pfb
1072     */
1073
1074    sc->last_link_status = 1;
1075
1076    /*
1077     * Setup a timer for the watchdog on probe, and start it running.
1078     * Since lmc_ok == 0, it will be a NOP for now.
1079     */
1080    timer_setup(&sc->timer, lmc_watchdog, 0);
1081    sc->timer.expires = jiffies + HZ;
1082    add_timer (&sc->timer);
1083
1084    lmc_trace(dev, "lmc_open out");
1085
1086    return 0;
1087}
1088
1089/* Total reset to compensate for the AdTran DSU doing bad things
1090 *  under heavy load
1091 */
1092
1093static void lmc_running_reset (struct net_device *dev) /*fold00*/
1094{
1095    lmc_softc_t *sc = dev_to_sc(dev);
1096
1097    lmc_trace(dev, "lmc_running_reset in");
1098
1099    /* stop interrupts */
1100    /* Clear the interrupt mask */
1101    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1102
1103    lmc_dec_reset (sc);
1104    lmc_reset (sc);
1105    lmc_softreset (sc);
1106    /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1107    sc->lmc_media->set_link_status (sc, 1);
1108    sc->lmc_media->set_status (sc, NULL);
1109
1110    netif_wake_queue(dev);
1111
1112    sc->lmc_txfull = 0;
1113    sc->extra_stats.tx_tbusy0++;
1114
1115    sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1116    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1117
1118    sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1119    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1120
1121    lmc_trace(dev, "lmc_runnin_reset_out");
1122}
1123
1124
1125/* This is what is called when you ifconfig down a device.
1126 * This disables the timer for the watchdog and keepalives,
1127 * and disables the irq for dev.
1128 */
1129static int lmc_close(struct net_device *dev)
1130{
1131    /* not calling release_region() as we should */
1132    lmc_softc_t *sc = dev_to_sc(dev);
1133
1134    lmc_trace(dev, "lmc_close in");
1135
1136    sc->lmc_ok = 0;
1137    sc->lmc_media->set_link_status (sc, 0);
1138    del_timer (&sc->timer);
1139    lmc_proto_close(sc);
1140    lmc_ifdown (dev);
1141
1142    lmc_trace(dev, "lmc_close out");
1143
1144    return 0;
1145}
1146
1147/* Ends the transfer of packets */
1148/* When the interface goes down, this is called */
1149static int lmc_ifdown (struct net_device *dev) /*fold00*/
1150{
1151    lmc_softc_t *sc = dev_to_sc(dev);
1152    u32 csr6;
1153    int i;
1154
1155    lmc_trace(dev, "lmc_ifdown in");
1156
1157    /* Don't let anything else go on right now */
1158    //    dev->start = 0;
1159    netif_stop_queue(dev);
1160    sc->extra_stats.tx_tbusy1++;
1161
1162    /* stop interrupts */
1163    /* Clear the interrupt mask */
1164    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1165
1166    /* Stop Tx and Rx on the chip */
1167    csr6 = LMC_CSR_READ (sc, csr_command);
1168    csr6 &= ~LMC_DEC_ST;		/* Turn off the Transmission bit */
1169    csr6 &= ~LMC_DEC_SR;		/* Turn off the Receive bit */
1170    LMC_CSR_WRITE (sc, csr_command, csr6);
1171
1172    sc->lmc_device->stats.rx_missed_errors +=
1173	    LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1174
1175    /* release the interrupt */
1176    if(sc->got_irq == 1){
1177        free_irq (dev->irq, dev);
1178        sc->got_irq = 0;
1179    }
1180
1181    /* free skbuffs in the Rx queue */
1182    for (i = 0; i < LMC_RXDESCS; i++)
1183    {
1184        struct sk_buff *skb = sc->lmc_rxq[i];
1185        sc->lmc_rxq[i] = NULL;
1186        sc->lmc_rxring[i].status = 0;
1187        sc->lmc_rxring[i].length = 0;
1188        sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1189        if (skb != NULL)
1190            dev_kfree_skb(skb);
1191        sc->lmc_rxq[i] = NULL;
1192    }
1193
1194    for (i = 0; i < LMC_TXDESCS; i++)
1195    {
1196        if (sc->lmc_txq[i] != NULL)
1197            dev_kfree_skb(sc->lmc_txq[i]);
1198        sc->lmc_txq[i] = NULL;
1199    }
1200
1201    lmc_led_off (sc, LMC_MII16_LED_ALL);
1202
1203    netif_wake_queue(dev);
1204    sc->extra_stats.tx_tbusy0++;
1205
1206    lmc_trace(dev, "lmc_ifdown out");
1207
1208    return 0;
1209}
1210
1211/* Interrupt handling routine.  This will take an incoming packet, or clean
1212 * up after a trasmit.
1213 */
1214static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
1215{
1216    struct net_device *dev = (struct net_device *) dev_instance;
1217    lmc_softc_t *sc = dev_to_sc(dev);
1218    u32 csr;
1219    int i;
1220    s32 stat;
1221    unsigned int badtx;
1222    u32 firstcsr;
1223    int max_work = LMC_RXDESCS;
1224    int handled = 0;
1225
1226    lmc_trace(dev, "lmc_interrupt in");
1227
1228    spin_lock(&sc->lmc_lock);
1229
1230    /*
1231     * Read the csr to find what interrupts we have (if any)
1232     */
1233    csr = LMC_CSR_READ (sc, csr_status);
1234
1235    /*
1236     * Make sure this is our interrupt
1237     */
1238    if ( ! (csr & sc->lmc_intrmask)) {
1239        goto lmc_int_fail_out;
1240    }
1241
1242    firstcsr = csr;
1243
1244    /* always go through this loop at least once */
1245    while (csr & sc->lmc_intrmask) {
1246	handled = 1;
1247
1248        /*
1249         * Clear interrupt bits, we handle all case below
1250         */
1251        LMC_CSR_WRITE (sc, csr_status, csr);
1252
1253        /*
1254         * One of
1255         *  - Transmit process timed out CSR5<1>
1256         *  - Transmit jabber timeout    CSR5<3>
1257         *  - Transmit underflow         CSR5<5>
1258         *  - Transmit Receiver buffer unavailable CSR5<7>
1259         *  - Receive process stopped    CSR5<8>
1260         *  - Receive watchdog timeout   CSR5<9>
1261         *  - Early transmit interrupt   CSR5<10>
1262         *
1263         * Is this really right? Should we do a running reset for jabber?
1264         * (being a WAN card and all)
1265         */
1266        if (csr & TULIP_STS_ABNRMLINTR){
1267            lmc_running_reset (dev);
1268            break;
1269        }
1270        
1271        if (csr & TULIP_STS_RXINTR){
1272            lmc_trace(dev, "rx interrupt");
1273            lmc_rx (dev);
1274            
1275        }
1276        if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1277
1278	    int		n_compl = 0 ;
1279            /* reset the transmit timeout detection flag -baz */
1280	    sc->extra_stats.tx_NoCompleteCnt = 0;
1281
1282            badtx = sc->lmc_taint_tx;
1283            i = badtx % LMC_TXDESCS;
1284
1285            while ((badtx < sc->lmc_next_tx)) {
1286                stat = sc->lmc_txring[i].status;
1287
1288                LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1289						 sc->lmc_txring[i].length);
1290                /*
1291                 * If bit 31 is 1 the tulip owns it break out of the loop
1292                 */
1293                if (stat & 0x80000000)
1294                    break;
1295
1296		n_compl++ ;		/* i.e., have an empty slot in ring */
1297                /*
1298                 * If we have no skbuff or have cleared it
1299                 * Already continue to the next buffer
1300                 */
1301                if (sc->lmc_txq[i] == NULL)
1302                    continue;
1303
1304		/*
1305		 * Check the total error summary to look for any errors
1306		 */
1307		if (stat & 0x8000) {
1308			sc->lmc_device->stats.tx_errors++;
1309			if (stat & 0x4104)
1310				sc->lmc_device->stats.tx_aborted_errors++;
1311			if (stat & 0x0C00)
1312				sc->lmc_device->stats.tx_carrier_errors++;
1313			if (stat & 0x0200)
1314				sc->lmc_device->stats.tx_window_errors++;
1315			if (stat & 0x0002)
1316				sc->lmc_device->stats.tx_fifo_errors++;
1317		} else {
1318			sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1319
1320			sc->lmc_device->stats.tx_packets++;
1321                }
1322
1323                //                dev_kfree_skb(sc->lmc_txq[i]);
1324                dev_kfree_skb_irq(sc->lmc_txq[i]);
1325                sc->lmc_txq[i] = NULL;
1326
1327                badtx++;
1328                i = badtx % LMC_TXDESCS;
1329            }
1330
1331            if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1332            {
1333                printk ("%s: out of sync pointer\n", dev->name);
1334                badtx += LMC_TXDESCS;
1335            }
1336            LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1337            sc->lmc_txfull = 0;
1338            netif_wake_queue(dev);
1339	    sc->extra_stats.tx_tbusy0++;
1340
1341
1342#ifdef DEBUG
1343	    sc->extra_stats.dirtyTx = badtx;
1344	    sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1345	    sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1346#endif
1347            sc->lmc_taint_tx = badtx;
1348
1349            /*
1350             * Why was there a break here???
1351             */
1352        }			/* end handle transmit interrupt */
1353
1354        if (csr & TULIP_STS_SYSERROR) {
1355            u32 error;
1356            printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1357            error = csr>>23 & 0x7;
1358            switch(error){
1359            case 0x000:
1360                printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1361                break;
1362            case 0x001:
1363                printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1364                break;
1365            case 0x010:
1366                printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1367                break;
1368            default:
1369                printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1370            }
1371            lmc_dec_reset (sc);
1372            lmc_reset (sc);
1373            LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1374            LMC_EVENT_LOG(LMC_EVENT_RESET2,
1375                          lmc_mii_readreg (sc, 0, 16),
1376                          lmc_mii_readreg (sc, 0, 17));
1377
1378        }
1379
1380        
1381        if(max_work-- <= 0)
1382            break;
1383        
1384        /*
1385         * Get current csr status to make sure
1386         * we've cleared all interrupts
1387         */
1388        csr = LMC_CSR_READ (sc, csr_status);
1389    }				/* end interrupt loop */
1390    LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1391
1392lmc_int_fail_out:
1393
1394    spin_unlock(&sc->lmc_lock);
1395
1396    lmc_trace(dev, "lmc_interrupt out");
1397    return IRQ_RETVAL(handled);
1398}
1399
1400static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
1401					struct net_device *dev)
1402{
1403    lmc_softc_t *sc = dev_to_sc(dev);
1404    u32 flag;
1405    int entry;
1406    unsigned long flags;
1407
1408    lmc_trace(dev, "lmc_start_xmit in");
1409
1410    spin_lock_irqsave(&sc->lmc_lock, flags);
1411
1412    /* normal path, tbusy known to be zero */
1413
1414    entry = sc->lmc_next_tx % LMC_TXDESCS;
1415
1416    sc->lmc_txq[entry] = skb;
1417    sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1418
1419    LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1420
1421#ifndef GCOM
1422    /* If the queue is less than half full, don't interrupt */
1423    if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1424    {
1425        /* Do not interrupt on completion of this packet */
1426        flag = 0x60000000;
1427        netif_wake_queue(dev);
1428    }
1429    else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1430    {
1431        /* This generates an interrupt on completion of this packet */
1432        flag = 0xe0000000;
1433        netif_wake_queue(dev);
1434    }
1435    else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1436    {
1437        /* Do not interrupt on completion of this packet */
1438        flag = 0x60000000;
1439        netif_wake_queue(dev);
1440    }
1441    else
1442    {
1443        /* This generates an interrupt on completion of this packet */
1444        flag = 0xe0000000;
1445        sc->lmc_txfull = 1;
1446        netif_stop_queue(dev);
1447    }
1448#else
1449    flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1450
1451    if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1452    {				/* ring full, go busy */
1453        sc->lmc_txfull = 1;
1454	netif_stop_queue(dev);
1455	sc->extra_stats.tx_tbusy1++;
1456        LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1457    }
1458#endif
1459
1460
1461    if (entry == LMC_TXDESCS - 1)	/* last descriptor in ring */
1462	flag |= LMC_TDES_END_OF_RING;	/* flag as such for Tulip */
1463
1464    /* don't pad small packets either */
1465    flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1466						sc->TxDescriptControlInit;
1467
1468    /* set the transmit timeout flag to be checked in
1469     * the watchdog timer handler. -baz
1470     */
1471
1472    sc->extra_stats.tx_NoCompleteCnt++;
1473    sc->lmc_next_tx++;
1474
1475    /* give ownership to the chip */
1476    LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1477    sc->lmc_txring[entry].status = 0x80000000;
1478
1479    /* send now! */
1480    LMC_CSR_WRITE (sc, csr_txpoll, 0);
1481
1482    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1483
1484    lmc_trace(dev, "lmc_start_xmit_out");
1485    return NETDEV_TX_OK;
1486}
1487
1488
1489static int lmc_rx(struct net_device *dev)
1490{
1491    lmc_softc_t *sc = dev_to_sc(dev);
1492    int i;
1493    int rx_work_limit = LMC_RXDESCS;
1494    unsigned int next_rx;
1495    int rxIntLoopCnt;		/* debug -baz */
1496    int localLengthErrCnt = 0;
1497    long stat;
1498    struct sk_buff *skb, *nsb;
1499    u16 len;
1500
1501    lmc_trace(dev, "lmc_rx in");
1502
1503    lmc_led_on(sc, LMC_DS3_LED3);
1504
1505    rxIntLoopCnt = 0;		/* debug -baz */
1506
1507    i = sc->lmc_next_rx % LMC_RXDESCS;
1508    next_rx = sc->lmc_next_rx;
1509
1510    while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1511    {
1512        rxIntLoopCnt++;		/* debug -baz */
1513        len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1514        if ((stat & 0x0300) != 0x0300) {  /* Check first segment and last segment */
1515		if ((stat & 0x0000ffff) != 0x7fff) {
1516			/* Oversized frame */
1517			sc->lmc_device->stats.rx_length_errors++;
1518			goto skip_packet;
1519		}
1520	}
1521
1522	if (stat & 0x00000008) { /* Catch a dribbling bit error */
1523		sc->lmc_device->stats.rx_errors++;
1524		sc->lmc_device->stats.rx_frame_errors++;
1525		goto skip_packet;
1526	}
1527
1528
1529	if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
1530		sc->lmc_device->stats.rx_errors++;
1531		sc->lmc_device->stats.rx_crc_errors++;
1532		goto skip_packet;
1533	}
1534
1535	if (len > LMC_PKT_BUF_SZ) {
1536		sc->lmc_device->stats.rx_length_errors++;
1537		localLengthErrCnt++;
1538		goto skip_packet;
1539	}
1540
1541	if (len < sc->lmc_crcSize + 2) {
1542		sc->lmc_device->stats.rx_length_errors++;
1543		sc->extra_stats.rx_SmallPktCnt++;
1544		localLengthErrCnt++;
1545		goto skip_packet;
1546	}
1547
1548        if(stat & 0x00004000){
1549            printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1550        }
1551
1552        len -= sc->lmc_crcSize;
1553
1554        skb = sc->lmc_rxq[i];
1555
1556        /*
1557         * We ran out of memory at some point
1558         * just allocate an skb buff and continue.
1559         */
1560        
1561        if (!skb) {
1562            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1563            if (nsb) {
1564                sc->lmc_rxq[i] = nsb;
1565                nsb->dev = dev;
1566                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1567            }
1568            sc->failed_recv_alloc = 1;
1569            goto skip_packet;
1570        }
1571        
1572	sc->lmc_device->stats.rx_packets++;
1573	sc->lmc_device->stats.rx_bytes += len;
1574
1575        LMC_CONSOLE_LOG("recv", skb->data, len);
1576
1577        /*
1578         * I'm not sure of the sanity of this
1579         * Packets could be arriving at a constant
1580         * 44.210mbits/sec and we're going to copy
1581         * them into a new buffer??
1582         */
1583        
1584        if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1585            /*
1586             * If it's a large packet don't copy it just hand it up
1587             */
1588        give_it_anyways:
1589
1590            sc->lmc_rxq[i] = NULL;
1591            sc->lmc_rxring[i].buffer1 = 0x0;
1592
1593            skb_put (skb, len);
1594            skb->protocol = lmc_proto_type(sc, skb);
1595            skb_reset_mac_header(skb);
1596            /* skb_reset_network_header(skb); */
1597            skb->dev = dev;
1598            lmc_proto_netif(sc, skb);
1599
1600            /*
1601             * This skb will be destroyed by the upper layers, make a new one
1602             */
1603            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1604            if (nsb) {
1605                sc->lmc_rxq[i] = nsb;
1606                nsb->dev = dev;
1607                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1608                /* Transferred to 21140 below */
1609            }
1610            else {
1611                /*
1612                 * We've run out of memory, stop trying to allocate
1613                 * memory and exit the interrupt handler
1614                 *
1615                 * The chip may run out of receivers and stop
1616                 * in which care we'll try to allocate the buffer
1617                 * again.  (once a second)
1618                 */
1619		sc->extra_stats.rx_BuffAllocErr++;
1620                LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1621                sc->failed_recv_alloc = 1;
1622                goto skip_out_of_mem;
1623            }
1624        }
1625        else {
1626            nsb = dev_alloc_skb(len);
1627            if(!nsb) {
1628                goto give_it_anyways;
1629            }
1630            skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
1631            
1632            nsb->protocol = lmc_proto_type(sc, nsb);
1633            skb_reset_mac_header(nsb);
1634            /* skb_reset_network_header(nsb); */
1635            nsb->dev = dev;
1636            lmc_proto_netif(sc, nsb);
1637        }
1638
1639    skip_packet:
1640        LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1641        sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1642
1643        sc->lmc_next_rx++;
1644        i = sc->lmc_next_rx % LMC_RXDESCS;
1645        rx_work_limit--;
1646        if (rx_work_limit < 0)
1647            break;
1648    }
1649
1650    /* detect condition for LMC1000 where DSU cable attaches and fills
1651     * descriptors with bogus packets
1652     *
1653    if (localLengthErrCnt > LMC_RXDESCS - 3) {
1654	sc->extra_stats.rx_BadPktSurgeCnt++;
1655	LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
1656		      sc->extra_stats.rx_BadPktSurgeCnt);
1657    } */
1658
1659    /* save max count of receive descriptors serviced */
1660    if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1661	    sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1662
1663#ifdef DEBUG
1664    if (rxIntLoopCnt == 0)
1665    {
1666        for (i = 0; i < LMC_RXDESCS; i++)
1667        {
1668            if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1669                != DESC_OWNED_BY_DC21X4)
1670            {
1671                rxIntLoopCnt++;
1672            }
1673        }
1674        LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1675    }
1676#endif
1677
1678
1679    lmc_led_off(sc, LMC_DS3_LED3);
1680
1681skip_out_of_mem:
1682
1683    lmc_trace(dev, "lmc_rx out");
1684
1685    return 0;
1686}
1687
1688static struct net_device_stats *lmc_get_stats(struct net_device *dev)
1689{
1690    lmc_softc_t *sc = dev_to_sc(dev);
1691    unsigned long flags;
1692
1693    lmc_trace(dev, "lmc_get_stats in");
1694
1695    spin_lock_irqsave(&sc->lmc_lock, flags);
1696
1697    sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1698
1699    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1700
1701    lmc_trace(dev, "lmc_get_stats out");
1702
1703    return &sc->lmc_device->stats;
1704}
1705
1706static struct pci_driver lmc_driver = {
1707	.name		= "lmc",
1708	.id_table	= lmc_pci_tbl,
1709	.probe		= lmc_init_one,
1710	.remove		= lmc_remove_one,
1711};
1712
1713module_pci_driver(lmc_driver);
1714
1715unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1716{
1717    int i;
1718    int command = (0xf6 << 10) | (devaddr << 5) | regno;
1719    int retval = 0;
1720
1721    lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
1722
1723    LMC_MII_SYNC (sc);
1724
1725    lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
1726
1727    for (i = 15; i >= 0; i--)
1728    {
1729        int dataval = (command & (1 << i)) ? 0x20000 : 0;
1730
1731        LMC_CSR_WRITE (sc, csr_9, dataval);
1732        lmc_delay ();
1733        /* __SLOW_DOWN_IO; */
1734        LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1735        lmc_delay ();
1736        /* __SLOW_DOWN_IO; */
1737    }
1738
1739    lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
1740
1741    for (i = 19; i > 0; i--)
1742    {
1743        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1744        lmc_delay ();
1745        /* __SLOW_DOWN_IO; */
1746        retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1747        LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1748        lmc_delay ();
1749        /* __SLOW_DOWN_IO; */
1750    }
1751
1752    lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
1753
1754    return (retval >> 1) & 0xffff;
1755}
1756
1757void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1758{
1759    int i = 32;
1760    int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1761
1762    lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
1763
1764    LMC_MII_SYNC (sc);
1765
1766    i = 31;
1767    while (i >= 0)
1768    {
1769        int datav;
1770
1771        if (command & (1 << i))
1772            datav = 0x20000;
1773        else
1774            datav = 0x00000;
1775
1776        LMC_CSR_WRITE (sc, csr_9, datav);
1777        lmc_delay ();
1778        /* __SLOW_DOWN_IO; */
1779        LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1780        lmc_delay ();
1781        /* __SLOW_DOWN_IO; */
1782        i--;
1783    }
1784
1785    i = 2;
1786    while (i > 0)
1787    {
1788        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1789        lmc_delay ();
1790        /* __SLOW_DOWN_IO; */
1791        LMC_CSR_WRITE (sc, csr_9, 0x50000);
1792        lmc_delay ();
1793        /* __SLOW_DOWN_IO; */
1794        i--;
1795    }
1796
1797    lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
1798}
1799
1800static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1801{
1802    int i;
1803
1804    lmc_trace(sc->lmc_device, "lmc_softreset in");
1805
1806    /* Initialize the receive rings and buffers. */
1807    sc->lmc_txfull = 0;
1808    sc->lmc_next_rx = 0;
1809    sc->lmc_next_tx = 0;
1810    sc->lmc_taint_rx = 0;
1811    sc->lmc_taint_tx = 0;
1812
1813    /*
1814     * Setup each one of the receiver buffers
1815     * allocate an skbuff for each one, setup the descriptor table
1816     * and point each buffer at the next one
1817     */
1818
1819    for (i = 0; i < LMC_RXDESCS; i++)
1820    {
1821        struct sk_buff *skb;
1822
1823        if (sc->lmc_rxq[i] == NULL)
1824        {
1825            skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1826            if(skb == NULL){
1827                printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1828                sc->failed_ring = 1;
1829                break;
1830            }
1831            else{
1832                sc->lmc_rxq[i] = skb;
1833            }
1834        }
1835        else
1836        {
1837            skb = sc->lmc_rxq[i];
1838        }
1839
1840        skb->dev = sc->lmc_device;
1841
1842        /* owned by 21140 */
1843        sc->lmc_rxring[i].status = 0x80000000;
1844
1845        /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1846        sc->lmc_rxring[i].length = skb_tailroom(skb);
1847
1848        /* use to be tail which is dumb since you're thinking why write
1849         * to the end of the packj,et but since there's nothing there tail == data
1850         */
1851        sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1852
1853        /* This is fair since the structure is static and we have the next address */
1854        sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1855
1856    }
1857
1858    /*
1859     * Sets end of ring
1860     */
1861    if (i != 0) {
1862        sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1863        sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1864    }
1865    LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1866
1867    /* Initialize the transmit rings and buffers */
1868    for (i = 0; i < LMC_TXDESCS; i++)
1869    {
1870        if (sc->lmc_txq[i] != NULL){		/* have buffer */
1871            dev_kfree_skb(sc->lmc_txq[i]);	/* free it */
1872	    sc->lmc_device->stats.tx_dropped++;	/* We just dropped a packet */
1873        }
1874        sc->lmc_txq[i] = NULL;
1875        sc->lmc_txring[i].status = 0x00000000;
1876        sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1877    }
1878    sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1879    LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1880
1881    lmc_trace(sc->lmc_device, "lmc_softreset out");
1882}
1883
1884void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1885{
1886    lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
1887    sc->lmc_gpio_io &= ~bits;
1888    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1889    lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
1890}
1891
1892void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1893{
1894    lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
1895    sc->lmc_gpio_io |= bits;
1896    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1897    lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
1898}
1899
1900void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1901{
1902    lmc_trace(sc->lmc_device, "lmc_led_on in");
1903    if((~sc->lmc_miireg16) & led){ /* Already on! */
1904        lmc_trace(sc->lmc_device, "lmc_led_on aon out");
1905        return;
1906    }
1907    
1908    sc->lmc_miireg16 &= ~led;
1909    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1910    lmc_trace(sc->lmc_device, "lmc_led_on out");
1911}
1912
1913void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1914{
1915    lmc_trace(sc->lmc_device, "lmc_led_off in");
1916    if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
1917        lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
1918        return;
1919    }
1920    
1921    sc->lmc_miireg16 |= led;
1922    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1923    lmc_trace(sc->lmc_device, "lmc_led_off out");
1924}
1925
1926static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1927{
1928    lmc_trace(sc->lmc_device, "lmc_reset in");
1929    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1930    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1931
1932    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1933    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1934
1935    /*
1936     * make some of the GPIO pins be outputs
1937     */
1938    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1939
1940    /*
1941     * RESET low to force state reset.  This also forces
1942     * the transmitter clock to be internal, but we expect to reset
1943     * that later anyway.
1944     */
1945    sc->lmc_gpio &= ~(LMC_GEP_RESET);
1946    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1947
1948    /*
1949     * hold for more than 10 microseconds
1950     */
1951    udelay(50);
1952
1953    /*
1954     * stop driving Xilinx-related signals
1955     */
1956    lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1957
1958    /*
1959     * Call media specific init routine
1960     */
1961    sc->lmc_media->init(sc);
1962
1963    sc->extra_stats.resetCount++;
1964    lmc_trace(sc->lmc_device, "lmc_reset out");
1965}
1966
1967static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
1968{
1969    u32 val;
1970    lmc_trace(sc->lmc_device, "lmc_dec_reset in");
1971
1972    /*
1973     * disable all interrupts
1974     */
1975    sc->lmc_intrmask = 0;
1976    LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
1977
1978    /*
1979     * Reset the chip with a software reset command.
1980     * Wait 10 microseconds (actually 50 PCI cycles but at
1981     * 33MHz that comes to two microseconds but wait a
1982     * bit longer anyways)
1983     */
1984    LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
1985    udelay(25);
1986#ifdef __sparc__
1987    sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
1988    sc->lmc_busmode = 0x00100000;
1989    sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
1990    LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
1991#endif
1992    sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
1993
1994    /*
1995     * We want:
1996     *   no ethernet address in frames we write
1997     *   disable padding (txdesc, padding disable)
1998     *   ignore runt frames (rdes0 bit 15)
1999     *   no receiver watchdog or transmitter jabber timer
2000     *       (csr15 bit 0,14 == 1)
2001     *   if using 16-bit CRC, turn off CRC (trans desc, crc disable)
2002     */
2003
2004    sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
2005                         | TULIP_CMD_FULLDUPLEX
2006                         | TULIP_CMD_PASSBADPKT
2007                         | TULIP_CMD_NOHEARTBEAT
2008                         | TULIP_CMD_PORTSELECT
2009                         | TULIP_CMD_RECEIVEALL
2010                         | TULIP_CMD_MUSTBEONE
2011                       );
2012    sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
2013                          | TULIP_CMD_THRESHOLDCTL
2014                          | TULIP_CMD_STOREFWD
2015                          | TULIP_CMD_TXTHRSHLDCTL
2016                        );
2017
2018    LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
2019
2020    /*
2021     * disable receiver watchdog and transmit jabber
2022     */
2023    val = LMC_CSR_READ(sc, csr_sia_general);
2024    val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
2025    LMC_CSR_WRITE(sc, csr_sia_general, val);
2026
2027    lmc_trace(sc->lmc_device, "lmc_dec_reset out");
2028}
2029
2030static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
2031                         size_t csr_size)
2032{
2033    lmc_trace(sc->lmc_device, "lmc_initcsrs in");
2034    sc->lmc_csrs.csr_busmode	        = csr_base +  0 * csr_size;
2035    sc->lmc_csrs.csr_txpoll		= csr_base +  1 * csr_size;
2036    sc->lmc_csrs.csr_rxpoll		= csr_base +  2 * csr_size;
2037    sc->lmc_csrs.csr_rxlist		= csr_base +  3 * csr_size;
2038    sc->lmc_csrs.csr_txlist		= csr_base +  4 * csr_size;
2039    sc->lmc_csrs.csr_status		= csr_base +  5 * csr_size;
2040    sc->lmc_csrs.csr_command	        = csr_base +  6 * csr_size;
2041    sc->lmc_csrs.csr_intr		= csr_base +  7 * csr_size;
2042    sc->lmc_csrs.csr_missed_frames	= csr_base +  8 * csr_size;
2043    sc->lmc_csrs.csr_9		        = csr_base +  9 * csr_size;
2044    sc->lmc_csrs.csr_10		        = csr_base + 10 * csr_size;
2045    sc->lmc_csrs.csr_11		        = csr_base + 11 * csr_size;
2046    sc->lmc_csrs.csr_12		        = csr_base + 12 * csr_size;
2047    sc->lmc_csrs.csr_13		        = csr_base + 13 * csr_size;
2048    sc->lmc_csrs.csr_14		        = csr_base + 14 * csr_size;
2049    sc->lmc_csrs.csr_15		        = csr_base + 15 * csr_size;
2050    lmc_trace(sc->lmc_device, "lmc_initcsrs out");
2051}
2052
2053static void lmc_driver_timeout(struct net_device *dev)
2054{
2055    lmc_softc_t *sc = dev_to_sc(dev);
2056    u32 csr6;
2057    unsigned long flags;
2058
2059    lmc_trace(dev, "lmc_driver_timeout in");
2060
2061    spin_lock_irqsave(&sc->lmc_lock, flags);
2062
2063    printk("%s: Xmitter busy|\n", dev->name);
2064
2065    sc->extra_stats.tx_tbusy_calls++;
2066    if (jiffies - dev_trans_start(dev) < TX_TIMEOUT)
2067	    goto bug_out;
2068
2069    /*
2070     * Chip seems to have locked up
2071     * Reset it
2072     * This whips out all our decriptor
2073     * table and starts from scartch
2074     */
2075
2076    LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
2077                  LMC_CSR_READ (sc, csr_status),
2078		  sc->extra_stats.tx_ProcTimeout);
2079
2080    lmc_running_reset (dev);
2081
2082    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
2083    LMC_EVENT_LOG(LMC_EVENT_RESET2,
2084                  lmc_mii_readreg (sc, 0, 16),
2085                  lmc_mii_readreg (sc, 0, 17));
2086
2087    /* restart the tx processes */
2088    csr6 = LMC_CSR_READ (sc, csr_command);
2089    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2090    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2091
2092    /* immediate transmit */
2093    LMC_CSR_WRITE (sc, csr_txpoll, 0);
2094
2095    sc->lmc_device->stats.tx_errors++;
2096    sc->extra_stats.tx_ProcTimeout++; /* -baz */
2097
2098    netif_trans_update(dev); /* prevent tx timeout */
2099
2100bug_out:
2101
2102    spin_unlock_irqrestore(&sc->lmc_lock, flags);
2103
2104    lmc_trace(dev, "lmc_driver_timeout out");
2105
2106
2107}