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1/* SPDX-License-Identifier: GPL-2.0 */
2
3/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2021 Linaro Ltd.
5 */
6#ifndef _IPA_DATA_H_
7#define _IPA_DATA_H_
8
9#include <linux/types.h>
10
11#include "ipa_version.h"
12#include "ipa_endpoint.h"
13#include "ipa_mem.h"
14
15/**
16 * DOC: IPA/GSI Configuration Data
17 *
18 * Boot-time configuration data is used to define the configuration of the
19 * IPA and GSI resources to use for a given platform. This data is supplied
20 * via the Device Tree match table, associated with a particular compatible
21 * string. The data defines information about how resources, endpoints and
22 * channels, memory, clocking and so on are allocated and used for the
23 * platform.
24 *
25 * Resources are data structures used internally by the IPA hardware. The
26 * configuration data defines the number (or limits of the number) of various
27 * types of these resources.
28 *
29 * Endpoint configuration data defines properties of both IPA endpoints and
30 * GSI channels. A channel is a GSI construct, and represents a single
31 * communication path between the IPA and a particular execution environment
32 * (EE), such as the AP or Modem. Each EE has a set of channels associated
33 * with it, and each channel has an ID unique for that EE. For the most part
34 * the only GSI channels of concern to this driver belong to the AP
35 *
36 * An endpoint is an IPA construct representing a single channel anywhere
37 * in the system. An IPA endpoint ID maps directly to an (EE, channel_id)
38 * pair. Generally, this driver is concerned with only endpoints associated
39 * with the AP, however this will change when support for routing (etc.) is
40 * added. IPA endpoint and GSI channel configuration data are defined
41 * together, establishing the endpoint_id->(EE, channel_id) mapping.
42 *
43 * Endpoint configuration data consists of three parts: properties that
44 * are common to IPA and GSI (EE ID, channel ID, endpoint ID, and direction);
45 * properties associated with the GSI channel; and properties associated with
46 * the IPA endpoint.
47 */
48
49/* The maximum possible number of source or destination resource groups */
50#define IPA_RESOURCE_GROUP_MAX 8
51
52/** enum ipa_qsb_master_id - array index for IPA QSB configuration data */
53enum ipa_qsb_master_id {
54 IPA_QSB_MASTER_DDR,
55 IPA_QSB_MASTER_PCIE,
56};
57
58/**
59 * struct ipa_qsb_data - Qualcomm System Bus configuration data
60 * @max_writes: Maximum outstanding write requests for this master
61 * @max_reads: Maximum outstanding read requests for this master
62 * @max_reads_beats: Max outstanding read bytes in 8-byte "beats" (if non-zero)
63 */
64struct ipa_qsb_data {
65 u8 max_writes;
66 u8 max_reads;
67 u8 max_reads_beats; /* Not present for IPA v3.5.1 */
68};
69
70/**
71 * struct gsi_channel_data - GSI channel configuration data
72 * @tre_count: number of TREs in the channel ring
73 * @event_count: number of slots in the associated event ring
74 * @tlv_count: number of entries in channel's TLV FIFO
75 *
76 * A GSI channel is a unidirectional means of transferring data to or
77 * from (and through) the IPA. A GSI channel has a ring buffer made
78 * up of "transfer ring elements" (TREs) that specify individual data
79 * transfers or IPA immediate commands. TREs are filled by the AP,
80 * and control is passed to IPA hardware by writing the last written
81 * element into a doorbell register.
82 *
83 * When data transfer commands have completed the GSI generates an
84 * event (a structure of data) and optionally signals the AP with
85 * an interrupt. Event structures are implemented by another ring
86 * buffer, directed toward the AP from the IPA.
87 *
88 * The input to a GSI channel is a FIFO of type/length/value (TLV)
89 * elements, and the size of this FIFO limits the number of TREs
90 * that can be included in a single transaction.
91 */
92struct gsi_channel_data {
93 u16 tre_count; /* must be a power of 2 */
94 u16 event_count; /* must be a power of 2 */
95 u8 tlv_count;
96};
97
98/**
99 * struct ipa_endpoint_tx_data - configuration data for TX endpoints
100 * @seq_type: primary packet processing sequencer type
101 * @seq_rep_type: sequencer type for replication processing
102 * @status_endpoint: endpoint to which status elements are sent
103 *
104 * The @status_endpoint is only valid if the endpoint's @status_enable
105 * flag is set.
106 */
107struct ipa_endpoint_tx_data {
108 enum ipa_seq_type seq_type;
109 enum ipa_seq_rep_type seq_rep_type;
110 enum ipa_endpoint_name status_endpoint;
111};
112
113/**
114 * struct ipa_endpoint_rx_data - configuration data for RX endpoints
115 * @pad_align: power-of-2 boundary to which packet payload is aligned
116 * @aggr_close_eof: whether aggregation closes on end-of-frame
117 *
118 * With each packet it transfers, the IPA hardware can perform certain
119 * transformations of its packet data. One of these is adding pad bytes
120 * to the end of the packet data so the result ends on a power-of-2 boundary.
121 *
122 * It is also able to aggregate multiple packets into a single receive buffer.
123 * Aggregation is "open" while a buffer is being filled, and "closes" when
124 * certain criteria are met. One of those criteria is the sender indicating
125 * a "frame" consisting of several transfers has ended.
126 */
127struct ipa_endpoint_rx_data {
128 u32 pad_align;
129 bool aggr_close_eof;
130};
131
132/**
133 * struct ipa_endpoint_config_data - IPA endpoint hardware configuration
134 * @resource_group: resource group to assign endpoint to
135 * @checksum: whether checksum offload is enabled
136 * @qmap: whether endpoint uses QMAP protocol
137 * @aggregation: whether endpoint supports aggregation
138 * @status_enable: whether endpoint uses status elements
139 * @dma_mode: whether endpoint operates in DMA mode
140 * @dma_endpoint: peer endpoint, if operating in DMA mode
141 * @tx: TX-specific endpoint information (see above)
142 * @rx: RX-specific endpoint information (see above)
143 */
144struct ipa_endpoint_config_data {
145 u32 resource_group;
146 bool checksum;
147 bool qmap;
148 bool aggregation;
149 bool status_enable;
150 bool dma_mode;
151 enum ipa_endpoint_name dma_endpoint;
152 union {
153 struct ipa_endpoint_tx_data tx;
154 struct ipa_endpoint_rx_data rx;
155 };
156};
157
158/**
159 * struct ipa_endpoint_data - IPA endpoint configuration data
160 * @filter_support: whether endpoint supports filtering
161 * @config: hardware configuration (see above)
162 *
163 * Not all endpoints support the IPA filtering capability. A filter table
164 * defines the filters to apply for those endpoints that support it. The
165 * AP is responsible for initializing this table, and it must include entries
166 * for non-AP endpoints. For this reason we define *all* endpoints used
167 * in the system, and indicate whether they support filtering.
168 *
169 * The remaining endpoint configuration data applies only to AP endpoints.
170 */
171struct ipa_endpoint_data {
172 bool filter_support;
173 /* Everything else is specified only for AP endpoints */
174 struct ipa_endpoint_config_data config;
175};
176
177/**
178 * struct ipa_gsi_endpoint_data - GSI channel/IPA endpoint data
179 * @ee_id: GSI execution environment ID
180 * @channel_id: GSI channel ID
181 * @endpoint_id: IPA endpoint ID
182 * @toward_ipa: direction of data transfer
183 * @channel: GSI channel configuration data (see above)
184 * @endpoint: IPA endpoint configuration data (see above)
185 */
186struct ipa_gsi_endpoint_data {
187 u8 ee_id; /* enum gsi_ee_id */
188 u8 channel_id;
189 u8 endpoint_id;
190 bool toward_ipa;
191
192 struct gsi_channel_data channel;
193 struct ipa_endpoint_data endpoint;
194};
195
196/**
197 * struct ipa_resource_limits - minimum and maximum resource counts
198 * @min: minimum number of resources of a given type
199 * @max: maximum number of resources of a given type
200 */
201struct ipa_resource_limits {
202 u32 min;
203 u32 max;
204};
205
206/**
207 * struct ipa_resource - resource group source or destination resource usage
208 * @limits: array of resource limits, indexed by group
209 */
210struct ipa_resource {
211 struct ipa_resource_limits limits[IPA_RESOURCE_GROUP_MAX];
212};
213
214/**
215 * struct ipa_resource_data - IPA resource configuration data
216 * @rsrc_group_src_count: number of source resource groups supported
217 * @rsrc_group_dst_count: number of destination resource groups supported
218 * @resource_src_count: number of entries in the resource_src array
219 * @resource_src: source endpoint group resources
220 * @resource_dst_count: number of entries in the resource_dst array
221 * @resource_dst: destination endpoint group resources
222 *
223 * In order to manage quality of service between endpoints, certain resources
224 * required for operation are allocated to groups of endpoints. Generally
225 * this information is invisible to the AP, but the AP is responsible for
226 * programming it at initialization time, so we specify it here.
227 */
228struct ipa_resource_data {
229 u32 rsrc_group_src_count;
230 u32 rsrc_group_dst_count;
231 u32 resource_src_count;
232 const struct ipa_resource *resource_src;
233 u32 resource_dst_count;
234 const struct ipa_resource *resource_dst;
235};
236
237/**
238 * struct ipa_mem_data - description of IPA memory regions
239 * @local_count: number of regions defined in the local[] array
240 * @local: array of IPA-local memory region descriptors
241 * @imem_addr: physical address of IPA region within IMEM
242 * @imem_size: size in bytes of IPA IMEM region
243 * @smem_id: item identifier for IPA region within SMEM memory
244 * @smem_size: size in bytes of the IPA SMEM region
245 */
246struct ipa_mem_data {
247 u32 local_count;
248 const struct ipa_mem *local;
249 u32 imem_addr;
250 u32 imem_size;
251 u32 smem_id;
252 u32 smem_size;
253};
254
255/**
256 * struct ipa_interconnect_data - description of IPA interconnect bandwidths
257 * @name: Interconnect name (matches interconnect-name in DT)
258 * @peak_bandwidth: Peak interconnect bandwidth (in 1000 byte/sec units)
259 * @average_bandwidth: Average interconnect bandwidth (in 1000 byte/sec units)
260 */
261struct ipa_interconnect_data {
262 const char *name;
263 u32 peak_bandwidth;
264 u32 average_bandwidth;
265};
266
267/**
268 * struct ipa_clock_data - description of IPA clock and interconnect rates
269 * @core_clock_rate: Core clock rate (Hz)
270 * @interconnect_count: Number of entries in the interconnect_data array
271 * @interconnect_data: IPA interconnect configuration data
272 */
273struct ipa_clock_data {
274 u32 core_clock_rate;
275 u32 interconnect_count; /* # entries in interconnect_data[] */
276 const struct ipa_interconnect_data *interconnect_data;
277};
278
279/**
280 * struct ipa_data - combined IPA/GSI configuration data
281 * @version: IPA hardware version
282 * @backward_compat: BCR register value (prior to IPA v4.5 only)
283 * @qsb_count: number of entries in the qsb_data array
284 * @qsb_data: Qualcomm System Bus configuration data
285 * @endpoint_count: number of entries in the endpoint_data array
286 * @endpoint_data: IPA endpoint/GSI channel data
287 * @resource_data: IPA resource configuration data
288 * @mem_data: IPA memory region data
289 * @clock_data: IPA clock and interconnect data
290 */
291struct ipa_data {
292 enum ipa_version version;
293 u32 backward_compat;
294 u32 qsb_count; /* number of entries in qsb_data[] */
295 const struct ipa_qsb_data *qsb_data;
296 u32 endpoint_count; /* number of entries in endpoint_data[] */
297 const struct ipa_gsi_endpoint_data *endpoint_data;
298 const struct ipa_resource_data *resource_data;
299 const struct ipa_mem_data *mem_data;
300 const struct ipa_clock_data *clock_data;
301};
302
303extern const struct ipa_data ipa_data_v3_1;
304extern const struct ipa_data ipa_data_v3_5_1;
305extern const struct ipa_data ipa_data_v4_2;
306extern const struct ipa_data ipa_data_v4_5;
307extern const struct ipa_data ipa_data_v4_9;
308extern const struct ipa_data ipa_data_v4_11;
309
310#endif /* _IPA_DATA_H_ */