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v4.17
  1// SPDX-License-Identifier: GPL-2.0
 
  2#include <linux/dma-direct.h>
  3#include <linux/dma-debug.h>
  4#include <linux/dmar.h>
  5#include <linux/export.h>
  6#include <linux/bootmem.h>
  7#include <linux/gfp.h>
  8#include <linux/pci.h>
  9
 10#include <asm/proto.h>
 11#include <asm/dma.h>
 12#include <asm/iommu.h>
 13#include <asm/gart.h>
 14#include <asm/calgary.h>
 15#include <asm/x86_init.h>
 16#include <asm/iommu_table.h>
 17
 18static int forbid_dac __read_mostly;
 19
 20const struct dma_map_ops *dma_ops = &dma_direct_ops;
 21EXPORT_SYMBOL(dma_ops);
 22
 23static int iommu_sac_force __read_mostly;
 24
 25#ifdef CONFIG_IOMMU_DEBUG
 26int panic_on_overflow __read_mostly = 1;
 27int force_iommu __read_mostly = 1;
 28#else
 29int panic_on_overflow __read_mostly = 0;
 30int force_iommu __read_mostly = 0;
 31#endif
 32
 33int iommu_merge __read_mostly = 0;
 34
 35int no_iommu __read_mostly;
 36/* Set this to 1 if there is a HW IOMMU in the system */
 37int iommu_detected __read_mostly = 0;
 38
 39/*
 40 * This variable becomes 1 if iommu=pt is passed on the kernel command line.
 41 * If this variable is 1, IOMMU implementations do no DMA translation for
 42 * devices and allow every device to access to whole physical memory. This is
 43 * useful if a user wants to use an IOMMU only for KVM device assignment to
 44 * guests and not for driver dma translation.
 45 */
 46int iommu_pass_through __read_mostly;
 47
 48extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
 49
 50/* Dummy device used for NULL arguments (normally ISA). */
 51struct device x86_dma_fallback_dev = {
 52	.init_name = "fallback device",
 53	.coherent_dma_mask = ISA_DMA_BIT_MASK,
 54	.dma_mask = &x86_dma_fallback_dev.coherent_dma_mask,
 55};
 56EXPORT_SYMBOL(x86_dma_fallback_dev);
 57
 58/* Number of entries preallocated for DMA-API debugging */
 59#define PREALLOC_DMA_DEBUG_ENTRIES       65536
 60
 61void __init pci_iommu_alloc(void)
 62{
 63	struct iommu_table_entry *p;
 64
 65	sort_iommu_table(__iommu_table, __iommu_table_end);
 66	check_iommu_entries(__iommu_table, __iommu_table_end);
 67
 68	for (p = __iommu_table; p < __iommu_table_end; p++) {
 69		if (p && p->detect && p->detect() > 0) {
 70			p->flags |= IOMMU_DETECTED;
 71			if (p->early_init)
 72				p->early_init();
 73			if (p->flags & IOMMU_FINISH_IF_DETECTED)
 74				break;
 75		}
 76	}
 77}
 78
 79bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp)
 80{
 81	if (!*dev)
 82		*dev = &x86_dma_fallback_dev;
 83
 84	if (!is_device_dma_capable(*dev))
 85		return false;
 86	return true;
 87
 88}
 89EXPORT_SYMBOL(arch_dma_alloc_attrs);
 90
 91/*
 92 * See <Documentation/x86/x86_64/boot-options.txt> for the iommu kernel
 93 * parameter documentation.
 94 */
 95static __init int iommu_setup(char *p)
 96{
 97	iommu_merge = 1;
 98
 99	if (!p)
100		return -EINVAL;
101
102	while (*p) {
103		if (!strncmp(p, "off", 3))
104			no_iommu = 1;
105		/* gart_parse_options has more force support */
106		if (!strncmp(p, "force", 5))
107			force_iommu = 1;
108		if (!strncmp(p, "noforce", 7)) {
109			iommu_merge = 0;
110			force_iommu = 0;
111		}
112
113		if (!strncmp(p, "biomerge", 8)) {
114			iommu_merge = 1;
115			force_iommu = 1;
116		}
117		if (!strncmp(p, "panic", 5))
118			panic_on_overflow = 1;
119		if (!strncmp(p, "nopanic", 7))
120			panic_on_overflow = 0;
121		if (!strncmp(p, "merge", 5)) {
122			iommu_merge = 1;
123			force_iommu = 1;
124		}
125		if (!strncmp(p, "nomerge", 7))
126			iommu_merge = 0;
127		if (!strncmp(p, "forcesac", 8))
128			iommu_sac_force = 1;
129		if (!strncmp(p, "allowdac", 8))
130			forbid_dac = 0;
131		if (!strncmp(p, "nodac", 5))
132			forbid_dac = 1;
133		if (!strncmp(p, "usedac", 6)) {
134			forbid_dac = -1;
135			return 1;
136		}
137#ifdef CONFIG_SWIOTLB
138		if (!strncmp(p, "soft", 4))
139			swiotlb = 1;
140#endif
141		if (!strncmp(p, "pt", 2))
142			iommu_pass_through = 1;
 
 
143
144		gart_parse_options(p);
145
146#ifdef CONFIG_CALGARY_IOMMU
147		if (!strncmp(p, "calgary", 7))
148			use_calgary = 1;
149#endif /* CONFIG_CALGARY_IOMMU */
150
151		p += strcspn(p, ",");
152		if (*p == ',')
153			++p;
154	}
155	return 0;
156}
157early_param("iommu", iommu_setup);
158
159int arch_dma_supported(struct device *dev, u64 mask)
160{
161#ifdef CONFIG_PCI
162	if (mask > 0xffffffff && forbid_dac > 0) {
163		dev_info(dev, "PCI: Disallowing DAC for device\n");
164		return 0;
165	}
166#endif
167
168	/* Tell the device to use SAC when IOMMU force is on.  This
169	   allows the driver to use cheaper accesses in some cases.
170
171	   Problem with this is that if we overflow the IOMMU area and
172	   return DAC as fallback address the device may not handle it
173	   correctly.
174
175	   As a special case some controllers have a 39bit address
176	   mode that is as efficient as 32bit (aic79xx). Don't force
177	   SAC for these.  Assume all masks <= 40 bits are of this
178	   type. Normally this doesn't make any difference, but gives
179	   more gentle handling of IOMMU overflow. */
180	if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
181		dev_info(dev, "Force SAC with mask %Lx\n", mask);
182		return 0;
183	}
184
185	return 1;
186}
187EXPORT_SYMBOL(arch_dma_supported);
188
189static int __init pci_iommu_init(void)
190{
191	struct iommu_table_entry *p;
192	dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
193
194#ifdef CONFIG_PCI
195	dma_debug_add_bus(&pci_bus_type);
196#endif
197	x86_init.iommu.iommu_init();
198
199	for (p = __iommu_table; p < __iommu_table_end; p++) {
200		if (p && (p->flags & IOMMU_DETECTED) && p->late_init)
201			p->late_init();
202	}
203
204	return 0;
205}
206/* Must execute after PCI subsystem */
207rootfs_initcall(pci_iommu_init);
208
209#ifdef CONFIG_PCI
210/* Many VIA bridges seem to corrupt data for DAC. Disable it here */
211
 
 
 
 
 
 
212static void via_no_dac(struct pci_dev *dev)
213{
214	if (forbid_dac == 0) {
215		dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
216		forbid_dac = 1;
217	}
218}
219DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
220				PCI_CLASS_BRIDGE_PCI, 8, via_no_dac);
221#endif
v5.14.15
  1// SPDX-License-Identifier: GPL-2.0
  2#include <linux/dma-map-ops.h>
  3#include <linux/dma-direct.h>
  4#include <linux/iommu.h>
  5#include <linux/dmar.h>
  6#include <linux/export.h>
  7#include <linux/memblock.h>
  8#include <linux/gfp.h>
  9#include <linux/pci.h>
 10
 11#include <asm/proto.h>
 12#include <asm/dma.h>
 13#include <asm/iommu.h>
 14#include <asm/gart.h>
 
 15#include <asm/x86_init.h>
 16#include <asm/iommu_table.h>
 17
 18static bool disable_dac_quirk __read_mostly;
 19
 20const struct dma_map_ops *dma_ops;
 21EXPORT_SYMBOL(dma_ops);
 22
 
 
 23#ifdef CONFIG_IOMMU_DEBUG
 24int panic_on_overflow __read_mostly = 1;
 25int force_iommu __read_mostly = 1;
 26#else
 27int panic_on_overflow __read_mostly = 0;
 28int force_iommu __read_mostly = 0;
 29#endif
 30
 31int iommu_merge __read_mostly = 0;
 32
 33int no_iommu __read_mostly;
 34/* Set this to 1 if there is a HW IOMMU in the system */
 35int iommu_detected __read_mostly = 0;
 36
 
 
 
 
 
 
 
 
 
 37extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
 38
 
 
 
 
 
 
 
 
 
 
 
 39void __init pci_iommu_alloc(void)
 40{
 41	struct iommu_table_entry *p;
 42
 43	sort_iommu_table(__iommu_table, __iommu_table_end);
 44	check_iommu_entries(__iommu_table, __iommu_table_end);
 45
 46	for (p = __iommu_table; p < __iommu_table_end; p++) {
 47		if (p && p->detect && p->detect() > 0) {
 48			p->flags |= IOMMU_DETECTED;
 49			if (p->early_init)
 50				p->early_init();
 51			if (p->flags & IOMMU_FINISH_IF_DETECTED)
 52				break;
 53		}
 54	}
 55}
 56
 
 
 
 
 
 
 
 
 
 
 
 
 57/*
 58 * See <Documentation/x86/x86_64/boot-options.rst> for the iommu kernel
 59 * parameter documentation.
 60 */
 61static __init int iommu_setup(char *p)
 62{
 63	iommu_merge = 1;
 64
 65	if (!p)
 66		return -EINVAL;
 67
 68	while (*p) {
 69		if (!strncmp(p, "off", 3))
 70			no_iommu = 1;
 71		/* gart_parse_options has more force support */
 72		if (!strncmp(p, "force", 5))
 73			force_iommu = 1;
 74		if (!strncmp(p, "noforce", 7)) {
 75			iommu_merge = 0;
 76			force_iommu = 0;
 77		}
 78
 79		if (!strncmp(p, "biomerge", 8)) {
 80			iommu_merge = 1;
 81			force_iommu = 1;
 82		}
 83		if (!strncmp(p, "panic", 5))
 84			panic_on_overflow = 1;
 85		if (!strncmp(p, "nopanic", 7))
 86			panic_on_overflow = 0;
 87		if (!strncmp(p, "merge", 5)) {
 88			iommu_merge = 1;
 89			force_iommu = 1;
 90		}
 91		if (!strncmp(p, "nomerge", 7))
 92			iommu_merge = 0;
 93		if (!strncmp(p, "forcesac", 8))
 94			pr_warn("forcesac option ignored.\n");
 95		if (!strncmp(p, "allowdac", 8))
 96			pr_warn("allowdac option ignored.\n");
 97		if (!strncmp(p, "nodac", 5))
 98			pr_warn("nodac option ignored.\n");
 99		if (!strncmp(p, "usedac", 6)) {
100			disable_dac_quirk = true;
101			return 1;
102		}
103#ifdef CONFIG_SWIOTLB
104		if (!strncmp(p, "soft", 4))
105			swiotlb = 1;
106#endif
107		if (!strncmp(p, "pt", 2))
108			iommu_set_default_passthrough(true);
109		if (!strncmp(p, "nopt", 4))
110			iommu_set_default_translated(true);
111
112		gart_parse_options(p);
113
 
 
 
 
 
114		p += strcspn(p, ",");
115		if (*p == ',')
116			++p;
117	}
118	return 0;
119}
120early_param("iommu", iommu_setup);
121
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
122static int __init pci_iommu_init(void)
123{
124	struct iommu_table_entry *p;
 
125
 
 
 
126	x86_init.iommu.iommu_init();
127
128	for (p = __iommu_table; p < __iommu_table_end; p++) {
129		if (p && (p->flags & IOMMU_DETECTED) && p->late_init)
130			p->late_init();
131	}
132
133	return 0;
134}
135/* Must execute after PCI subsystem */
136rootfs_initcall(pci_iommu_init);
137
138#ifdef CONFIG_PCI
139/* Many VIA bridges seem to corrupt data for DAC. Disable it here */
140
141static int via_no_dac_cb(struct pci_dev *pdev, void *data)
142{
143	pdev->dev.bus_dma_limit = DMA_BIT_MASK(32);
144	return 0;
145}
146
147static void via_no_dac(struct pci_dev *dev)
148{
149	if (!disable_dac_quirk) {
150		dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
151		pci_walk_bus(dev->subordinate, via_no_dac_cb, NULL);
152	}
153}
154DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
155				PCI_CLASS_BRIDGE_PCI, 8, via_no_dac);
156#endif