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1/*
2 * xsave/xrstor support.
3 *
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
5 */
6#include <linux/compat.h>
7#include <linux/cpu.h>
8#include <linux/mman.h>
9#include <linux/pkeys.h>
10
11#include <asm/fpu/api.h>
12#include <asm/fpu/internal.h>
13#include <asm/fpu/signal.h>
14#include <asm/fpu/regset.h>
15#include <asm/fpu/xstate.h>
16
17#include <asm/tlbflush.h>
18#include <asm/cpufeature.h>
19
20/*
21 * Although we spell it out in here, the Processor Trace
22 * xfeature is completely unused. We use other mechanisms
23 * to save/restore PT state in Linux.
24 */
25static const char *xfeature_names[] =
26{
27 "x87 floating point registers" ,
28 "SSE registers" ,
29 "AVX registers" ,
30 "MPX bounds registers" ,
31 "MPX CSR" ,
32 "AVX-512 opmask" ,
33 "AVX-512 Hi256" ,
34 "AVX-512 ZMM_Hi256" ,
35 "Processor Trace (unused)" ,
36 "Protection Keys User registers",
37 "unknown xstate feature" ,
38};
39
40static short xsave_cpuid_features[] __initdata = {
41 X86_FEATURE_FPU,
42 X86_FEATURE_XMM,
43 X86_FEATURE_AVX,
44 X86_FEATURE_MPX,
45 X86_FEATURE_MPX,
46 X86_FEATURE_AVX512F,
47 X86_FEATURE_AVX512F,
48 X86_FEATURE_AVX512F,
49 X86_FEATURE_INTEL_PT,
50 X86_FEATURE_PKU,
51};
52
53/*
54 * Mask of xstate features supported by the CPU and the kernel:
55 */
56u64 xfeatures_mask __read_mostly;
57
58static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
59static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
60static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
61
62/*
63 * The XSAVE area of kernel can be in standard or compacted format;
64 * it is always in standard format for user mode. This is the user
65 * mode standard format size used for signal and ptrace frames.
66 */
67unsigned int fpu_user_xstate_size;
68
69/*
70 * Clear all of the X86_FEATURE_* bits that are unavailable
71 * when the CPU has no XSAVE support.
72 */
73void fpu__xstate_clear_all_cpu_caps(void)
74{
75 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
76}
77
78/*
79 * Return whether the system supports a given xfeature.
80 *
81 * Also return the name of the (most advanced) feature that the caller requested:
82 */
83int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
84{
85 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
86
87 if (unlikely(feature_name)) {
88 long xfeature_idx, max_idx;
89 u64 xfeatures_print;
90 /*
91 * So we use FLS here to be able to print the most advanced
92 * feature that was requested but is missing. So if a driver
93 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
94 * missing AVX feature - this is the most informative message
95 * to users:
96 */
97 if (xfeatures_missing)
98 xfeatures_print = xfeatures_missing;
99 else
100 xfeatures_print = xfeatures_needed;
101
102 xfeature_idx = fls64(xfeatures_print)-1;
103 max_idx = ARRAY_SIZE(xfeature_names)-1;
104 xfeature_idx = min(xfeature_idx, max_idx);
105
106 *feature_name = xfeature_names[xfeature_idx];
107 }
108
109 if (xfeatures_missing)
110 return 0;
111
112 return 1;
113}
114EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
115
116static int xfeature_is_supervisor(int xfeature_nr)
117{
118 /*
119 * We currently do not support supervisor states, but if
120 * we did, we could find out like this.
121 *
122 * SDM says: If state component 'i' is a user state component,
123 * ECX[0] return 0; if state component i is a supervisor
124 * state component, ECX[0] returns 1.
125 */
126 u32 eax, ebx, ecx, edx;
127
128 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
129 return !!(ecx & 1);
130}
131
132static int xfeature_is_user(int xfeature_nr)
133{
134 return !xfeature_is_supervisor(xfeature_nr);
135}
136
137/*
138 * When executing XSAVEOPT (or other optimized XSAVE instructions), if
139 * a processor implementation detects that an FPU state component is still
140 * (or is again) in its initialized state, it may clear the corresponding
141 * bit in the header.xfeatures field, and can skip the writeout of registers
142 * to the corresponding memory layout.
143 *
144 * This means that when the bit is zero, the state component might still contain
145 * some previous - non-initialized register state.
146 *
147 * Before writing xstate information to user-space we sanitize those components,
148 * to always ensure that the memory layout of a feature will be in the init state
149 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
150 * see some stale state in the memory layout during signal handling, debugging etc.
151 */
152void fpstate_sanitize_xstate(struct fpu *fpu)
153{
154 struct fxregs_state *fx = &fpu->state.fxsave;
155 int feature_bit;
156 u64 xfeatures;
157
158 if (!use_xsaveopt())
159 return;
160
161 xfeatures = fpu->state.xsave.header.xfeatures;
162
163 /*
164 * None of the feature bits are in init state. So nothing else
165 * to do for us, as the memory layout is up to date.
166 */
167 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
168 return;
169
170 /*
171 * FP is in init state
172 */
173 if (!(xfeatures & XFEATURE_MASK_FP)) {
174 fx->cwd = 0x37f;
175 fx->swd = 0;
176 fx->twd = 0;
177 fx->fop = 0;
178 fx->rip = 0;
179 fx->rdp = 0;
180 memset(&fx->st_space[0], 0, 128);
181 }
182
183 /*
184 * SSE is in init state
185 */
186 if (!(xfeatures & XFEATURE_MASK_SSE))
187 memset(&fx->xmm_space[0], 0, 256);
188
189 /*
190 * First two features are FPU and SSE, which above we handled
191 * in a special way already:
192 */
193 feature_bit = 0x2;
194 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
195
196 /*
197 * Update all the remaining memory layouts according to their
198 * standard xstate layout, if their header bit is in the init
199 * state:
200 */
201 while (xfeatures) {
202 if (xfeatures & 0x1) {
203 int offset = xstate_comp_offsets[feature_bit];
204 int size = xstate_sizes[feature_bit];
205
206 memcpy((void *)fx + offset,
207 (void *)&init_fpstate.xsave + offset,
208 size);
209 }
210
211 xfeatures >>= 1;
212 feature_bit++;
213 }
214}
215
216/*
217 * Enable the extended processor state save/restore feature.
218 * Called once per CPU onlining.
219 */
220void fpu__init_cpu_xstate(void)
221{
222 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask)
223 return;
224 /*
225 * Make it clear that XSAVES supervisor states are not yet
226 * implemented should anyone expect it to work by changing
227 * bits in XFEATURE_MASK_* macros and XCR0.
228 */
229 WARN_ONCE((xfeatures_mask & XFEATURE_MASK_SUPERVISOR),
230 "x86/fpu: XSAVES supervisor states are not yet implemented.\n");
231
232 xfeatures_mask &= ~XFEATURE_MASK_SUPERVISOR;
233
234 cr4_set_bits(X86_CR4_OSXSAVE);
235 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
236}
237
238/*
239 * Note that in the future we will likely need a pair of
240 * functions here: one for user xstates and the other for
241 * system xstates. For now, they are the same.
242 */
243static int xfeature_enabled(enum xfeature xfeature)
244{
245 return !!(xfeatures_mask & (1UL << xfeature));
246}
247
248/*
249 * Record the offsets and sizes of various xstates contained
250 * in the XSAVE state memory layout.
251 */
252static void __init setup_xstate_features(void)
253{
254 u32 eax, ebx, ecx, edx, i;
255 /* start at the beginnning of the "extended state" */
256 unsigned int last_good_offset = offsetof(struct xregs_state,
257 extended_state_area);
258 /*
259 * The FP xstates and SSE xstates are legacy states. They are always
260 * in the fixed offsets in the xsave area in either compacted form
261 * or standard form.
262 */
263 xstate_offsets[0] = 0;
264 xstate_sizes[0] = offsetof(struct fxregs_state, xmm_space);
265 xstate_offsets[1] = xstate_sizes[0];
266 xstate_sizes[1] = FIELD_SIZEOF(struct fxregs_state, xmm_space);
267
268 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
269 if (!xfeature_enabled(i))
270 continue;
271
272 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
273
274 /*
275 * If an xfeature is supervisor state, the offset
276 * in EBX is invalid. We leave it to -1.
277 */
278 if (xfeature_is_user(i))
279 xstate_offsets[i] = ebx;
280
281 xstate_sizes[i] = eax;
282 /*
283 * In our xstate size checks, we assume that the
284 * highest-numbered xstate feature has the
285 * highest offset in the buffer. Ensure it does.
286 */
287 WARN_ONCE(last_good_offset > xstate_offsets[i],
288 "x86/fpu: misordered xstate at %d\n", last_good_offset);
289 last_good_offset = xstate_offsets[i];
290 }
291}
292
293static void __init print_xstate_feature(u64 xstate_mask)
294{
295 const char *feature_name;
296
297 if (cpu_has_xfeatures(xstate_mask, &feature_name))
298 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name);
299}
300
301/*
302 * Print out all the supported xstate features:
303 */
304static void __init print_xstate_features(void)
305{
306 print_xstate_feature(XFEATURE_MASK_FP);
307 print_xstate_feature(XFEATURE_MASK_SSE);
308 print_xstate_feature(XFEATURE_MASK_YMM);
309 print_xstate_feature(XFEATURE_MASK_BNDREGS);
310 print_xstate_feature(XFEATURE_MASK_BNDCSR);
311 print_xstate_feature(XFEATURE_MASK_OPMASK);
312 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
313 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
314 print_xstate_feature(XFEATURE_MASK_PKRU);
315}
316
317/*
318 * This check is important because it is easy to get XSTATE_*
319 * confused with XSTATE_BIT_*.
320 */
321#define CHECK_XFEATURE(nr) do { \
322 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
323 WARN_ON(nr >= XFEATURE_MAX); \
324} while (0)
325
326/*
327 * We could cache this like xstate_size[], but we only use
328 * it here, so it would be a waste of space.
329 */
330static int xfeature_is_aligned(int xfeature_nr)
331{
332 u32 eax, ebx, ecx, edx;
333
334 CHECK_XFEATURE(xfeature_nr);
335 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
336 /*
337 * The value returned by ECX[1] indicates the alignment
338 * of state component 'i' when the compacted format
339 * of the extended region of an XSAVE area is used:
340 */
341 return !!(ecx & 2);
342}
343
344/*
345 * This function sets up offsets and sizes of all extended states in
346 * xsave area. This supports both standard format and compacted format
347 * of the xsave aread.
348 */
349static void __init setup_xstate_comp(void)
350{
351 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
352 int i;
353
354 /*
355 * The FP xstates and SSE xstates are legacy states. They are always
356 * in the fixed offsets in the xsave area in either compacted form
357 * or standard form.
358 */
359 xstate_comp_offsets[0] = 0;
360 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
361
362 if (!boot_cpu_has(X86_FEATURE_XSAVES)) {
363 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
364 if (xfeature_enabled(i)) {
365 xstate_comp_offsets[i] = xstate_offsets[i];
366 xstate_comp_sizes[i] = xstate_sizes[i];
367 }
368 }
369 return;
370 }
371
372 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
373 FXSAVE_SIZE + XSAVE_HDR_SIZE;
374
375 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
376 if (xfeature_enabled(i))
377 xstate_comp_sizes[i] = xstate_sizes[i];
378 else
379 xstate_comp_sizes[i] = 0;
380
381 if (i > FIRST_EXTENDED_XFEATURE) {
382 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
383 + xstate_comp_sizes[i-1];
384
385 if (xfeature_is_aligned(i))
386 xstate_comp_offsets[i] =
387 ALIGN(xstate_comp_offsets[i], 64);
388 }
389 }
390}
391
392/*
393 * Print out xstate component offsets and sizes
394 */
395static void __init print_xstate_offset_size(void)
396{
397 int i;
398
399 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
400 if (!xfeature_enabled(i))
401 continue;
402 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n",
403 i, xstate_comp_offsets[i], i, xstate_sizes[i]);
404 }
405}
406
407/*
408 * setup the xstate image representing the init state
409 */
410static void __init setup_init_fpu_buf(void)
411{
412 static int on_boot_cpu __initdata = 1;
413
414 WARN_ON_FPU(!on_boot_cpu);
415 on_boot_cpu = 0;
416
417 if (!boot_cpu_has(X86_FEATURE_XSAVE))
418 return;
419
420 setup_xstate_features();
421 print_xstate_features();
422
423 if (boot_cpu_has(X86_FEATURE_XSAVES))
424 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
425
426 /*
427 * Init all the features state with header.xfeatures being 0x0
428 */
429 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
430
431 /*
432 * Dump the init state again. This is to identify the init state
433 * of any feature which is not represented by all zero's.
434 */
435 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
436}
437
438static int xfeature_uncompacted_offset(int xfeature_nr)
439{
440 u32 eax, ebx, ecx, edx;
441
442 /*
443 * Only XSAVES supports supervisor states and it uses compacted
444 * format. Checking a supervisor state's uncompacted offset is
445 * an error.
446 */
447 if (XFEATURE_MASK_SUPERVISOR & (1 << xfeature_nr)) {
448 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr);
449 return -1;
450 }
451
452 CHECK_XFEATURE(xfeature_nr);
453 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
454 return ebx;
455}
456
457static int xfeature_size(int xfeature_nr)
458{
459 u32 eax, ebx, ecx, edx;
460
461 CHECK_XFEATURE(xfeature_nr);
462 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
463 return eax;
464}
465
466/*
467 * 'XSAVES' implies two different things:
468 * 1. saving of supervisor/system state
469 * 2. using the compacted format
470 *
471 * Use this function when dealing with the compacted format so
472 * that it is obvious which aspect of 'XSAVES' is being handled
473 * by the calling code.
474 */
475int using_compacted_format(void)
476{
477 return boot_cpu_has(X86_FEATURE_XSAVES);
478}
479
480/* Validate an xstate header supplied by userspace (ptrace or sigreturn) */
481int validate_xstate_header(const struct xstate_header *hdr)
482{
483 /* No unknown or supervisor features may be set */
484 if (hdr->xfeatures & (~xfeatures_mask | XFEATURE_MASK_SUPERVISOR))
485 return -EINVAL;
486
487 /* Userspace must use the uncompacted format */
488 if (hdr->xcomp_bv)
489 return -EINVAL;
490
491 /*
492 * If 'reserved' is shrunken to add a new field, make sure to validate
493 * that new field here!
494 */
495 BUILD_BUG_ON(sizeof(hdr->reserved) != 48);
496
497 /* No reserved bits may be set */
498 if (memchr_inv(hdr->reserved, 0, sizeof(hdr->reserved)))
499 return -EINVAL;
500
501 return 0;
502}
503
504static void __xstate_dump_leaves(void)
505{
506 int i;
507 u32 eax, ebx, ecx, edx;
508 static int should_dump = 1;
509
510 if (!should_dump)
511 return;
512 should_dump = 0;
513 /*
514 * Dump out a few leaves past the ones that we support
515 * just in case there are some goodies up there
516 */
517 for (i = 0; i < XFEATURE_MAX + 10; i++) {
518 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
519 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
520 XSTATE_CPUID, i, eax, ebx, ecx, edx);
521 }
522}
523
524#define XSTATE_WARN_ON(x) do { \
525 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
526 __xstate_dump_leaves(); \
527 } \
528} while (0)
529
530#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
531 if ((nr == nr_macro) && \
532 WARN_ONCE(sz != sizeof(__struct), \
533 "%s: struct is %zu bytes, cpu state %d bytes\n", \
534 __stringify(nr_macro), sizeof(__struct), sz)) { \
535 __xstate_dump_leaves(); \
536 } \
537} while (0)
538
539/*
540 * We have a C struct for each 'xstate'. We need to ensure
541 * that our software representation matches what the CPU
542 * tells us about the state's size.
543 */
544static void check_xstate_against_struct(int nr)
545{
546 /*
547 * Ask the CPU for the size of the state.
548 */
549 int sz = xfeature_size(nr);
550 /*
551 * Match each CPU state with the corresponding software
552 * structure.
553 */
554 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
555 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
556 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
557 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
558 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
559 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
560 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state);
561
562 /*
563 * Make *SURE* to add any feature numbers in below if
564 * there are "holes" in the xsave state component
565 * numbers.
566 */
567 if ((nr < XFEATURE_YMM) ||
568 (nr >= XFEATURE_MAX) ||
569 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) {
570 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
571 XSTATE_WARN_ON(1);
572 }
573}
574
575/*
576 * This essentially double-checks what the cpu told us about
577 * how large the XSAVE buffer needs to be. We are recalculating
578 * it to be safe.
579 */
580static void do_extra_xstate_size_checks(void)
581{
582 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
583 int i;
584
585 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
586 if (!xfeature_enabled(i))
587 continue;
588
589 check_xstate_against_struct(i);
590 /*
591 * Supervisor state components can be managed only by
592 * XSAVES, which is compacted-format only.
593 */
594 if (!using_compacted_format())
595 XSTATE_WARN_ON(xfeature_is_supervisor(i));
596
597 /* Align from the end of the previous feature */
598 if (xfeature_is_aligned(i))
599 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
600 /*
601 * The offset of a given state in the non-compacted
602 * format is given to us in a CPUID leaf. We check
603 * them for being ordered (increasing offsets) in
604 * setup_xstate_features().
605 */
606 if (!using_compacted_format())
607 paranoid_xstate_size = xfeature_uncompacted_offset(i);
608 /*
609 * The compacted-format offset always depends on where
610 * the previous state ended.
611 */
612 paranoid_xstate_size += xfeature_size(i);
613 }
614 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size);
615}
616
617
618/*
619 * Get total size of enabled xstates in XCR0/xfeatures_mask.
620 *
621 * Note the SDM's wording here. "sub-function 0" only enumerates
622 * the size of the *user* states. If we use it to size a buffer
623 * that we use 'XSAVES' on, we could potentially overflow the
624 * buffer because 'XSAVES' saves system states too.
625 *
626 * Note that we do not currently set any bits on IA32_XSS so
627 * 'XCR0 | IA32_XSS == XCR0' for now.
628 */
629static unsigned int __init get_xsaves_size(void)
630{
631 unsigned int eax, ebx, ecx, edx;
632 /*
633 * - CPUID function 0DH, sub-function 1:
634 * EBX enumerates the size (in bytes) required by
635 * the XSAVES instruction for an XSAVE area
636 * containing all the state components
637 * corresponding to bits currently set in
638 * XCR0 | IA32_XSS.
639 */
640 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
641 return ebx;
642}
643
644static unsigned int __init get_xsave_size(void)
645{
646 unsigned int eax, ebx, ecx, edx;
647 /*
648 * - CPUID function 0DH, sub-function 0:
649 * EBX enumerates the size (in bytes) required by
650 * the XSAVE instruction for an XSAVE area
651 * containing all the *user* state components
652 * corresponding to bits currently set in XCR0.
653 */
654 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
655 return ebx;
656}
657
658/*
659 * Will the runtime-enumerated 'xstate_size' fit in the init
660 * task's statically-allocated buffer?
661 */
662static bool is_supported_xstate_size(unsigned int test_xstate_size)
663{
664 if (test_xstate_size <= sizeof(union fpregs_state))
665 return true;
666
667 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
668 sizeof(union fpregs_state), test_xstate_size);
669 return false;
670}
671
672static int init_xstate_size(void)
673{
674 /* Recompute the context size for enabled features: */
675 unsigned int possible_xstate_size;
676 unsigned int xsave_size;
677
678 xsave_size = get_xsave_size();
679
680 if (boot_cpu_has(X86_FEATURE_XSAVES))
681 possible_xstate_size = get_xsaves_size();
682 else
683 possible_xstate_size = xsave_size;
684
685 /* Ensure we have the space to store all enabled: */
686 if (!is_supported_xstate_size(possible_xstate_size))
687 return -EINVAL;
688
689 /*
690 * The size is OK, we are definitely going to use xsave,
691 * make it known to the world that we need more space.
692 */
693 fpu_kernel_xstate_size = possible_xstate_size;
694 do_extra_xstate_size_checks();
695
696 /*
697 * User space is always in standard format.
698 */
699 fpu_user_xstate_size = xsave_size;
700 return 0;
701}
702
703/*
704 * We enabled the XSAVE hardware, but something went wrong and
705 * we can not use it. Disable it.
706 */
707static void fpu__init_disable_system_xstate(void)
708{
709 xfeatures_mask = 0;
710 cr4_clear_bits(X86_CR4_OSXSAVE);
711 fpu__xstate_clear_all_cpu_caps();
712}
713
714/*
715 * Enable and initialize the xsave feature.
716 * Called once per system bootup.
717 */
718void __init fpu__init_system_xstate(void)
719{
720 unsigned int eax, ebx, ecx, edx;
721 static int on_boot_cpu __initdata = 1;
722 int err;
723 int i;
724
725 WARN_ON_FPU(!on_boot_cpu);
726 on_boot_cpu = 0;
727
728 if (!boot_cpu_has(X86_FEATURE_FPU)) {
729 pr_info("x86/fpu: No FPU detected\n");
730 return;
731 }
732
733 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
734 pr_info("x86/fpu: x87 FPU will use %s\n",
735 boot_cpu_has(X86_FEATURE_FXSR) ? "FXSAVE" : "FSAVE");
736 return;
737 }
738
739 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
740 WARN_ON_FPU(1);
741 return;
742 }
743
744 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
745 xfeatures_mask = eax + ((u64)edx << 32);
746
747 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
748 /*
749 * This indicates that something really unexpected happened
750 * with the enumeration. Disable XSAVE and try to continue
751 * booting without it. This is too early to BUG().
752 */
753 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
754 goto out_disable;
755 }
756
757 /*
758 * Clear XSAVE features that are disabled in the normal CPUID.
759 */
760 for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
761 if (!boot_cpu_has(xsave_cpuid_features[i]))
762 xfeatures_mask &= ~BIT(i);
763 }
764
765 xfeatures_mask &= fpu__get_supported_xfeatures_mask();
766
767 /* Enable xstate instructions to be able to continue with initialization: */
768 fpu__init_cpu_xstate();
769 err = init_xstate_size();
770 if (err)
771 goto out_disable;
772
773 /*
774 * Update info used for ptrace frames; use standard-format size and no
775 * supervisor xstates:
776 */
777 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR);
778
779 fpu__init_prepare_fx_sw_frame();
780 setup_init_fpu_buf();
781 setup_xstate_comp();
782 print_xstate_offset_size();
783
784 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
785 xfeatures_mask,
786 fpu_kernel_xstate_size,
787 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard");
788 return;
789
790out_disable:
791 /* something went wrong, try to boot without any XSAVE support */
792 fpu__init_disable_system_xstate();
793}
794
795/*
796 * Restore minimal FPU state after suspend:
797 */
798void fpu__resume_cpu(void)
799{
800 /*
801 * Restore XCR0 on xsave capable CPUs:
802 */
803 if (boot_cpu_has(X86_FEATURE_XSAVE))
804 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
805}
806
807/*
808 * Given an xstate feature mask, calculate where in the xsave
809 * buffer the state is. Callers should ensure that the buffer
810 * is valid.
811 *
812 * Note: does not work for compacted buffers.
813 */
814void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask)
815{
816 int feature_nr = fls64(xstate_feature_mask) - 1;
817
818 if (!xfeature_enabled(feature_nr)) {
819 WARN_ON_FPU(1);
820 return NULL;
821 }
822
823 return (void *)xsave + xstate_comp_offsets[feature_nr];
824}
825/*
826 * Given the xsave area and a state inside, this function returns the
827 * address of the state.
828 *
829 * This is the API that is called to get xstate address in either
830 * standard format or compacted format of xsave area.
831 *
832 * Note that if there is no data for the field in the xsave buffer
833 * this will return NULL.
834 *
835 * Inputs:
836 * xstate: the thread's storage area for all FPU data
837 * xstate_feature: state which is defined in xsave.h (e.g.
838 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...)
839 * Output:
840 * address of the state in the xsave area, or NULL if the
841 * field is not present in the xsave buffer.
842 */
843void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
844{
845 /*
846 * Do we even *have* xsave state?
847 */
848 if (!boot_cpu_has(X86_FEATURE_XSAVE))
849 return NULL;
850
851 /*
852 * We should not ever be requesting features that we
853 * have not enabled. Remember that pcntxt_mask is
854 * what we write to the XCR0 register.
855 */
856 WARN_ONCE(!(xfeatures_mask & xstate_feature),
857 "get of unsupported state");
858 /*
859 * This assumes the last 'xsave*' instruction to
860 * have requested that 'xstate_feature' be saved.
861 * If it did not, we might be seeing and old value
862 * of the field in the buffer.
863 *
864 * This can happen because the last 'xsave' did not
865 * request that this feature be saved (unlikely)
866 * or because the "init optimization" caused it
867 * to not be saved.
868 */
869 if (!(xsave->header.xfeatures & xstate_feature))
870 return NULL;
871
872 return __raw_xsave_addr(xsave, xstate_feature);
873}
874EXPORT_SYMBOL_GPL(get_xsave_addr);
875
876/*
877 * This wraps up the common operations that need to occur when retrieving
878 * data from xsave state. It first ensures that the current task was
879 * using the FPU and retrieves the data in to a buffer. It then calculates
880 * the offset of the requested field in the buffer.
881 *
882 * This function is safe to call whether the FPU is in use or not.
883 *
884 * Note that this only works on the current task.
885 *
886 * Inputs:
887 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
888 * XFEATURE_MASK_SSE, etc...)
889 * Output:
890 * address of the state in the xsave area or NULL if the state
891 * is not present or is in its 'init state'.
892 */
893const void *get_xsave_field_ptr(int xsave_state)
894{
895 struct fpu *fpu = ¤t->thread.fpu;
896
897 if (!fpu->initialized)
898 return NULL;
899 /*
900 * fpu__save() takes the CPU's xstate registers
901 * and saves them off to the 'fpu memory buffer.
902 */
903 fpu__save(fpu);
904
905 return get_xsave_addr(&fpu->state.xsave, xsave_state);
906}
907
908#ifdef CONFIG_ARCH_HAS_PKEYS
909
910#define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2)
911#define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1)
912/*
913 * This will go out and modify PKRU register to set the access
914 * rights for @pkey to @init_val.
915 */
916int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
917 unsigned long init_val)
918{
919 u32 old_pkru;
920 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY);
921 u32 new_pkru_bits = 0;
922
923 /*
924 * This check implies XSAVE support. OSPKE only gets
925 * set if we enable XSAVE and we enable PKU in XCR0.
926 */
927 if (!boot_cpu_has(X86_FEATURE_OSPKE))
928 return -EINVAL;
929
930 /* Set the bits we need in PKRU: */
931 if (init_val & PKEY_DISABLE_ACCESS)
932 new_pkru_bits |= PKRU_AD_BIT;
933 if (init_val & PKEY_DISABLE_WRITE)
934 new_pkru_bits |= PKRU_WD_BIT;
935
936 /* Shift the bits in to the correct place in PKRU for pkey: */
937 new_pkru_bits <<= pkey_shift;
938
939 /* Get old PKRU and mask off any old bits in place: */
940 old_pkru = read_pkru();
941 old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift);
942
943 /* Write old part along with new part: */
944 write_pkru(old_pkru | new_pkru_bits);
945
946 return 0;
947}
948#endif /* ! CONFIG_ARCH_HAS_PKEYS */
949
950/*
951 * Weird legacy quirk: SSE and YMM states store information in the
952 * MXCSR and MXCSR_FLAGS fields of the FP area. That means if the FP
953 * area is marked as unused in the xfeatures header, we need to copy
954 * MXCSR and MXCSR_FLAGS if either SSE or YMM are in use.
955 */
956static inline bool xfeatures_mxcsr_quirk(u64 xfeatures)
957{
958 if (!(xfeatures & (XFEATURE_MASK_SSE|XFEATURE_MASK_YMM)))
959 return false;
960
961 if (xfeatures & XFEATURE_MASK_FP)
962 return false;
963
964 return true;
965}
966
967/*
968 * This is similar to user_regset_copyout(), but will not add offset to
969 * the source data pointer or increment pos, count, kbuf, and ubuf.
970 */
971static inline void
972__copy_xstate_to_kernel(void *kbuf, const void *data,
973 unsigned int offset, unsigned int size, unsigned int size_total)
974{
975 if (offset < size_total) {
976 unsigned int copy = min(size, size_total - offset);
977
978 memcpy(kbuf + offset, data, copy);
979 }
980}
981
982/*
983 * Convert from kernel XSAVES compacted format to standard format and copy
984 * to a kernel-space ptrace buffer.
985 *
986 * It supports partial copy but pos always starts from zero. This is called
987 * from xstateregs_get() and there we check the CPU has XSAVES.
988 */
989int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total)
990{
991 unsigned int offset, size;
992 struct xstate_header header;
993 int i;
994
995 /*
996 * Currently copy_regset_to_user() starts from pos 0:
997 */
998 if (unlikely(offset_start != 0))
999 return -EFAULT;
1000
1001 /*
1002 * The destination is a ptrace buffer; we put in only user xstates:
1003 */
1004 memset(&header, 0, sizeof(header));
1005 header.xfeatures = xsave->header.xfeatures;
1006 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
1007
1008 /*
1009 * Copy xregs_state->header:
1010 */
1011 offset = offsetof(struct xregs_state, header);
1012 size = sizeof(header);
1013
1014 __copy_xstate_to_kernel(kbuf, &header, offset, size, size_total);
1015
1016 for (i = 0; i < XFEATURE_MAX; i++) {
1017 /*
1018 * Copy only in-use xstates:
1019 */
1020 if ((header.xfeatures >> i) & 1) {
1021 void *src = __raw_xsave_addr(xsave, 1 << i);
1022
1023 offset = xstate_offsets[i];
1024 size = xstate_sizes[i];
1025
1026 /* The next component has to fit fully into the output buffer: */
1027 if (offset + size > size_total)
1028 break;
1029
1030 __copy_xstate_to_kernel(kbuf, src, offset, size, size_total);
1031 }
1032
1033 }
1034
1035 if (xfeatures_mxcsr_quirk(header.xfeatures)) {
1036 offset = offsetof(struct fxregs_state, mxcsr);
1037 size = MXCSR_AND_FLAGS_SIZE;
1038 __copy_xstate_to_kernel(kbuf, &xsave->i387.mxcsr, offset, size, size_total);
1039 }
1040
1041 /*
1042 * Fill xsave->i387.sw_reserved value for ptrace frame:
1043 */
1044 offset = offsetof(struct fxregs_state, sw_reserved);
1045 size = sizeof(xstate_fx_sw_bytes);
1046
1047 __copy_xstate_to_kernel(kbuf, xstate_fx_sw_bytes, offset, size, size_total);
1048
1049 return 0;
1050}
1051
1052static inline int
1053__copy_xstate_to_user(void __user *ubuf, const void *data, unsigned int offset, unsigned int size, unsigned int size_total)
1054{
1055 if (!size)
1056 return 0;
1057
1058 if (offset < size_total) {
1059 unsigned int copy = min(size, size_total - offset);
1060
1061 if (__copy_to_user(ubuf + offset, data, copy))
1062 return -EFAULT;
1063 }
1064 return 0;
1065}
1066
1067/*
1068 * Convert from kernel XSAVES compacted format to standard format and copy
1069 * to a user-space buffer. It supports partial copy but pos always starts from
1070 * zero. This is called from xstateregs_get() and there we check the CPU
1071 * has XSAVES.
1072 */
1073int copy_xstate_to_user(void __user *ubuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total)
1074{
1075 unsigned int offset, size;
1076 int ret, i;
1077 struct xstate_header header;
1078
1079 /*
1080 * Currently copy_regset_to_user() starts from pos 0:
1081 */
1082 if (unlikely(offset_start != 0))
1083 return -EFAULT;
1084
1085 /*
1086 * The destination is a ptrace buffer; we put in only user xstates:
1087 */
1088 memset(&header, 0, sizeof(header));
1089 header.xfeatures = xsave->header.xfeatures;
1090 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
1091
1092 /*
1093 * Copy xregs_state->header:
1094 */
1095 offset = offsetof(struct xregs_state, header);
1096 size = sizeof(header);
1097
1098 ret = __copy_xstate_to_user(ubuf, &header, offset, size, size_total);
1099 if (ret)
1100 return ret;
1101
1102 for (i = 0; i < XFEATURE_MAX; i++) {
1103 /*
1104 * Copy only in-use xstates:
1105 */
1106 if ((header.xfeatures >> i) & 1) {
1107 void *src = __raw_xsave_addr(xsave, 1 << i);
1108
1109 offset = xstate_offsets[i];
1110 size = xstate_sizes[i];
1111
1112 /* The next component has to fit fully into the output buffer: */
1113 if (offset + size > size_total)
1114 break;
1115
1116 ret = __copy_xstate_to_user(ubuf, src, offset, size, size_total);
1117 if (ret)
1118 return ret;
1119 }
1120
1121 }
1122
1123 if (xfeatures_mxcsr_quirk(header.xfeatures)) {
1124 offset = offsetof(struct fxregs_state, mxcsr);
1125 size = MXCSR_AND_FLAGS_SIZE;
1126 __copy_xstate_to_user(ubuf, &xsave->i387.mxcsr, offset, size, size_total);
1127 }
1128
1129 /*
1130 * Fill xsave->i387.sw_reserved value for ptrace frame:
1131 */
1132 offset = offsetof(struct fxregs_state, sw_reserved);
1133 size = sizeof(xstate_fx_sw_bytes);
1134
1135 ret = __copy_xstate_to_user(ubuf, xstate_fx_sw_bytes, offset, size, size_total);
1136 if (ret)
1137 return ret;
1138
1139 return 0;
1140}
1141
1142/*
1143 * Convert from a ptrace standard-format kernel buffer to kernel XSAVES format
1144 * and copy to the target thread. This is called from xstateregs_set().
1145 */
1146int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
1147{
1148 unsigned int offset, size;
1149 int i;
1150 struct xstate_header hdr;
1151
1152 offset = offsetof(struct xregs_state, header);
1153 size = sizeof(hdr);
1154
1155 memcpy(&hdr, kbuf + offset, size);
1156
1157 if (validate_xstate_header(&hdr))
1158 return -EINVAL;
1159
1160 for (i = 0; i < XFEATURE_MAX; i++) {
1161 u64 mask = ((u64)1 << i);
1162
1163 if (hdr.xfeatures & mask) {
1164 void *dst = __raw_xsave_addr(xsave, 1 << i);
1165
1166 offset = xstate_offsets[i];
1167 size = xstate_sizes[i];
1168
1169 memcpy(dst, kbuf + offset, size);
1170 }
1171 }
1172
1173 if (xfeatures_mxcsr_quirk(hdr.xfeatures)) {
1174 offset = offsetof(struct fxregs_state, mxcsr);
1175 size = MXCSR_AND_FLAGS_SIZE;
1176 memcpy(&xsave->i387.mxcsr, kbuf + offset, size);
1177 }
1178
1179 /*
1180 * The state that came in from userspace was user-state only.
1181 * Mask all the user states out of 'xfeatures':
1182 */
1183 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1184
1185 /*
1186 * Add back in the features that came in from userspace:
1187 */
1188 xsave->header.xfeatures |= hdr.xfeatures;
1189
1190 return 0;
1191}
1192
1193/*
1194 * Convert from a ptrace or sigreturn standard-format user-space buffer to
1195 * kernel XSAVES format and copy to the target thread. This is called from
1196 * xstateregs_set(), as well as potentially from the sigreturn() and
1197 * rt_sigreturn() system calls.
1198 */
1199int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf)
1200{
1201 unsigned int offset, size;
1202 int i;
1203 struct xstate_header hdr;
1204
1205 offset = offsetof(struct xregs_state, header);
1206 size = sizeof(hdr);
1207
1208 if (__copy_from_user(&hdr, ubuf + offset, size))
1209 return -EFAULT;
1210
1211 if (validate_xstate_header(&hdr))
1212 return -EINVAL;
1213
1214 for (i = 0; i < XFEATURE_MAX; i++) {
1215 u64 mask = ((u64)1 << i);
1216
1217 if (hdr.xfeatures & mask) {
1218 void *dst = __raw_xsave_addr(xsave, 1 << i);
1219
1220 offset = xstate_offsets[i];
1221 size = xstate_sizes[i];
1222
1223 if (__copy_from_user(dst, ubuf + offset, size))
1224 return -EFAULT;
1225 }
1226 }
1227
1228 if (xfeatures_mxcsr_quirk(hdr.xfeatures)) {
1229 offset = offsetof(struct fxregs_state, mxcsr);
1230 size = MXCSR_AND_FLAGS_SIZE;
1231 if (__copy_from_user(&xsave->i387.mxcsr, ubuf + offset, size))
1232 return -EFAULT;
1233 }
1234
1235 /*
1236 * The state that came in from userspace was user-state only.
1237 * Mask all the user states out of 'xfeatures':
1238 */
1239 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1240
1241 /*
1242 * Add back in the features that came in from userspace:
1243 */
1244 xsave->header.xfeatures |= hdr.xfeatures;
1245
1246 return 0;
1247}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * xsave/xrstor support.
4 *
5 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
6 */
7#include <linux/compat.h>
8#include <linux/cpu.h>
9#include <linux/mman.h>
10#include <linux/pkeys.h>
11#include <linux/seq_file.h>
12#include <linux/proc_fs.h>
13
14#include <asm/fpu/api.h>
15#include <asm/fpu/internal.h>
16#include <asm/fpu/signal.h>
17#include <asm/fpu/regset.h>
18#include <asm/fpu/xstate.h>
19
20#include <asm/tlbflush.h>
21#include <asm/cpufeature.h>
22
23/*
24 * Although we spell it out in here, the Processor Trace
25 * xfeature is completely unused. We use other mechanisms
26 * to save/restore PT state in Linux.
27 */
28static const char *xfeature_names[] =
29{
30 "x87 floating point registers" ,
31 "SSE registers" ,
32 "AVX registers" ,
33 "MPX bounds registers" ,
34 "MPX CSR" ,
35 "AVX-512 opmask" ,
36 "AVX-512 Hi256" ,
37 "AVX-512 ZMM_Hi256" ,
38 "Processor Trace (unused)" ,
39 "Protection Keys User registers",
40 "PASID state",
41 "unknown xstate feature" ,
42};
43
44static short xsave_cpuid_features[] __initdata = {
45 X86_FEATURE_FPU,
46 X86_FEATURE_XMM,
47 X86_FEATURE_AVX,
48 X86_FEATURE_MPX,
49 X86_FEATURE_MPX,
50 X86_FEATURE_AVX512F,
51 X86_FEATURE_AVX512F,
52 X86_FEATURE_AVX512F,
53 X86_FEATURE_INTEL_PT,
54 X86_FEATURE_PKU,
55 X86_FEATURE_ENQCMD,
56};
57
58/*
59 * This represents the full set of bits that should ever be set in a kernel
60 * XSAVE buffer, both supervisor and user xstates.
61 */
62u64 xfeatures_mask_all __ro_after_init;
63EXPORT_SYMBOL_GPL(xfeatures_mask_all);
64
65static unsigned int xstate_offsets[XFEATURE_MAX] __ro_after_init =
66 { [ 0 ... XFEATURE_MAX - 1] = -1};
67static unsigned int xstate_sizes[XFEATURE_MAX] __ro_after_init =
68 { [ 0 ... XFEATURE_MAX - 1] = -1};
69static unsigned int xstate_comp_offsets[XFEATURE_MAX] __ro_after_init =
70 { [ 0 ... XFEATURE_MAX - 1] = -1};
71static unsigned int xstate_supervisor_only_offsets[XFEATURE_MAX] __ro_after_init =
72 { [ 0 ... XFEATURE_MAX - 1] = -1};
73
74/*
75 * The XSAVE area of kernel can be in standard or compacted format;
76 * it is always in standard format for user mode. This is the user
77 * mode standard format size used for signal and ptrace frames.
78 */
79unsigned int fpu_user_xstate_size __ro_after_init;
80
81/*
82 * Return whether the system supports a given xfeature.
83 *
84 * Also return the name of the (most advanced) feature that the caller requested:
85 */
86int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
87{
88 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask_all;
89
90 if (unlikely(feature_name)) {
91 long xfeature_idx, max_idx;
92 u64 xfeatures_print;
93 /*
94 * So we use FLS here to be able to print the most advanced
95 * feature that was requested but is missing. So if a driver
96 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
97 * missing AVX feature - this is the most informative message
98 * to users:
99 */
100 if (xfeatures_missing)
101 xfeatures_print = xfeatures_missing;
102 else
103 xfeatures_print = xfeatures_needed;
104
105 xfeature_idx = fls64(xfeatures_print)-1;
106 max_idx = ARRAY_SIZE(xfeature_names)-1;
107 xfeature_idx = min(xfeature_idx, max_idx);
108
109 *feature_name = xfeature_names[xfeature_idx];
110 }
111
112 if (xfeatures_missing)
113 return 0;
114
115 return 1;
116}
117EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
118
119static bool xfeature_is_supervisor(int xfeature_nr)
120{
121 /*
122 * Extended State Enumeration Sub-leaves (EAX = 0DH, ECX = n, n > 1)
123 * returns ECX[0] set to (1) for a supervisor state, and cleared (0)
124 * for a user state.
125 */
126 u32 eax, ebx, ecx, edx;
127
128 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
129 return ecx & 1;
130}
131
132/*
133 * Enable the extended processor state save/restore feature.
134 * Called once per CPU onlining.
135 */
136void fpu__init_cpu_xstate(void)
137{
138 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask_all)
139 return;
140
141 cr4_set_bits(X86_CR4_OSXSAVE);
142
143 /*
144 * XCR_XFEATURE_ENABLED_MASK (aka. XCR0) sets user features
145 * managed by XSAVE{C, OPT, S} and XRSTOR{S}. Only XSAVE user
146 * states can be set here.
147 */
148 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_uabi());
149
150 /*
151 * MSR_IA32_XSS sets supervisor states managed by XSAVES.
152 */
153 if (boot_cpu_has(X86_FEATURE_XSAVES)) {
154 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() |
155 xfeatures_mask_independent());
156 }
157}
158
159static bool xfeature_enabled(enum xfeature xfeature)
160{
161 return xfeatures_mask_all & BIT_ULL(xfeature);
162}
163
164/*
165 * Record the offsets and sizes of various xstates contained
166 * in the XSAVE state memory layout.
167 */
168static void __init setup_xstate_features(void)
169{
170 u32 eax, ebx, ecx, edx, i;
171 /* start at the beginning of the "extended state" */
172 unsigned int last_good_offset = offsetof(struct xregs_state,
173 extended_state_area);
174 /*
175 * The FP xstates and SSE xstates are legacy states. They are always
176 * in the fixed offsets in the xsave area in either compacted form
177 * or standard form.
178 */
179 xstate_offsets[XFEATURE_FP] = 0;
180 xstate_sizes[XFEATURE_FP] = offsetof(struct fxregs_state,
181 xmm_space);
182
183 xstate_offsets[XFEATURE_SSE] = xstate_sizes[XFEATURE_FP];
184 xstate_sizes[XFEATURE_SSE] = sizeof_field(struct fxregs_state,
185 xmm_space);
186
187 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
188 if (!xfeature_enabled(i))
189 continue;
190
191 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
192
193 xstate_sizes[i] = eax;
194
195 /*
196 * If an xfeature is supervisor state, the offset in EBX is
197 * invalid, leave it to -1.
198 */
199 if (xfeature_is_supervisor(i))
200 continue;
201
202 xstate_offsets[i] = ebx;
203
204 /*
205 * In our xstate size checks, we assume that the highest-numbered
206 * xstate feature has the highest offset in the buffer. Ensure
207 * it does.
208 */
209 WARN_ONCE(last_good_offset > xstate_offsets[i],
210 "x86/fpu: misordered xstate at %d\n", last_good_offset);
211
212 last_good_offset = xstate_offsets[i];
213 }
214}
215
216static void __init print_xstate_feature(u64 xstate_mask)
217{
218 const char *feature_name;
219
220 if (cpu_has_xfeatures(xstate_mask, &feature_name))
221 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name);
222}
223
224/*
225 * Print out all the supported xstate features:
226 */
227static void __init print_xstate_features(void)
228{
229 print_xstate_feature(XFEATURE_MASK_FP);
230 print_xstate_feature(XFEATURE_MASK_SSE);
231 print_xstate_feature(XFEATURE_MASK_YMM);
232 print_xstate_feature(XFEATURE_MASK_BNDREGS);
233 print_xstate_feature(XFEATURE_MASK_BNDCSR);
234 print_xstate_feature(XFEATURE_MASK_OPMASK);
235 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
236 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
237 print_xstate_feature(XFEATURE_MASK_PKRU);
238 print_xstate_feature(XFEATURE_MASK_PASID);
239}
240
241/*
242 * This check is important because it is easy to get XSTATE_*
243 * confused with XSTATE_BIT_*.
244 */
245#define CHECK_XFEATURE(nr) do { \
246 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
247 WARN_ON(nr >= XFEATURE_MAX); \
248} while (0)
249
250/*
251 * We could cache this like xstate_size[], but we only use
252 * it here, so it would be a waste of space.
253 */
254static int xfeature_is_aligned(int xfeature_nr)
255{
256 u32 eax, ebx, ecx, edx;
257
258 CHECK_XFEATURE(xfeature_nr);
259
260 if (!xfeature_enabled(xfeature_nr)) {
261 WARN_ONCE(1, "Checking alignment of disabled xfeature %d\n",
262 xfeature_nr);
263 return 0;
264 }
265
266 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
267 /*
268 * The value returned by ECX[1] indicates the alignment
269 * of state component 'i' when the compacted format
270 * of the extended region of an XSAVE area is used:
271 */
272 return !!(ecx & 2);
273}
274
275/*
276 * This function sets up offsets and sizes of all extended states in
277 * xsave area. This supports both standard format and compacted format
278 * of the xsave area.
279 */
280static void __init setup_xstate_comp_offsets(void)
281{
282 unsigned int next_offset;
283 int i;
284
285 /*
286 * The FP xstates and SSE xstates are legacy states. They are always
287 * in the fixed offsets in the xsave area in either compacted form
288 * or standard form.
289 */
290 xstate_comp_offsets[XFEATURE_FP] = 0;
291 xstate_comp_offsets[XFEATURE_SSE] = offsetof(struct fxregs_state,
292 xmm_space);
293
294 if (!boot_cpu_has(X86_FEATURE_XSAVES)) {
295 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
296 if (xfeature_enabled(i))
297 xstate_comp_offsets[i] = xstate_offsets[i];
298 }
299 return;
300 }
301
302 next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE;
303
304 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
305 if (!xfeature_enabled(i))
306 continue;
307
308 if (xfeature_is_aligned(i))
309 next_offset = ALIGN(next_offset, 64);
310
311 xstate_comp_offsets[i] = next_offset;
312 next_offset += xstate_sizes[i];
313 }
314}
315
316/*
317 * Setup offsets of a supervisor-state-only XSAVES buffer:
318 *
319 * The offsets stored in xstate_comp_offsets[] only work for one specific
320 * value of the Requested Feature BitMap (RFBM). In cases where a different
321 * RFBM value is used, a different set of offsets is required. This set of
322 * offsets is for when RFBM=xfeatures_mask_supervisor().
323 */
324static void __init setup_supervisor_only_offsets(void)
325{
326 unsigned int next_offset;
327 int i;
328
329 next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE;
330
331 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
332 if (!xfeature_enabled(i) || !xfeature_is_supervisor(i))
333 continue;
334
335 if (xfeature_is_aligned(i))
336 next_offset = ALIGN(next_offset, 64);
337
338 xstate_supervisor_only_offsets[i] = next_offset;
339 next_offset += xstate_sizes[i];
340 }
341}
342
343/*
344 * Print out xstate component offsets and sizes
345 */
346static void __init print_xstate_offset_size(void)
347{
348 int i;
349
350 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
351 if (!xfeature_enabled(i))
352 continue;
353 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n",
354 i, xstate_comp_offsets[i], i, xstate_sizes[i]);
355 }
356}
357
358/*
359 * All supported features have either init state all zeros or are
360 * handled in setup_init_fpu() individually. This is an explicit
361 * feature list and does not use XFEATURE_MASK*SUPPORTED to catch
362 * newly added supported features at build time and make people
363 * actually look at the init state for the new feature.
364 */
365#define XFEATURES_INIT_FPSTATE_HANDLED \
366 (XFEATURE_MASK_FP | \
367 XFEATURE_MASK_SSE | \
368 XFEATURE_MASK_YMM | \
369 XFEATURE_MASK_OPMASK | \
370 XFEATURE_MASK_ZMM_Hi256 | \
371 XFEATURE_MASK_Hi16_ZMM | \
372 XFEATURE_MASK_PKRU | \
373 XFEATURE_MASK_BNDREGS | \
374 XFEATURE_MASK_BNDCSR | \
375 XFEATURE_MASK_PASID)
376
377/*
378 * setup the xstate image representing the init state
379 */
380static void __init setup_init_fpu_buf(void)
381{
382 static int on_boot_cpu __initdata = 1;
383
384 BUILD_BUG_ON((XFEATURE_MASK_USER_SUPPORTED |
385 XFEATURE_MASK_SUPERVISOR_SUPPORTED) !=
386 XFEATURES_INIT_FPSTATE_HANDLED);
387
388 WARN_ON_FPU(!on_boot_cpu);
389 on_boot_cpu = 0;
390
391 if (!boot_cpu_has(X86_FEATURE_XSAVE))
392 return;
393
394 setup_xstate_features();
395 print_xstate_features();
396
397 if (boot_cpu_has(X86_FEATURE_XSAVES))
398 init_fpstate.xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT |
399 xfeatures_mask_all;
400
401 /*
402 * Init all the features state with header.xfeatures being 0x0
403 */
404 os_xrstor_booting(&init_fpstate.xsave);
405
406 /*
407 * All components are now in init state. Read the state back so
408 * that init_fpstate contains all non-zero init state. This only
409 * works with XSAVE, but not with XSAVEOPT and XSAVES because
410 * those use the init optimization which skips writing data for
411 * components in init state.
412 *
413 * XSAVE could be used, but that would require to reshuffle the
414 * data when XSAVES is available because XSAVES uses xstate
415 * compaction. But doing so is a pointless exercise because most
416 * components have an all zeros init state except for the legacy
417 * ones (FP and SSE). Those can be saved with FXSAVE into the
418 * legacy area. Adding new features requires to ensure that init
419 * state is all zeroes or if not to add the necessary handling
420 * here.
421 */
422 fxsave(&init_fpstate.fxsave);
423}
424
425static int xfeature_uncompacted_offset(int xfeature_nr)
426{
427 u32 eax, ebx, ecx, edx;
428
429 /*
430 * Only XSAVES supports supervisor states and it uses compacted
431 * format. Checking a supervisor state's uncompacted offset is
432 * an error.
433 */
434 if (XFEATURE_MASK_SUPERVISOR_ALL & BIT_ULL(xfeature_nr)) {
435 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr);
436 return -1;
437 }
438
439 CHECK_XFEATURE(xfeature_nr);
440 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
441 return ebx;
442}
443
444int xfeature_size(int xfeature_nr)
445{
446 u32 eax, ebx, ecx, edx;
447
448 CHECK_XFEATURE(xfeature_nr);
449 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
450 return eax;
451}
452
453/* Validate an xstate header supplied by userspace (ptrace or sigreturn) */
454static int validate_user_xstate_header(const struct xstate_header *hdr)
455{
456 /* No unknown or supervisor features may be set */
457 if (hdr->xfeatures & ~xfeatures_mask_uabi())
458 return -EINVAL;
459
460 /* Userspace must use the uncompacted format */
461 if (hdr->xcomp_bv)
462 return -EINVAL;
463
464 /*
465 * If 'reserved' is shrunken to add a new field, make sure to validate
466 * that new field here!
467 */
468 BUILD_BUG_ON(sizeof(hdr->reserved) != 48);
469
470 /* No reserved bits may be set */
471 if (memchr_inv(hdr->reserved, 0, sizeof(hdr->reserved)))
472 return -EINVAL;
473
474 return 0;
475}
476
477static void __xstate_dump_leaves(void)
478{
479 int i;
480 u32 eax, ebx, ecx, edx;
481 static int should_dump = 1;
482
483 if (!should_dump)
484 return;
485 should_dump = 0;
486 /*
487 * Dump out a few leaves past the ones that we support
488 * just in case there are some goodies up there
489 */
490 for (i = 0; i < XFEATURE_MAX + 10; i++) {
491 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
492 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
493 XSTATE_CPUID, i, eax, ebx, ecx, edx);
494 }
495}
496
497#define XSTATE_WARN_ON(x) do { \
498 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
499 __xstate_dump_leaves(); \
500 } \
501} while (0)
502
503#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
504 if ((nr == nr_macro) && \
505 WARN_ONCE(sz != sizeof(__struct), \
506 "%s: struct is %zu bytes, cpu state %d bytes\n", \
507 __stringify(nr_macro), sizeof(__struct), sz)) { \
508 __xstate_dump_leaves(); \
509 } \
510} while (0)
511
512/*
513 * We have a C struct for each 'xstate'. We need to ensure
514 * that our software representation matches what the CPU
515 * tells us about the state's size.
516 */
517static void check_xstate_against_struct(int nr)
518{
519 /*
520 * Ask the CPU for the size of the state.
521 */
522 int sz = xfeature_size(nr);
523 /*
524 * Match each CPU state with the corresponding software
525 * structure.
526 */
527 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
528 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
529 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
530 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
531 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
532 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
533 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state);
534 XCHECK_SZ(sz, nr, XFEATURE_PASID, struct ia32_pasid_state);
535
536 /*
537 * Make *SURE* to add any feature numbers in below if
538 * there are "holes" in the xsave state component
539 * numbers.
540 */
541 if ((nr < XFEATURE_YMM) ||
542 (nr >= XFEATURE_MAX) ||
543 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR) ||
544 ((nr >= XFEATURE_RSRVD_COMP_11) && (nr <= XFEATURE_LBR))) {
545 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
546 XSTATE_WARN_ON(1);
547 }
548}
549
550/*
551 * This essentially double-checks what the cpu told us about
552 * how large the XSAVE buffer needs to be. We are recalculating
553 * it to be safe.
554 *
555 * Independent XSAVE features allocate their own buffers and are not
556 * covered by these checks. Only the size of the buffer for task->fpu
557 * is checked here.
558 */
559static void do_extra_xstate_size_checks(void)
560{
561 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
562 int i;
563
564 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
565 if (!xfeature_enabled(i))
566 continue;
567
568 check_xstate_against_struct(i);
569 /*
570 * Supervisor state components can be managed only by
571 * XSAVES.
572 */
573 if (!cpu_feature_enabled(X86_FEATURE_XSAVES))
574 XSTATE_WARN_ON(xfeature_is_supervisor(i));
575
576 /* Align from the end of the previous feature */
577 if (xfeature_is_aligned(i))
578 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
579 /*
580 * The offset of a given state in the non-compacted
581 * format is given to us in a CPUID leaf. We check
582 * them for being ordered (increasing offsets) in
583 * setup_xstate_features(). XSAVES uses compacted format.
584 */
585 if (!cpu_feature_enabled(X86_FEATURE_XSAVES))
586 paranoid_xstate_size = xfeature_uncompacted_offset(i);
587 /*
588 * The compacted-format offset always depends on where
589 * the previous state ended.
590 */
591 paranoid_xstate_size += xfeature_size(i);
592 }
593 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size);
594}
595
596
597/*
598 * Get total size of enabled xstates in XCR0 | IA32_XSS.
599 *
600 * Note the SDM's wording here. "sub-function 0" only enumerates
601 * the size of the *user* states. If we use it to size a buffer
602 * that we use 'XSAVES' on, we could potentially overflow the
603 * buffer because 'XSAVES' saves system states too.
604 */
605static unsigned int __init get_xsaves_size(void)
606{
607 unsigned int eax, ebx, ecx, edx;
608 /*
609 * - CPUID function 0DH, sub-function 1:
610 * EBX enumerates the size (in bytes) required by
611 * the XSAVES instruction for an XSAVE area
612 * containing all the state components
613 * corresponding to bits currently set in
614 * XCR0 | IA32_XSS.
615 */
616 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
617 return ebx;
618}
619
620/*
621 * Get the total size of the enabled xstates without the independent supervisor
622 * features.
623 */
624static unsigned int __init get_xsaves_size_no_independent(void)
625{
626 u64 mask = xfeatures_mask_independent();
627 unsigned int size;
628
629 if (!mask)
630 return get_xsaves_size();
631
632 /* Disable independent features. */
633 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor());
634
635 /*
636 * Ask the hardware what size is required of the buffer.
637 * This is the size required for the task->fpu buffer.
638 */
639 size = get_xsaves_size();
640
641 /* Re-enable independent features so XSAVES will work on them again. */
642 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | mask);
643
644 return size;
645}
646
647static unsigned int __init get_xsave_size(void)
648{
649 unsigned int eax, ebx, ecx, edx;
650 /*
651 * - CPUID function 0DH, sub-function 0:
652 * EBX enumerates the size (in bytes) required by
653 * the XSAVE instruction for an XSAVE area
654 * containing all the *user* state components
655 * corresponding to bits currently set in XCR0.
656 */
657 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
658 return ebx;
659}
660
661/*
662 * Will the runtime-enumerated 'xstate_size' fit in the init
663 * task's statically-allocated buffer?
664 */
665static bool is_supported_xstate_size(unsigned int test_xstate_size)
666{
667 if (test_xstate_size <= sizeof(union fpregs_state))
668 return true;
669
670 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
671 sizeof(union fpregs_state), test_xstate_size);
672 return false;
673}
674
675static int __init init_xstate_size(void)
676{
677 /* Recompute the context size for enabled features: */
678 unsigned int possible_xstate_size;
679 unsigned int xsave_size;
680
681 xsave_size = get_xsave_size();
682
683 if (boot_cpu_has(X86_FEATURE_XSAVES))
684 possible_xstate_size = get_xsaves_size_no_independent();
685 else
686 possible_xstate_size = xsave_size;
687
688 /* Ensure we have the space to store all enabled: */
689 if (!is_supported_xstate_size(possible_xstate_size))
690 return -EINVAL;
691
692 /*
693 * The size is OK, we are definitely going to use xsave,
694 * make it known to the world that we need more space.
695 */
696 fpu_kernel_xstate_size = possible_xstate_size;
697 do_extra_xstate_size_checks();
698
699 /*
700 * User space is always in standard format.
701 */
702 fpu_user_xstate_size = xsave_size;
703 return 0;
704}
705
706/*
707 * We enabled the XSAVE hardware, but something went wrong and
708 * we can not use it. Disable it.
709 */
710static void fpu__init_disable_system_xstate(void)
711{
712 xfeatures_mask_all = 0;
713 cr4_clear_bits(X86_CR4_OSXSAVE);
714 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
715}
716
717/*
718 * Enable and initialize the xsave feature.
719 * Called once per system bootup.
720 */
721void __init fpu__init_system_xstate(void)
722{
723 unsigned int eax, ebx, ecx, edx;
724 static int on_boot_cpu __initdata = 1;
725 u64 xfeatures;
726 int err;
727 int i;
728
729 WARN_ON_FPU(!on_boot_cpu);
730 on_boot_cpu = 0;
731
732 if (!boot_cpu_has(X86_FEATURE_FPU)) {
733 pr_info("x86/fpu: No FPU detected\n");
734 return;
735 }
736
737 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
738 pr_info("x86/fpu: x87 FPU will use %s\n",
739 boot_cpu_has(X86_FEATURE_FXSR) ? "FXSAVE" : "FSAVE");
740 return;
741 }
742
743 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
744 WARN_ON_FPU(1);
745 return;
746 }
747
748 /*
749 * Find user xstates supported by the processor.
750 */
751 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
752 xfeatures_mask_all = eax + ((u64)edx << 32);
753
754 /*
755 * Find supervisor xstates supported by the processor.
756 */
757 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
758 xfeatures_mask_all |= ecx + ((u64)edx << 32);
759
760 if ((xfeatures_mask_uabi() & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
761 /*
762 * This indicates that something really unexpected happened
763 * with the enumeration. Disable XSAVE and try to continue
764 * booting without it. This is too early to BUG().
765 */
766 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n",
767 xfeatures_mask_all);
768 goto out_disable;
769 }
770
771 /*
772 * Clear XSAVE features that are disabled in the normal CPUID.
773 */
774 for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
775 if (!boot_cpu_has(xsave_cpuid_features[i]))
776 xfeatures_mask_all &= ~BIT_ULL(i);
777 }
778
779 xfeatures_mask_all &= XFEATURE_MASK_USER_SUPPORTED |
780 XFEATURE_MASK_SUPERVISOR_SUPPORTED;
781
782 /* Store it for paranoia check at the end */
783 xfeatures = xfeatures_mask_all;
784
785 /* Enable xstate instructions to be able to continue with initialization: */
786 fpu__init_cpu_xstate();
787 err = init_xstate_size();
788 if (err)
789 goto out_disable;
790
791 /*
792 * Update info used for ptrace frames; use standard-format size and no
793 * supervisor xstates:
794 */
795 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask_uabi());
796
797 fpu__init_prepare_fx_sw_frame();
798 setup_init_fpu_buf();
799 setup_xstate_comp_offsets();
800 setup_supervisor_only_offsets();
801
802 /*
803 * Paranoia check whether something in the setup modified the
804 * xfeatures mask.
805 */
806 if (xfeatures != xfeatures_mask_all) {
807 pr_err("x86/fpu: xfeatures modified from 0x%016llx to 0x%016llx during init, disabling XSAVE\n",
808 xfeatures, xfeatures_mask_all);
809 goto out_disable;
810 }
811
812 print_xstate_offset_size();
813 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
814 xfeatures_mask_all,
815 fpu_kernel_xstate_size,
816 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard");
817 return;
818
819out_disable:
820 /* something went wrong, try to boot without any XSAVE support */
821 fpu__init_disable_system_xstate();
822}
823
824/*
825 * Restore minimal FPU state after suspend:
826 */
827void fpu__resume_cpu(void)
828{
829 /*
830 * Restore XCR0 on xsave capable CPUs:
831 */
832 if (cpu_feature_enabled(X86_FEATURE_XSAVE))
833 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_uabi());
834
835 /*
836 * Restore IA32_XSS. The same CPUID bit enumerates support
837 * of XSAVES and MSR_IA32_XSS.
838 */
839 if (cpu_feature_enabled(X86_FEATURE_XSAVES)) {
840 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() |
841 xfeatures_mask_independent());
842 }
843}
844
845/*
846 * Given an xstate feature nr, calculate where in the xsave
847 * buffer the state is. Callers should ensure that the buffer
848 * is valid.
849 */
850static void *__raw_xsave_addr(struct xregs_state *xsave, int xfeature_nr)
851{
852 if (!xfeature_enabled(xfeature_nr)) {
853 WARN_ON_FPU(1);
854 return NULL;
855 }
856
857 return (void *)xsave + xstate_comp_offsets[xfeature_nr];
858}
859/*
860 * Given the xsave area and a state inside, this function returns the
861 * address of the state.
862 *
863 * This is the API that is called to get xstate address in either
864 * standard format or compacted format of xsave area.
865 *
866 * Note that if there is no data for the field in the xsave buffer
867 * this will return NULL.
868 *
869 * Inputs:
870 * xstate: the thread's storage area for all FPU data
871 * xfeature_nr: state which is defined in xsave.h (e.g. XFEATURE_FP,
872 * XFEATURE_SSE, etc...)
873 * Output:
874 * address of the state in the xsave area, or NULL if the
875 * field is not present in the xsave buffer.
876 */
877void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr)
878{
879 /*
880 * Do we even *have* xsave state?
881 */
882 if (!boot_cpu_has(X86_FEATURE_XSAVE))
883 return NULL;
884
885 /*
886 * We should not ever be requesting features that we
887 * have not enabled.
888 */
889 WARN_ONCE(!(xfeatures_mask_all & BIT_ULL(xfeature_nr)),
890 "get of unsupported state");
891 /*
892 * This assumes the last 'xsave*' instruction to
893 * have requested that 'xfeature_nr' be saved.
894 * If it did not, we might be seeing and old value
895 * of the field in the buffer.
896 *
897 * This can happen because the last 'xsave' did not
898 * request that this feature be saved (unlikely)
899 * or because the "init optimization" caused it
900 * to not be saved.
901 */
902 if (!(xsave->header.xfeatures & BIT_ULL(xfeature_nr)))
903 return NULL;
904
905 return __raw_xsave_addr(xsave, xfeature_nr);
906}
907EXPORT_SYMBOL_GPL(get_xsave_addr);
908
909#ifdef CONFIG_ARCH_HAS_PKEYS
910
911/*
912 * This will go out and modify PKRU register to set the access
913 * rights for @pkey to @init_val.
914 */
915int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
916 unsigned long init_val)
917{
918 u32 old_pkru, new_pkru_bits = 0;
919 int pkey_shift;
920
921 /*
922 * This check implies XSAVE support. OSPKE only gets
923 * set if we enable XSAVE and we enable PKU in XCR0.
924 */
925 if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
926 return -EINVAL;
927
928 /*
929 * This code should only be called with valid 'pkey'
930 * values originating from in-kernel users. Complain
931 * if a bad value is observed.
932 */
933 if (WARN_ON_ONCE(pkey >= arch_max_pkey()))
934 return -EINVAL;
935
936 /* Set the bits we need in PKRU: */
937 if (init_val & PKEY_DISABLE_ACCESS)
938 new_pkru_bits |= PKRU_AD_BIT;
939 if (init_val & PKEY_DISABLE_WRITE)
940 new_pkru_bits |= PKRU_WD_BIT;
941
942 /* Shift the bits in to the correct place in PKRU for pkey: */
943 pkey_shift = pkey * PKRU_BITS_PER_PKEY;
944 new_pkru_bits <<= pkey_shift;
945
946 /* Get old PKRU and mask off any old bits in place: */
947 old_pkru = read_pkru();
948 old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift);
949
950 /* Write old part along with new part: */
951 write_pkru(old_pkru | new_pkru_bits);
952
953 return 0;
954}
955#endif /* ! CONFIG_ARCH_HAS_PKEYS */
956
957static void copy_feature(bool from_xstate, struct membuf *to, void *xstate,
958 void *init_xstate, unsigned int size)
959{
960 membuf_write(to, from_xstate ? xstate : init_xstate, size);
961}
962
963/**
964 * copy_xstate_to_uabi_buf - Copy kernel saved xstate to a UABI buffer
965 * @to: membuf descriptor
966 * @tsk: The task from which to copy the saved xstate
967 * @copy_mode: The requested copy mode
968 *
969 * Converts from kernel XSAVE or XSAVES compacted format to UABI conforming
970 * format, i.e. from the kernel internal hardware dependent storage format
971 * to the requested @mode. UABI XSTATE is always uncompacted!
972 *
973 * It supports partial copy but @to.pos always starts from zero.
974 */
975void copy_xstate_to_uabi_buf(struct membuf to, struct task_struct *tsk,
976 enum xstate_copy_mode copy_mode)
977{
978 const unsigned int off_mxcsr = offsetof(struct fxregs_state, mxcsr);
979 struct xregs_state *xsave = &tsk->thread.fpu.state.xsave;
980 struct xregs_state *xinit = &init_fpstate.xsave;
981 struct xstate_header header;
982 unsigned int zerofrom;
983 int i;
984
985 memset(&header, 0, sizeof(header));
986 header.xfeatures = xsave->header.xfeatures;
987
988 /* Mask out the feature bits depending on copy mode */
989 switch (copy_mode) {
990 case XSTATE_COPY_FP:
991 header.xfeatures &= XFEATURE_MASK_FP;
992 break;
993
994 case XSTATE_COPY_FX:
995 header.xfeatures &= XFEATURE_MASK_FP | XFEATURE_MASK_SSE;
996 break;
997
998 case XSTATE_COPY_XSAVE:
999 header.xfeatures &= xfeatures_mask_uabi();
1000 break;
1001 }
1002
1003 /* Copy FP state up to MXCSR */
1004 copy_feature(header.xfeatures & XFEATURE_MASK_FP, &to, &xsave->i387,
1005 &xinit->i387, off_mxcsr);
1006
1007 /* Copy MXCSR when SSE or YMM are set in the feature mask */
1008 copy_feature(header.xfeatures & (XFEATURE_MASK_SSE | XFEATURE_MASK_YMM),
1009 &to, &xsave->i387.mxcsr, &xinit->i387.mxcsr,
1010 MXCSR_AND_FLAGS_SIZE);
1011
1012 /* Copy the remaining FP state */
1013 copy_feature(header.xfeatures & XFEATURE_MASK_FP,
1014 &to, &xsave->i387.st_space, &xinit->i387.st_space,
1015 sizeof(xsave->i387.st_space));
1016
1017 /* Copy the SSE state - shared with YMM, but independently managed */
1018 copy_feature(header.xfeatures & XFEATURE_MASK_SSE,
1019 &to, &xsave->i387.xmm_space, &xinit->i387.xmm_space,
1020 sizeof(xsave->i387.xmm_space));
1021
1022 if (copy_mode != XSTATE_COPY_XSAVE)
1023 goto out;
1024
1025 /* Zero the padding area */
1026 membuf_zero(&to, sizeof(xsave->i387.padding));
1027
1028 /* Copy xsave->i387.sw_reserved */
1029 membuf_write(&to, xstate_fx_sw_bytes, sizeof(xsave->i387.sw_reserved));
1030
1031 /* Copy the user space relevant state of @xsave->header */
1032 membuf_write(&to, &header, sizeof(header));
1033
1034 zerofrom = offsetof(struct xregs_state, extended_state_area);
1035
1036 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
1037 /*
1038 * The ptrace buffer is in non-compacted XSAVE format.
1039 * In non-compacted format disabled features still occupy
1040 * state space, but there is no state to copy from in the
1041 * compacted init_fpstate. The gap tracking will zero this
1042 * later.
1043 */
1044 if (!(xfeatures_mask_uabi() & BIT_ULL(i)))
1045 continue;
1046
1047 /*
1048 * If there was a feature or alignment gap, zero the space
1049 * in the destination buffer.
1050 */
1051 if (zerofrom < xstate_offsets[i])
1052 membuf_zero(&to, xstate_offsets[i] - zerofrom);
1053
1054 if (i == XFEATURE_PKRU) {
1055 struct pkru_state pkru = {0};
1056 /*
1057 * PKRU is not necessarily up to date in the
1058 * thread's XSAVE buffer. Fill this part from the
1059 * per-thread storage.
1060 */
1061 pkru.pkru = tsk->thread.pkru;
1062 membuf_write(&to, &pkru, sizeof(pkru));
1063 } else {
1064 copy_feature(header.xfeatures & BIT_ULL(i), &to,
1065 __raw_xsave_addr(xsave, i),
1066 __raw_xsave_addr(xinit, i),
1067 xstate_sizes[i]);
1068 }
1069 /*
1070 * Keep track of the last copied state in the non-compacted
1071 * target buffer for gap zeroing.
1072 */
1073 zerofrom = xstate_offsets[i] + xstate_sizes[i];
1074 }
1075
1076out:
1077 if (to.left)
1078 membuf_zero(&to, to.left);
1079}
1080
1081static int copy_from_buffer(void *dst, unsigned int offset, unsigned int size,
1082 const void *kbuf, const void __user *ubuf)
1083{
1084 if (kbuf) {
1085 memcpy(dst, kbuf + offset, size);
1086 } else {
1087 if (copy_from_user(dst, ubuf + offset, size))
1088 return -EFAULT;
1089 }
1090 return 0;
1091}
1092
1093
1094static int copy_uabi_to_xstate(struct xregs_state *xsave, const void *kbuf,
1095 const void __user *ubuf)
1096{
1097 unsigned int offset, size;
1098 struct xstate_header hdr;
1099 u64 mask;
1100 int i;
1101
1102 offset = offsetof(struct xregs_state, header);
1103 if (copy_from_buffer(&hdr, offset, sizeof(hdr), kbuf, ubuf))
1104 return -EFAULT;
1105
1106 if (validate_user_xstate_header(&hdr))
1107 return -EINVAL;
1108
1109 /* Validate MXCSR when any of the related features is in use */
1110 mask = XFEATURE_MASK_FP | XFEATURE_MASK_SSE | XFEATURE_MASK_YMM;
1111 if (hdr.xfeatures & mask) {
1112 u32 mxcsr[2];
1113
1114 offset = offsetof(struct fxregs_state, mxcsr);
1115 if (copy_from_buffer(mxcsr, offset, sizeof(mxcsr), kbuf, ubuf))
1116 return -EFAULT;
1117
1118 /* Reserved bits in MXCSR must be zero. */
1119 if (mxcsr[0] & ~mxcsr_feature_mask)
1120 return -EINVAL;
1121
1122 /* SSE and YMM require MXCSR even when FP is not in use. */
1123 if (!(hdr.xfeatures & XFEATURE_MASK_FP)) {
1124 xsave->i387.mxcsr = mxcsr[0];
1125 xsave->i387.mxcsr_mask = mxcsr[1];
1126 }
1127 }
1128
1129 for (i = 0; i < XFEATURE_MAX; i++) {
1130 u64 mask = ((u64)1 << i);
1131
1132 if (hdr.xfeatures & mask) {
1133 void *dst = __raw_xsave_addr(xsave, i);
1134
1135 offset = xstate_offsets[i];
1136 size = xstate_sizes[i];
1137
1138 if (copy_from_buffer(dst, offset, size, kbuf, ubuf))
1139 return -EFAULT;
1140 }
1141 }
1142
1143 /*
1144 * The state that came in from userspace was user-state only.
1145 * Mask all the user states out of 'xfeatures':
1146 */
1147 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR_ALL;
1148
1149 /*
1150 * Add back in the features that came in from userspace:
1151 */
1152 xsave->header.xfeatures |= hdr.xfeatures;
1153
1154 return 0;
1155}
1156
1157/*
1158 * Convert from a ptrace standard-format kernel buffer to kernel XSAVE[S]
1159 * format and copy to the target thread. This is called from
1160 * xstateregs_set().
1161 */
1162int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
1163{
1164 return copy_uabi_to_xstate(xsave, kbuf, NULL);
1165}
1166
1167/*
1168 * Convert from a sigreturn standard-format user-space buffer to kernel
1169 * XSAVE[S] format and copy to the target thread. This is called from the
1170 * sigreturn() and rt_sigreturn() system calls.
1171 */
1172int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave,
1173 const void __user *ubuf)
1174{
1175 return copy_uabi_to_xstate(xsave, NULL, ubuf);
1176}
1177
1178static bool validate_xsaves_xrstors(u64 mask)
1179{
1180 u64 xchk;
1181
1182 if (WARN_ON_FPU(!cpu_feature_enabled(X86_FEATURE_XSAVES)))
1183 return false;
1184 /*
1185 * Validate that this is either a task->fpstate related component
1186 * subset or an independent one.
1187 */
1188 if (mask & xfeatures_mask_independent())
1189 xchk = ~xfeatures_mask_independent();
1190 else
1191 xchk = ~xfeatures_mask_all;
1192
1193 if (WARN_ON_ONCE(!mask || mask & xchk))
1194 return false;
1195
1196 return true;
1197}
1198
1199/**
1200 * xsaves - Save selected components to a kernel xstate buffer
1201 * @xstate: Pointer to the buffer
1202 * @mask: Feature mask to select the components to save
1203 *
1204 * The @xstate buffer must be 64 byte aligned and correctly initialized as
1205 * XSAVES does not write the full xstate header. Before first use the
1206 * buffer should be zeroed otherwise a consecutive XRSTORS from that buffer
1207 * can #GP.
1208 *
1209 * The feature mask must either be a subset of the independent features or
1210 * a subset of the task->fpstate related features.
1211 */
1212void xsaves(struct xregs_state *xstate, u64 mask)
1213{
1214 int err;
1215
1216 if (!validate_xsaves_xrstors(mask))
1217 return;
1218
1219 XSTATE_OP(XSAVES, xstate, (u32)mask, (u32)(mask >> 32), err);
1220 WARN_ON_ONCE(err);
1221}
1222
1223/**
1224 * xrstors - Restore selected components from a kernel xstate buffer
1225 * @xstate: Pointer to the buffer
1226 * @mask: Feature mask to select the components to restore
1227 *
1228 * The @xstate buffer must be 64 byte aligned and correctly initialized
1229 * otherwise XRSTORS from that buffer can #GP.
1230 *
1231 * Proper usage is to restore the state which was saved with
1232 * xsaves() into @xstate.
1233 *
1234 * The feature mask must either be a subset of the independent features or
1235 * a subset of the task->fpstate related features.
1236 */
1237void xrstors(struct xregs_state *xstate, u64 mask)
1238{
1239 int err;
1240
1241 if (!validate_xsaves_xrstors(mask))
1242 return;
1243
1244 XSTATE_OP(XRSTORS, xstate, (u32)mask, (u32)(mask >> 32), err);
1245 WARN_ON_ONCE(err);
1246}
1247
1248#ifdef CONFIG_PROC_PID_ARCH_STATUS
1249/*
1250 * Report the amount of time elapsed in millisecond since last AVX512
1251 * use in the task.
1252 */
1253static void avx512_status(struct seq_file *m, struct task_struct *task)
1254{
1255 unsigned long timestamp = READ_ONCE(task->thread.fpu.avx512_timestamp);
1256 long delta;
1257
1258 if (!timestamp) {
1259 /*
1260 * Report -1 if no AVX512 usage
1261 */
1262 delta = -1;
1263 } else {
1264 delta = (long)(jiffies - timestamp);
1265 /*
1266 * Cap to LONG_MAX if time difference > LONG_MAX
1267 */
1268 if (delta < 0)
1269 delta = LONG_MAX;
1270 delta = jiffies_to_msecs(delta);
1271 }
1272
1273 seq_put_decimal_ll(m, "AVX512_elapsed_ms:\t", delta);
1274 seq_putc(m, '\n');
1275}
1276
1277/*
1278 * Report architecture specific information
1279 */
1280int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns,
1281 struct pid *pid, struct task_struct *task)
1282{
1283 /*
1284 * Report AVX512 state if the processor and build option supported.
1285 */
1286 if (cpu_feature_enabled(X86_FEATURE_AVX512F))
1287 avx512_status(m, task);
1288
1289 return 0;
1290}
1291#endif /* CONFIG_PROC_PID_ARCH_STATUS */