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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SMP related functions
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Denis Joseph Barrow,
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
8 * Heiko Carstens <heiko.carstens@de.ibm.com>,
9 *
10 * based on other smp stuff by
11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
12 * (c) 1998 Ingo Molnar
13 *
14 * The code outside of smp.c uses logical cpu numbers, only smp.c does
15 * the translation of logical to physical cpu ids. All new code that
16 * operates on physical cpu numbers needs to go into smp.c.
17 */
18
19#define KMSG_COMPONENT "cpu"
20#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22#include <linux/workqueue.h>
23#include <linux/bootmem.h>
24#include <linux/export.h>
25#include <linux/init.h>
26#include <linux/mm.h>
27#include <linux/err.h>
28#include <linux/spinlock.h>
29#include <linux/kernel_stat.h>
30#include <linux/delay.h>
31#include <linux/interrupt.h>
32#include <linux/irqflags.h>
33#include <linux/cpu.h>
34#include <linux/slab.h>
35#include <linux/sched/hotplug.h>
36#include <linux/sched/task_stack.h>
37#include <linux/crash_dump.h>
38#include <linux/memblock.h>
39#include <linux/kprobes.h>
40#include <asm/asm-offsets.h>
41#include <asm/diag.h>
42#include <asm/switch_to.h>
43#include <asm/facility.h>
44#include <asm/ipl.h>
45#include <asm/setup.h>
46#include <asm/irq.h>
47#include <asm/tlbflush.h>
48#include <asm/vtimer.h>
49#include <asm/lowcore.h>
50#include <asm/sclp.h>
51#include <asm/vdso.h>
52#include <asm/debug.h>
53#include <asm/os_info.h>
54#include <asm/sigp.h>
55#include <asm/idle.h>
56#include <asm/nmi.h>
57#include <asm/topology.h>
58#include "entry.h"
59
60enum {
61 ec_schedule = 0,
62 ec_call_function_single,
63 ec_stop_cpu,
64};
65
66enum {
67 CPU_STATE_STANDBY,
68 CPU_STATE_CONFIGURED,
69};
70
71static DEFINE_PER_CPU(struct cpu *, cpu_device);
72
73struct pcpu {
74 struct lowcore *lowcore; /* lowcore page(s) for the cpu */
75 unsigned long ec_mask; /* bit mask for ec_xxx functions */
76 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
77 signed char state; /* physical cpu state */
78 signed char polarization; /* physical polarization */
79 u16 address; /* physical cpu address */
80};
81
82static u8 boot_core_type;
83static struct pcpu pcpu_devices[NR_CPUS];
84
85unsigned int smp_cpu_mt_shift;
86EXPORT_SYMBOL(smp_cpu_mt_shift);
87
88unsigned int smp_cpu_mtid;
89EXPORT_SYMBOL(smp_cpu_mtid);
90
91#ifdef CONFIG_CRASH_DUMP
92__vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
93#endif
94
95static unsigned int smp_max_threads __initdata = -1U;
96
97static int __init early_nosmt(char *s)
98{
99 smp_max_threads = 1;
100 return 0;
101}
102early_param("nosmt", early_nosmt);
103
104static int __init early_smt(char *s)
105{
106 get_option(&s, &smp_max_threads);
107 return 0;
108}
109early_param("smt", early_smt);
110
111/*
112 * The smp_cpu_state_mutex must be held when changing the state or polarization
113 * member of a pcpu data structure within the pcpu_devices arreay.
114 */
115DEFINE_MUTEX(smp_cpu_state_mutex);
116
117/*
118 * Signal processor helper functions.
119 */
120static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
121{
122 int cc;
123
124 while (1) {
125 cc = __pcpu_sigp(addr, order, parm, NULL);
126 if (cc != SIGP_CC_BUSY)
127 return cc;
128 cpu_relax();
129 }
130}
131
132static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
133{
134 int cc, retry;
135
136 for (retry = 0; ; retry++) {
137 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
138 if (cc != SIGP_CC_BUSY)
139 break;
140 if (retry >= 3)
141 udelay(10);
142 }
143 return cc;
144}
145
146static inline int pcpu_stopped(struct pcpu *pcpu)
147{
148 u32 uninitialized_var(status);
149
150 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
151 0, &status) != SIGP_CC_STATUS_STORED)
152 return 0;
153 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
154}
155
156static inline int pcpu_running(struct pcpu *pcpu)
157{
158 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
159 0, NULL) != SIGP_CC_STATUS_STORED)
160 return 1;
161 /* Status stored condition code is equivalent to cpu not running. */
162 return 0;
163}
164
165/*
166 * Find struct pcpu by cpu address.
167 */
168static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
169{
170 int cpu;
171
172 for_each_cpu(cpu, mask)
173 if (pcpu_devices[cpu].address == address)
174 return pcpu_devices + cpu;
175 return NULL;
176}
177
178static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
179{
180 int order;
181
182 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
183 return;
184 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
185 pcpu->ec_clk = get_tod_clock_fast();
186 pcpu_sigp_retry(pcpu, order, 0);
187}
188
189#define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
190#define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
191
192static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
193{
194 unsigned long async_stack, panic_stack;
195 struct lowcore *lc;
196
197 if (pcpu != &pcpu_devices[0]) {
198 pcpu->lowcore = (struct lowcore *)
199 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
200 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
201 panic_stack = __get_free_page(GFP_KERNEL);
202 if (!pcpu->lowcore || !panic_stack || !async_stack)
203 goto out;
204 } else {
205 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
206 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
207 }
208 lc = pcpu->lowcore;
209 memcpy(lc, &S390_lowcore, 512);
210 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
211 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
212 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
213 lc->cpu_nr = cpu;
214 lc->spinlock_lockval = arch_spin_lockval(cpu);
215 lc->spinlock_index = 0;
216 lc->br_r1_trampoline = 0x07f1; /* br %r1 */
217 if (nmi_alloc_per_cpu(lc))
218 goto out;
219 if (vdso_alloc_per_cpu(lc))
220 goto out_mcesa;
221 lowcore_ptr[cpu] = lc;
222 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
223 return 0;
224
225out_mcesa:
226 nmi_free_per_cpu(lc);
227out:
228 if (pcpu != &pcpu_devices[0]) {
229 free_page(panic_stack);
230 free_pages(async_stack, ASYNC_ORDER);
231 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
232 }
233 return -ENOMEM;
234}
235
236#ifdef CONFIG_HOTPLUG_CPU
237
238static void pcpu_free_lowcore(struct pcpu *pcpu)
239{
240 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
241 lowcore_ptr[pcpu - pcpu_devices] = NULL;
242 vdso_free_per_cpu(pcpu->lowcore);
243 nmi_free_per_cpu(pcpu->lowcore);
244 if (pcpu == &pcpu_devices[0])
245 return;
246 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
247 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
248 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
249}
250
251#endif /* CONFIG_HOTPLUG_CPU */
252
253static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
254{
255 struct lowcore *lc = pcpu->lowcore;
256
257 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
258 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
259 lc->cpu_nr = cpu;
260 lc->spinlock_lockval = arch_spin_lockval(cpu);
261 lc->spinlock_index = 0;
262 lc->percpu_offset = __per_cpu_offset[cpu];
263 lc->kernel_asce = S390_lowcore.kernel_asce;
264 lc->machine_flags = S390_lowcore.machine_flags;
265 lc->user_timer = lc->system_timer = lc->steal_timer = 0;
266 __ctl_store(lc->cregs_save_area, 0, 15);
267 save_access_regs((unsigned int *) lc->access_regs_save_area);
268 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
269 sizeof(lc->stfle_fac_list));
270 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
271 sizeof(lc->alt_stfle_fac_list));
272 arch_spin_lock_setup(cpu);
273}
274
275static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
276{
277 struct lowcore *lc = pcpu->lowcore;
278
279 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
280 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
281 lc->current_task = (unsigned long) tsk;
282 lc->lpp = LPP_MAGIC;
283 lc->current_pid = tsk->pid;
284 lc->user_timer = tsk->thread.user_timer;
285 lc->guest_timer = tsk->thread.guest_timer;
286 lc->system_timer = tsk->thread.system_timer;
287 lc->hardirq_timer = tsk->thread.hardirq_timer;
288 lc->softirq_timer = tsk->thread.softirq_timer;
289 lc->steal_timer = 0;
290}
291
292static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
293{
294 struct lowcore *lc = pcpu->lowcore;
295
296 lc->restart_stack = lc->kernel_stack;
297 lc->restart_fn = (unsigned long) func;
298 lc->restart_data = (unsigned long) data;
299 lc->restart_source = -1UL;
300 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
301}
302
303/*
304 * Call function via PSW restart on pcpu and stop the current cpu.
305 */
306static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
307 void *data, unsigned long stack)
308{
309 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
310 unsigned long source_cpu = stap();
311
312 __load_psw_mask(PSW_KERNEL_BITS);
313 if (pcpu->address == source_cpu)
314 func(data); /* should not return */
315 /* Stop target cpu (if func returns this stops the current cpu). */
316 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
317 /* Restart func on the target cpu and stop the current cpu. */
318 mem_assign_absolute(lc->restart_stack, stack);
319 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
320 mem_assign_absolute(lc->restart_data, (unsigned long) data);
321 mem_assign_absolute(lc->restart_source, source_cpu);
322 __bpon();
323 asm volatile(
324 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
325 " brc 2,0b # busy, try again\n"
326 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
327 " brc 2,1b # busy, try again\n"
328 : : "d" (pcpu->address), "d" (source_cpu),
329 "K" (SIGP_RESTART), "K" (SIGP_STOP)
330 : "0", "1", "cc");
331 for (;;) ;
332}
333
334/*
335 * Enable additional logical cpus for multi-threading.
336 */
337static int pcpu_set_smt(unsigned int mtid)
338{
339 int cc;
340
341 if (smp_cpu_mtid == mtid)
342 return 0;
343 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
344 if (cc == 0) {
345 smp_cpu_mtid = mtid;
346 smp_cpu_mt_shift = 0;
347 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
348 smp_cpu_mt_shift++;
349 pcpu_devices[0].address = stap();
350 }
351 return cc;
352}
353
354/*
355 * Call function on an online CPU.
356 */
357void smp_call_online_cpu(void (*func)(void *), void *data)
358{
359 struct pcpu *pcpu;
360
361 /* Use the current cpu if it is online. */
362 pcpu = pcpu_find_address(cpu_online_mask, stap());
363 if (!pcpu)
364 /* Use the first online cpu. */
365 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
366 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
367}
368
369/*
370 * Call function on the ipl CPU.
371 */
372void smp_call_ipl_cpu(void (*func)(void *), void *data)
373{
374 pcpu_delegate(&pcpu_devices[0], func, data,
375 pcpu_devices->lowcore->panic_stack -
376 PANIC_FRAME_OFFSET + PAGE_SIZE);
377}
378
379int smp_find_processor_id(u16 address)
380{
381 int cpu;
382
383 for_each_present_cpu(cpu)
384 if (pcpu_devices[cpu].address == address)
385 return cpu;
386 return -1;
387}
388
389bool arch_vcpu_is_preempted(int cpu)
390{
391 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
392 return false;
393 if (pcpu_running(pcpu_devices + cpu))
394 return false;
395 return true;
396}
397EXPORT_SYMBOL(arch_vcpu_is_preempted);
398
399void smp_yield_cpu(int cpu)
400{
401 if (MACHINE_HAS_DIAG9C) {
402 diag_stat_inc_norecursion(DIAG_STAT_X09C);
403 asm volatile("diag %0,0,0x9c"
404 : : "d" (pcpu_devices[cpu].address));
405 } else if (MACHINE_HAS_DIAG44) {
406 diag_stat_inc_norecursion(DIAG_STAT_X044);
407 asm volatile("diag 0,0,0x44");
408 }
409}
410
411/*
412 * Send cpus emergency shutdown signal. This gives the cpus the
413 * opportunity to complete outstanding interrupts.
414 */
415void notrace smp_emergency_stop(void)
416{
417 cpumask_t cpumask;
418 u64 end;
419 int cpu;
420
421 cpumask_copy(&cpumask, cpu_online_mask);
422 cpumask_clear_cpu(smp_processor_id(), &cpumask);
423
424 end = get_tod_clock() + (1000000UL << 12);
425 for_each_cpu(cpu, &cpumask) {
426 struct pcpu *pcpu = pcpu_devices + cpu;
427 set_bit(ec_stop_cpu, &pcpu->ec_mask);
428 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
429 0, NULL) == SIGP_CC_BUSY &&
430 get_tod_clock() < end)
431 cpu_relax();
432 }
433 while (get_tod_clock() < end) {
434 for_each_cpu(cpu, &cpumask)
435 if (pcpu_stopped(pcpu_devices + cpu))
436 cpumask_clear_cpu(cpu, &cpumask);
437 if (cpumask_empty(&cpumask))
438 break;
439 cpu_relax();
440 }
441}
442NOKPROBE_SYMBOL(smp_emergency_stop);
443
444/*
445 * Stop all cpus but the current one.
446 */
447void smp_send_stop(void)
448{
449 int cpu;
450
451 /* Disable all interrupts/machine checks */
452 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
453 trace_hardirqs_off();
454
455 debug_set_critical();
456
457 if (oops_in_progress)
458 smp_emergency_stop();
459
460 /* stop all processors */
461 for_each_online_cpu(cpu) {
462 if (cpu == smp_processor_id())
463 continue;
464 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
465 while (!pcpu_stopped(pcpu_devices + cpu))
466 cpu_relax();
467 }
468}
469
470/*
471 * This is the main routine where commands issued by other
472 * cpus are handled.
473 */
474static void smp_handle_ext_call(void)
475{
476 unsigned long bits;
477
478 /* handle bit signal external calls */
479 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
480 if (test_bit(ec_stop_cpu, &bits))
481 smp_stop_cpu();
482 if (test_bit(ec_schedule, &bits))
483 scheduler_ipi();
484 if (test_bit(ec_call_function_single, &bits))
485 generic_smp_call_function_single_interrupt();
486}
487
488static void do_ext_call_interrupt(struct ext_code ext_code,
489 unsigned int param32, unsigned long param64)
490{
491 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
492 smp_handle_ext_call();
493}
494
495void arch_send_call_function_ipi_mask(const struct cpumask *mask)
496{
497 int cpu;
498
499 for_each_cpu(cpu, mask)
500 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
501}
502
503void arch_send_call_function_single_ipi(int cpu)
504{
505 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
506}
507
508/*
509 * this function sends a 'reschedule' IPI to another CPU.
510 * it goes straight through and wastes no time serializing
511 * anything. Worst case is that we lose a reschedule ...
512 */
513void smp_send_reschedule(int cpu)
514{
515 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
516}
517
518/*
519 * parameter area for the set/clear control bit callbacks
520 */
521struct ec_creg_mask_parms {
522 unsigned long orval;
523 unsigned long andval;
524 int cr;
525};
526
527/*
528 * callback for setting/clearing control bits
529 */
530static void smp_ctl_bit_callback(void *info)
531{
532 struct ec_creg_mask_parms *pp = info;
533 unsigned long cregs[16];
534
535 __ctl_store(cregs, 0, 15);
536 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
537 __ctl_load(cregs, 0, 15);
538}
539
540/*
541 * Set a bit in a control register of all cpus
542 */
543void smp_ctl_set_bit(int cr, int bit)
544{
545 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
546
547 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
548}
549EXPORT_SYMBOL(smp_ctl_set_bit);
550
551/*
552 * Clear a bit in a control register of all cpus
553 */
554void smp_ctl_clear_bit(int cr, int bit)
555{
556 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
557
558 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
559}
560EXPORT_SYMBOL(smp_ctl_clear_bit);
561
562#ifdef CONFIG_CRASH_DUMP
563
564int smp_store_status(int cpu)
565{
566 struct pcpu *pcpu = pcpu_devices + cpu;
567 unsigned long pa;
568
569 pa = __pa(&pcpu->lowcore->floating_pt_save_area);
570 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
571 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
572 return -EIO;
573 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
574 return 0;
575 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK);
576 if (MACHINE_HAS_GS)
577 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK;
578 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
579 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
580 return -EIO;
581 return 0;
582}
583
584/*
585 * Collect CPU state of the previous, crashed system.
586 * There are four cases:
587 * 1) standard zfcp dump
588 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
589 * The state for all CPUs except the boot CPU needs to be collected
590 * with sigp stop-and-store-status. The boot CPU state is located in
591 * the absolute lowcore of the memory stored in the HSA. The zcore code
592 * will copy the boot CPU state from the HSA.
593 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
594 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
595 * The state for all CPUs except the boot CPU needs to be collected
596 * with sigp stop-and-store-status. The firmware or the boot-loader
597 * stored the registers of the boot CPU in the absolute lowcore in the
598 * memory of the old system.
599 * 3) kdump and the old kernel did not store the CPU state,
600 * or stand-alone kdump for DASD
601 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
602 * The state for all CPUs except the boot CPU needs to be collected
603 * with sigp stop-and-store-status. The kexec code or the boot-loader
604 * stored the registers of the boot CPU in the memory of the old system.
605 * 4) kdump and the old kernel stored the CPU state
606 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
607 * This case does not exist for s390 anymore, setup_arch explicitly
608 * deactivates the elfcorehdr= kernel parameter
609 */
610static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
611 bool is_boot_cpu, unsigned long page)
612{
613 __vector128 *vxrs = (__vector128 *) page;
614
615 if (is_boot_cpu)
616 vxrs = boot_cpu_vector_save_area;
617 else
618 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
619 save_area_add_vxrs(sa, vxrs);
620}
621
622static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
623 bool is_boot_cpu, unsigned long page)
624{
625 void *regs = (void *) page;
626
627 if (is_boot_cpu)
628 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
629 else
630 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
631 save_area_add_regs(sa, regs);
632}
633
634void __init smp_save_dump_cpus(void)
635{
636 int addr, boot_cpu_addr, max_cpu_addr;
637 struct save_area *sa;
638 unsigned long page;
639 bool is_boot_cpu;
640
641 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
642 /* No previous system present, normal boot. */
643 return;
644 /* Allocate a page as dumping area for the store status sigps */
645 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
646 /* Set multi-threading state to the previous system. */
647 pcpu_set_smt(sclp.mtid_prev);
648 boot_cpu_addr = stap();
649 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
650 for (addr = 0; addr <= max_cpu_addr; addr++) {
651 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
652 SIGP_CC_NOT_OPERATIONAL)
653 continue;
654 is_boot_cpu = (addr == boot_cpu_addr);
655 /* Allocate save area */
656 sa = save_area_alloc(is_boot_cpu);
657 if (!sa)
658 panic("could not allocate memory for save area\n");
659 if (MACHINE_HAS_VX)
660 /* Get the vector registers */
661 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
662 /*
663 * For a zfcp dump OLDMEM_BASE == NULL and the registers
664 * of the boot CPU are stored in the HSA. To retrieve
665 * these registers an SCLP request is required which is
666 * done by drivers/s390/char/zcore.c:init_cpu_info()
667 */
668 if (!is_boot_cpu || OLDMEM_BASE)
669 /* Get the CPU registers */
670 smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
671 }
672 memblock_free(page, PAGE_SIZE);
673 diag308_reset();
674 pcpu_set_smt(0);
675}
676#endif /* CONFIG_CRASH_DUMP */
677
678void smp_cpu_set_polarization(int cpu, int val)
679{
680 pcpu_devices[cpu].polarization = val;
681}
682
683int smp_cpu_get_polarization(int cpu)
684{
685 return pcpu_devices[cpu].polarization;
686}
687
688static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
689{
690 static int use_sigp_detection;
691 int address;
692
693 if (use_sigp_detection || sclp_get_core_info(info, early)) {
694 use_sigp_detection = 1;
695 for (address = 0;
696 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
697 address += (1U << smp_cpu_mt_shift)) {
698 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
699 SIGP_CC_NOT_OPERATIONAL)
700 continue;
701 info->core[info->configured].core_id =
702 address >> smp_cpu_mt_shift;
703 info->configured++;
704 }
705 info->combined = info->configured;
706 }
707}
708
709static int smp_add_present_cpu(int cpu);
710
711static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
712{
713 struct pcpu *pcpu;
714 cpumask_t avail;
715 int cpu, nr, i, j;
716 u16 address;
717
718 nr = 0;
719 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
720 cpu = cpumask_first(&avail);
721 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
722 if (sclp.has_core_type && info->core[i].type != boot_core_type)
723 continue;
724 address = info->core[i].core_id << smp_cpu_mt_shift;
725 for (j = 0; j <= smp_cpu_mtid; j++) {
726 if (pcpu_find_address(cpu_present_mask, address + j))
727 continue;
728 pcpu = pcpu_devices + cpu;
729 pcpu->address = address + j;
730 pcpu->state =
731 (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
732 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
733 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
734 set_cpu_present(cpu, true);
735 if (sysfs_add && smp_add_present_cpu(cpu) != 0)
736 set_cpu_present(cpu, false);
737 else
738 nr++;
739 cpu = cpumask_next(cpu, &avail);
740 if (cpu >= nr_cpu_ids)
741 break;
742 }
743 }
744 return nr;
745}
746
747void __init smp_detect_cpus(void)
748{
749 unsigned int cpu, mtid, c_cpus, s_cpus;
750 struct sclp_core_info *info;
751 u16 address;
752
753 /* Get CPU information */
754 info = memblock_virt_alloc(sizeof(*info), 8);
755 smp_get_core_info(info, 1);
756 /* Find boot CPU type */
757 if (sclp.has_core_type) {
758 address = stap();
759 for (cpu = 0; cpu < info->combined; cpu++)
760 if (info->core[cpu].core_id == address) {
761 /* The boot cpu dictates the cpu type. */
762 boot_core_type = info->core[cpu].type;
763 break;
764 }
765 if (cpu >= info->combined)
766 panic("Could not find boot CPU type");
767 }
768
769 /* Set multi-threading state for the current system */
770 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
771 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
772 pcpu_set_smt(mtid);
773
774 /* Print number of CPUs */
775 c_cpus = s_cpus = 0;
776 for (cpu = 0; cpu < info->combined; cpu++) {
777 if (sclp.has_core_type &&
778 info->core[cpu].type != boot_core_type)
779 continue;
780 if (cpu < info->configured)
781 c_cpus += smp_cpu_mtid + 1;
782 else
783 s_cpus += smp_cpu_mtid + 1;
784 }
785 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
786
787 /* Add CPUs present at boot */
788 get_online_cpus();
789 __smp_rescan_cpus(info, 0);
790 put_online_cpus();
791 memblock_free_early((unsigned long)info, sizeof(*info));
792}
793
794/*
795 * Activate a secondary processor.
796 */
797static void smp_start_secondary(void *cpuvoid)
798{
799 int cpu = smp_processor_id();
800
801 S390_lowcore.last_update_clock = get_tod_clock();
802 S390_lowcore.restart_stack = (unsigned long) restart_stack;
803 S390_lowcore.restart_fn = (unsigned long) do_restart;
804 S390_lowcore.restart_data = 0;
805 S390_lowcore.restart_source = -1UL;
806 restore_access_regs(S390_lowcore.access_regs_save_area);
807 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
808 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
809 cpu_init();
810 preempt_disable();
811 init_cpu_timer();
812 vtime_init();
813 pfault_init();
814 notify_cpu_starting(cpu);
815 if (topology_cpu_dedicated(cpu))
816 set_cpu_flag(CIF_DEDICATED_CPU);
817 else
818 clear_cpu_flag(CIF_DEDICATED_CPU);
819 set_cpu_online(cpu, true);
820 inc_irq_stat(CPU_RST);
821 local_irq_enable();
822 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
823}
824
825/* Upping and downing of CPUs */
826int __cpu_up(unsigned int cpu, struct task_struct *tidle)
827{
828 struct pcpu *pcpu;
829 int base, i, rc;
830
831 pcpu = pcpu_devices + cpu;
832 if (pcpu->state != CPU_STATE_CONFIGURED)
833 return -EIO;
834 base = smp_get_base_cpu(cpu);
835 for (i = 0; i <= smp_cpu_mtid; i++) {
836 if (base + i < nr_cpu_ids)
837 if (cpu_online(base + i))
838 break;
839 }
840 /*
841 * If this is the first CPU of the core to get online
842 * do an initial CPU reset.
843 */
844 if (i > smp_cpu_mtid &&
845 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
846 SIGP_CC_ORDER_CODE_ACCEPTED)
847 return -EIO;
848
849 rc = pcpu_alloc_lowcore(pcpu, cpu);
850 if (rc)
851 return rc;
852 pcpu_prepare_secondary(pcpu, cpu);
853 pcpu_attach_task(pcpu, tidle);
854 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
855 /* Wait until cpu puts itself in the online & active maps */
856 while (!cpu_online(cpu))
857 cpu_relax();
858 return 0;
859}
860
861static unsigned int setup_possible_cpus __initdata;
862
863static int __init _setup_possible_cpus(char *s)
864{
865 get_option(&s, &setup_possible_cpus);
866 return 0;
867}
868early_param("possible_cpus", _setup_possible_cpus);
869
870#ifdef CONFIG_HOTPLUG_CPU
871
872int __cpu_disable(void)
873{
874 unsigned long cregs[16];
875
876 /* Handle possible pending IPIs */
877 smp_handle_ext_call();
878 set_cpu_online(smp_processor_id(), false);
879 /* Disable pseudo page faults on this cpu. */
880 pfault_fini();
881 /* Disable interrupt sources via control register. */
882 __ctl_store(cregs, 0, 15);
883 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
884 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
885 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
886 __ctl_load(cregs, 0, 15);
887 clear_cpu_flag(CIF_NOHZ_DELAY);
888 return 0;
889}
890
891void __cpu_die(unsigned int cpu)
892{
893 struct pcpu *pcpu;
894
895 /* Wait until target cpu is down */
896 pcpu = pcpu_devices + cpu;
897 while (!pcpu_stopped(pcpu))
898 cpu_relax();
899 pcpu_free_lowcore(pcpu);
900 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
901 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
902}
903
904void __noreturn cpu_die(void)
905{
906 idle_task_exit();
907 __bpon();
908 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
909 for (;;) ;
910}
911
912#endif /* CONFIG_HOTPLUG_CPU */
913
914void __init smp_fill_possible_mask(void)
915{
916 unsigned int possible, sclp_max, cpu;
917
918 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
919 sclp_max = min(smp_max_threads, sclp_max);
920 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
921 possible = setup_possible_cpus ?: nr_cpu_ids;
922 possible = min(possible, sclp_max);
923 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
924 set_cpu_possible(cpu, true);
925}
926
927void __init smp_prepare_cpus(unsigned int max_cpus)
928{
929 /* request the 0x1201 emergency signal external interrupt */
930 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
931 panic("Couldn't request external interrupt 0x1201");
932 /* request the 0x1202 external call external interrupt */
933 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
934 panic("Couldn't request external interrupt 0x1202");
935}
936
937void __init smp_prepare_boot_cpu(void)
938{
939 struct pcpu *pcpu = pcpu_devices;
940
941 WARN_ON(!cpu_present(0) || !cpu_online(0));
942 pcpu->state = CPU_STATE_CONFIGURED;
943 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
944 S390_lowcore.percpu_offset = __per_cpu_offset[0];
945 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
946}
947
948void __init smp_cpus_done(unsigned int max_cpus)
949{
950}
951
952void __init smp_setup_processor_id(void)
953{
954 pcpu_devices[0].address = stap();
955 S390_lowcore.cpu_nr = 0;
956 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
957 S390_lowcore.spinlock_index = 0;
958}
959
960/*
961 * the frequency of the profiling timer can be changed
962 * by writing a multiplier value into /proc/profile.
963 *
964 * usually you want to run this on all CPUs ;)
965 */
966int setup_profiling_timer(unsigned int multiplier)
967{
968 return 0;
969}
970
971#ifdef CONFIG_HOTPLUG_CPU
972static ssize_t cpu_configure_show(struct device *dev,
973 struct device_attribute *attr, char *buf)
974{
975 ssize_t count;
976
977 mutex_lock(&smp_cpu_state_mutex);
978 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
979 mutex_unlock(&smp_cpu_state_mutex);
980 return count;
981}
982
983static ssize_t cpu_configure_store(struct device *dev,
984 struct device_attribute *attr,
985 const char *buf, size_t count)
986{
987 struct pcpu *pcpu;
988 int cpu, val, rc, i;
989 char delim;
990
991 if (sscanf(buf, "%d %c", &val, &delim) != 1)
992 return -EINVAL;
993 if (val != 0 && val != 1)
994 return -EINVAL;
995 get_online_cpus();
996 mutex_lock(&smp_cpu_state_mutex);
997 rc = -EBUSY;
998 /* disallow configuration changes of online cpus and cpu 0 */
999 cpu = dev->id;
1000 cpu = smp_get_base_cpu(cpu);
1001 if (cpu == 0)
1002 goto out;
1003 for (i = 0; i <= smp_cpu_mtid; i++)
1004 if (cpu_online(cpu + i))
1005 goto out;
1006 pcpu = pcpu_devices + cpu;
1007 rc = 0;
1008 switch (val) {
1009 case 0:
1010 if (pcpu->state != CPU_STATE_CONFIGURED)
1011 break;
1012 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1013 if (rc)
1014 break;
1015 for (i = 0; i <= smp_cpu_mtid; i++) {
1016 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1017 continue;
1018 pcpu[i].state = CPU_STATE_STANDBY;
1019 smp_cpu_set_polarization(cpu + i,
1020 POLARIZATION_UNKNOWN);
1021 }
1022 topology_expect_change();
1023 break;
1024 case 1:
1025 if (pcpu->state != CPU_STATE_STANDBY)
1026 break;
1027 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1028 if (rc)
1029 break;
1030 for (i = 0; i <= smp_cpu_mtid; i++) {
1031 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1032 continue;
1033 pcpu[i].state = CPU_STATE_CONFIGURED;
1034 smp_cpu_set_polarization(cpu + i,
1035 POLARIZATION_UNKNOWN);
1036 }
1037 topology_expect_change();
1038 break;
1039 default:
1040 break;
1041 }
1042out:
1043 mutex_unlock(&smp_cpu_state_mutex);
1044 put_online_cpus();
1045 return rc ? rc : count;
1046}
1047static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1048#endif /* CONFIG_HOTPLUG_CPU */
1049
1050static ssize_t show_cpu_address(struct device *dev,
1051 struct device_attribute *attr, char *buf)
1052{
1053 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1054}
1055static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1056
1057static struct attribute *cpu_common_attrs[] = {
1058#ifdef CONFIG_HOTPLUG_CPU
1059 &dev_attr_configure.attr,
1060#endif
1061 &dev_attr_address.attr,
1062 NULL,
1063};
1064
1065static struct attribute_group cpu_common_attr_group = {
1066 .attrs = cpu_common_attrs,
1067};
1068
1069static struct attribute *cpu_online_attrs[] = {
1070 &dev_attr_idle_count.attr,
1071 &dev_attr_idle_time_us.attr,
1072 NULL,
1073};
1074
1075static struct attribute_group cpu_online_attr_group = {
1076 .attrs = cpu_online_attrs,
1077};
1078
1079static int smp_cpu_online(unsigned int cpu)
1080{
1081 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1082
1083 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1084}
1085static int smp_cpu_pre_down(unsigned int cpu)
1086{
1087 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1088
1089 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1090 return 0;
1091}
1092
1093static int smp_add_present_cpu(int cpu)
1094{
1095 struct device *s;
1096 struct cpu *c;
1097 int rc;
1098
1099 c = kzalloc(sizeof(*c), GFP_KERNEL);
1100 if (!c)
1101 return -ENOMEM;
1102 per_cpu(cpu_device, cpu) = c;
1103 s = &c->dev;
1104 c->hotpluggable = 1;
1105 rc = register_cpu(c, cpu);
1106 if (rc)
1107 goto out;
1108 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1109 if (rc)
1110 goto out_cpu;
1111 rc = topology_cpu_init(c);
1112 if (rc)
1113 goto out_topology;
1114 return 0;
1115
1116out_topology:
1117 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1118out_cpu:
1119#ifdef CONFIG_HOTPLUG_CPU
1120 unregister_cpu(c);
1121#endif
1122out:
1123 return rc;
1124}
1125
1126#ifdef CONFIG_HOTPLUG_CPU
1127
1128int __ref smp_rescan_cpus(void)
1129{
1130 struct sclp_core_info *info;
1131 int nr;
1132
1133 info = kzalloc(sizeof(*info), GFP_KERNEL);
1134 if (!info)
1135 return -ENOMEM;
1136 smp_get_core_info(info, 0);
1137 get_online_cpus();
1138 mutex_lock(&smp_cpu_state_mutex);
1139 nr = __smp_rescan_cpus(info, 1);
1140 mutex_unlock(&smp_cpu_state_mutex);
1141 put_online_cpus();
1142 kfree(info);
1143 if (nr)
1144 topology_schedule_update();
1145 return 0;
1146}
1147
1148static ssize_t __ref rescan_store(struct device *dev,
1149 struct device_attribute *attr,
1150 const char *buf,
1151 size_t count)
1152{
1153 int rc;
1154
1155 rc = smp_rescan_cpus();
1156 return rc ? rc : count;
1157}
1158static DEVICE_ATTR_WO(rescan);
1159#endif /* CONFIG_HOTPLUG_CPU */
1160
1161static int __init s390_smp_init(void)
1162{
1163 int cpu, rc = 0;
1164
1165#ifdef CONFIG_HOTPLUG_CPU
1166 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1167 if (rc)
1168 return rc;
1169#endif
1170 for_each_present_cpu(cpu) {
1171 rc = smp_add_present_cpu(cpu);
1172 if (rc)
1173 goto out;
1174 }
1175
1176 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1177 smp_cpu_online, smp_cpu_pre_down);
1178 rc = rc <= 0 ? rc : 0;
1179out:
1180 return rc;
1181}
1182subsys_initcall(s390_smp_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SMP related functions
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Denis Joseph Barrow,
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
8 * Heiko Carstens <heiko.carstens@de.ibm.com>,
9 *
10 * based on other smp stuff by
11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
12 * (c) 1998 Ingo Molnar
13 *
14 * The code outside of smp.c uses logical cpu numbers, only smp.c does
15 * the translation of logical to physical cpu ids. All new code that
16 * operates on physical cpu numbers needs to go into smp.c.
17 */
18
19#define KMSG_COMPONENT "cpu"
20#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22#include <linux/workqueue.h>
23#include <linux/memblock.h>
24#include <linux/export.h>
25#include <linux/init.h>
26#include <linux/mm.h>
27#include <linux/err.h>
28#include <linux/spinlock.h>
29#include <linux/kernel_stat.h>
30#include <linux/delay.h>
31#include <linux/interrupt.h>
32#include <linux/irqflags.h>
33#include <linux/irq_work.h>
34#include <linux/cpu.h>
35#include <linux/slab.h>
36#include <linux/sched/hotplug.h>
37#include <linux/sched/task_stack.h>
38#include <linux/crash_dump.h>
39#include <linux/kprobes.h>
40#include <asm/asm-offsets.h>
41#include <asm/diag.h>
42#include <asm/switch_to.h>
43#include <asm/facility.h>
44#include <asm/ipl.h>
45#include <asm/setup.h>
46#include <asm/irq.h>
47#include <asm/tlbflush.h>
48#include <asm/vtimer.h>
49#include <asm/lowcore.h>
50#include <asm/sclp.h>
51#include <asm/debug.h>
52#include <asm/os_info.h>
53#include <asm/sigp.h>
54#include <asm/idle.h>
55#include <asm/nmi.h>
56#include <asm/stacktrace.h>
57#include <asm/topology.h>
58#include <asm/vdso.h>
59#include "entry.h"
60
61enum {
62 ec_schedule = 0,
63 ec_call_function_single,
64 ec_stop_cpu,
65 ec_mcck_pending,
66 ec_irq_work,
67};
68
69enum {
70 CPU_STATE_STANDBY,
71 CPU_STATE_CONFIGURED,
72};
73
74static DEFINE_PER_CPU(struct cpu *, cpu_device);
75
76struct pcpu {
77 unsigned long ec_mask; /* bit mask for ec_xxx functions */
78 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
79 signed char state; /* physical cpu state */
80 signed char polarization; /* physical polarization */
81 u16 address; /* physical cpu address */
82};
83
84static u8 boot_core_type;
85static struct pcpu pcpu_devices[NR_CPUS];
86
87unsigned int smp_cpu_mt_shift;
88EXPORT_SYMBOL(smp_cpu_mt_shift);
89
90unsigned int smp_cpu_mtid;
91EXPORT_SYMBOL(smp_cpu_mtid);
92
93#ifdef CONFIG_CRASH_DUMP
94__vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
95#endif
96
97static unsigned int smp_max_threads __initdata = -1U;
98cpumask_t cpu_setup_mask;
99
100static int __init early_nosmt(char *s)
101{
102 smp_max_threads = 1;
103 return 0;
104}
105early_param("nosmt", early_nosmt);
106
107static int __init early_smt(char *s)
108{
109 get_option(&s, &smp_max_threads);
110 return 0;
111}
112early_param("smt", early_smt);
113
114/*
115 * The smp_cpu_state_mutex must be held when changing the state or polarization
116 * member of a pcpu data structure within the pcpu_devices arreay.
117 */
118DEFINE_MUTEX(smp_cpu_state_mutex);
119
120/*
121 * Signal processor helper functions.
122 */
123static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
124{
125 int cc;
126
127 while (1) {
128 cc = __pcpu_sigp(addr, order, parm, NULL);
129 if (cc != SIGP_CC_BUSY)
130 return cc;
131 cpu_relax();
132 }
133}
134
135static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
136{
137 int cc, retry;
138
139 for (retry = 0; ; retry++) {
140 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
141 if (cc != SIGP_CC_BUSY)
142 break;
143 if (retry >= 3)
144 udelay(10);
145 }
146 return cc;
147}
148
149static inline int pcpu_stopped(struct pcpu *pcpu)
150{
151 u32 status;
152
153 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
154 0, &status) != SIGP_CC_STATUS_STORED)
155 return 0;
156 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
157}
158
159static inline int pcpu_running(struct pcpu *pcpu)
160{
161 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
162 0, NULL) != SIGP_CC_STATUS_STORED)
163 return 1;
164 /* Status stored condition code is equivalent to cpu not running. */
165 return 0;
166}
167
168/*
169 * Find struct pcpu by cpu address.
170 */
171static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
172{
173 int cpu;
174
175 for_each_cpu(cpu, mask)
176 if (pcpu_devices[cpu].address == address)
177 return pcpu_devices + cpu;
178 return NULL;
179}
180
181static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
182{
183 int order;
184
185 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
186 return;
187 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
188 pcpu->ec_clk = get_tod_clock_fast();
189 pcpu_sigp_retry(pcpu, order, 0);
190}
191
192static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
193{
194 unsigned long async_stack, nodat_stack, mcck_stack;
195 struct lowcore *lc;
196
197 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
198 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
199 async_stack = stack_alloc();
200 mcck_stack = stack_alloc();
201 if (!lc || !nodat_stack || !async_stack || !mcck_stack)
202 goto out;
203 memcpy(lc, &S390_lowcore, 512);
204 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
205 lc->async_stack = async_stack + STACK_INIT_OFFSET;
206 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
207 lc->mcck_stack = mcck_stack + STACK_INIT_OFFSET;
208 lc->cpu_nr = cpu;
209 lc->spinlock_lockval = arch_spin_lockval(cpu);
210 lc->spinlock_index = 0;
211 lc->br_r1_trampoline = 0x07f1; /* br %r1 */
212 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
213 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
214 lc->preempt_count = PREEMPT_DISABLED;
215 if (nmi_alloc_per_cpu(lc))
216 goto out;
217 lowcore_ptr[cpu] = lc;
218 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
219 return 0;
220
221out:
222 stack_free(mcck_stack);
223 stack_free(async_stack);
224 free_pages(nodat_stack, THREAD_SIZE_ORDER);
225 free_pages((unsigned long) lc, LC_ORDER);
226 return -ENOMEM;
227}
228
229static void pcpu_free_lowcore(struct pcpu *pcpu)
230{
231 unsigned long async_stack, nodat_stack, mcck_stack;
232 struct lowcore *lc;
233 int cpu;
234
235 cpu = pcpu - pcpu_devices;
236 lc = lowcore_ptr[cpu];
237 nodat_stack = lc->nodat_stack - STACK_INIT_OFFSET;
238 async_stack = lc->async_stack - STACK_INIT_OFFSET;
239 mcck_stack = lc->mcck_stack - STACK_INIT_OFFSET;
240 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
241 lowcore_ptr[cpu] = NULL;
242 nmi_free_per_cpu(lc);
243 stack_free(async_stack);
244 stack_free(mcck_stack);
245 free_pages(nodat_stack, THREAD_SIZE_ORDER);
246 free_pages((unsigned long) lc, LC_ORDER);
247}
248
249static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
250{
251 struct lowcore *lc = lowcore_ptr[cpu];
252
253 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
254 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
255 lc->cpu_nr = cpu;
256 lc->restart_flags = RESTART_FLAG_CTLREGS;
257 lc->spinlock_lockval = arch_spin_lockval(cpu);
258 lc->spinlock_index = 0;
259 lc->percpu_offset = __per_cpu_offset[cpu];
260 lc->kernel_asce = S390_lowcore.kernel_asce;
261 lc->user_asce = s390_invalid_asce;
262 lc->machine_flags = S390_lowcore.machine_flags;
263 lc->user_timer = lc->system_timer =
264 lc->steal_timer = lc->avg_steal_timer = 0;
265 __ctl_store(lc->cregs_save_area, 0, 15);
266 lc->cregs_save_area[1] = lc->kernel_asce;
267 lc->cregs_save_area[7] = lc->user_asce;
268 save_access_regs((unsigned int *) lc->access_regs_save_area);
269 arch_spin_lock_setup(cpu);
270}
271
272static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
273{
274 struct lowcore *lc;
275 int cpu;
276
277 cpu = pcpu - pcpu_devices;
278 lc = lowcore_ptr[cpu];
279 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
280 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
281 lc->current_task = (unsigned long) tsk;
282 lc->lpp = LPP_MAGIC;
283 lc->current_pid = tsk->pid;
284 lc->user_timer = tsk->thread.user_timer;
285 lc->guest_timer = tsk->thread.guest_timer;
286 lc->system_timer = tsk->thread.system_timer;
287 lc->hardirq_timer = tsk->thread.hardirq_timer;
288 lc->softirq_timer = tsk->thread.softirq_timer;
289 lc->steal_timer = 0;
290}
291
292static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
293{
294 struct lowcore *lc;
295 int cpu;
296
297 cpu = pcpu - pcpu_devices;
298 lc = lowcore_ptr[cpu];
299 lc->restart_stack = lc->nodat_stack;
300 lc->restart_fn = (unsigned long) func;
301 lc->restart_data = (unsigned long) data;
302 lc->restart_source = -1U;
303 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
304}
305
306typedef void (pcpu_delegate_fn)(void *);
307
308/*
309 * Call function via PSW restart on pcpu and stop the current cpu.
310 */
311static void __pcpu_delegate(pcpu_delegate_fn *func, void *data)
312{
313 func(data); /* should not return */
314}
315
316static void pcpu_delegate(struct pcpu *pcpu,
317 pcpu_delegate_fn *func,
318 void *data, unsigned long stack)
319{
320 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
321 unsigned int source_cpu = stap();
322
323 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
324 if (pcpu->address == source_cpu) {
325 call_on_stack(2, stack, void, __pcpu_delegate,
326 pcpu_delegate_fn *, func, void *, data);
327 }
328 /* Stop target cpu (if func returns this stops the current cpu). */
329 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
330 /* Restart func on the target cpu and stop the current cpu. */
331 mem_assign_absolute(lc->restart_stack, stack);
332 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
333 mem_assign_absolute(lc->restart_data, (unsigned long) data);
334 mem_assign_absolute(lc->restart_source, source_cpu);
335 __bpon();
336 asm volatile(
337 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
338 " brc 2,0b # busy, try again\n"
339 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
340 " brc 2,1b # busy, try again\n"
341 : : "d" (pcpu->address), "d" (source_cpu),
342 "K" (SIGP_RESTART), "K" (SIGP_STOP)
343 : "0", "1", "cc");
344 for (;;) ;
345}
346
347/*
348 * Enable additional logical cpus for multi-threading.
349 */
350static int pcpu_set_smt(unsigned int mtid)
351{
352 int cc;
353
354 if (smp_cpu_mtid == mtid)
355 return 0;
356 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
357 if (cc == 0) {
358 smp_cpu_mtid = mtid;
359 smp_cpu_mt_shift = 0;
360 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
361 smp_cpu_mt_shift++;
362 pcpu_devices[0].address = stap();
363 }
364 return cc;
365}
366
367/*
368 * Call function on an online CPU.
369 */
370void smp_call_online_cpu(void (*func)(void *), void *data)
371{
372 struct pcpu *pcpu;
373
374 /* Use the current cpu if it is online. */
375 pcpu = pcpu_find_address(cpu_online_mask, stap());
376 if (!pcpu)
377 /* Use the first online cpu. */
378 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
379 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
380}
381
382/*
383 * Call function on the ipl CPU.
384 */
385void smp_call_ipl_cpu(void (*func)(void *), void *data)
386{
387 struct lowcore *lc = lowcore_ptr[0];
388
389 if (pcpu_devices[0].address == stap())
390 lc = &S390_lowcore;
391
392 pcpu_delegate(&pcpu_devices[0], func, data,
393 lc->nodat_stack);
394}
395
396int smp_find_processor_id(u16 address)
397{
398 int cpu;
399
400 for_each_present_cpu(cpu)
401 if (pcpu_devices[cpu].address == address)
402 return cpu;
403 return -1;
404}
405
406void schedule_mcck_handler(void)
407{
408 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending);
409}
410
411bool notrace arch_vcpu_is_preempted(int cpu)
412{
413 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
414 return false;
415 if (pcpu_running(pcpu_devices + cpu))
416 return false;
417 return true;
418}
419EXPORT_SYMBOL(arch_vcpu_is_preempted);
420
421void notrace smp_yield_cpu(int cpu)
422{
423 if (!MACHINE_HAS_DIAG9C)
424 return;
425 diag_stat_inc_norecursion(DIAG_STAT_X09C);
426 asm volatile("diag %0,0,0x9c"
427 : : "d" (pcpu_devices[cpu].address));
428}
429EXPORT_SYMBOL_GPL(smp_yield_cpu);
430
431/*
432 * Send cpus emergency shutdown signal. This gives the cpus the
433 * opportunity to complete outstanding interrupts.
434 */
435void notrace smp_emergency_stop(void)
436{
437 static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
438 static cpumask_t cpumask;
439 u64 end;
440 int cpu;
441
442 arch_spin_lock(&lock);
443 cpumask_copy(&cpumask, cpu_online_mask);
444 cpumask_clear_cpu(smp_processor_id(), &cpumask);
445
446 end = get_tod_clock() + (1000000UL << 12);
447 for_each_cpu(cpu, &cpumask) {
448 struct pcpu *pcpu = pcpu_devices + cpu;
449 set_bit(ec_stop_cpu, &pcpu->ec_mask);
450 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
451 0, NULL) == SIGP_CC_BUSY &&
452 get_tod_clock() < end)
453 cpu_relax();
454 }
455 while (get_tod_clock() < end) {
456 for_each_cpu(cpu, &cpumask)
457 if (pcpu_stopped(pcpu_devices + cpu))
458 cpumask_clear_cpu(cpu, &cpumask);
459 if (cpumask_empty(&cpumask))
460 break;
461 cpu_relax();
462 }
463 arch_spin_unlock(&lock);
464}
465NOKPROBE_SYMBOL(smp_emergency_stop);
466
467/*
468 * Stop all cpus but the current one.
469 */
470void smp_send_stop(void)
471{
472 int cpu;
473
474 /* Disable all interrupts/machine checks */
475 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
476 trace_hardirqs_off();
477
478 debug_set_critical();
479
480 if (oops_in_progress)
481 smp_emergency_stop();
482
483 /* stop all processors */
484 for_each_online_cpu(cpu) {
485 if (cpu == smp_processor_id())
486 continue;
487 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
488 while (!pcpu_stopped(pcpu_devices + cpu))
489 cpu_relax();
490 }
491}
492
493/*
494 * This is the main routine where commands issued by other
495 * cpus are handled.
496 */
497static void smp_handle_ext_call(void)
498{
499 unsigned long bits;
500
501 /* handle bit signal external calls */
502 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
503 if (test_bit(ec_stop_cpu, &bits))
504 smp_stop_cpu();
505 if (test_bit(ec_schedule, &bits))
506 scheduler_ipi();
507 if (test_bit(ec_call_function_single, &bits))
508 generic_smp_call_function_single_interrupt();
509 if (test_bit(ec_mcck_pending, &bits))
510 __s390_handle_mcck();
511 if (test_bit(ec_irq_work, &bits))
512 irq_work_run();
513}
514
515static void do_ext_call_interrupt(struct ext_code ext_code,
516 unsigned int param32, unsigned long param64)
517{
518 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
519 smp_handle_ext_call();
520}
521
522void arch_send_call_function_ipi_mask(const struct cpumask *mask)
523{
524 int cpu;
525
526 for_each_cpu(cpu, mask)
527 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
528}
529
530void arch_send_call_function_single_ipi(int cpu)
531{
532 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
533}
534
535/*
536 * this function sends a 'reschedule' IPI to another CPU.
537 * it goes straight through and wastes no time serializing
538 * anything. Worst case is that we lose a reschedule ...
539 */
540void smp_send_reschedule(int cpu)
541{
542 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
543}
544
545#ifdef CONFIG_IRQ_WORK
546void arch_irq_work_raise(void)
547{
548 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_irq_work);
549}
550#endif
551
552/*
553 * parameter area for the set/clear control bit callbacks
554 */
555struct ec_creg_mask_parms {
556 unsigned long orval;
557 unsigned long andval;
558 int cr;
559};
560
561/*
562 * callback for setting/clearing control bits
563 */
564static void smp_ctl_bit_callback(void *info)
565{
566 struct ec_creg_mask_parms *pp = info;
567 unsigned long cregs[16];
568
569 __ctl_store(cregs, 0, 15);
570 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
571 __ctl_load(cregs, 0, 15);
572}
573
574static DEFINE_SPINLOCK(ctl_lock);
575static unsigned long ctlreg;
576
577/*
578 * Set a bit in a control register of all cpus
579 */
580void smp_ctl_set_bit(int cr, int bit)
581{
582 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
583
584 spin_lock(&ctl_lock);
585 memcpy_absolute(&ctlreg, &S390_lowcore.cregs_save_area[cr], sizeof(ctlreg));
586 __set_bit(bit, &ctlreg);
587 memcpy_absolute(&S390_lowcore.cregs_save_area[cr], &ctlreg, sizeof(ctlreg));
588 spin_unlock(&ctl_lock);
589 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
590}
591EXPORT_SYMBOL(smp_ctl_set_bit);
592
593/*
594 * Clear a bit in a control register of all cpus
595 */
596void smp_ctl_clear_bit(int cr, int bit)
597{
598 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
599
600 spin_lock(&ctl_lock);
601 memcpy_absolute(&ctlreg, &S390_lowcore.cregs_save_area[cr], sizeof(ctlreg));
602 __clear_bit(bit, &ctlreg);
603 memcpy_absolute(&S390_lowcore.cregs_save_area[cr], &ctlreg, sizeof(ctlreg));
604 spin_unlock(&ctl_lock);
605 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
606}
607EXPORT_SYMBOL(smp_ctl_clear_bit);
608
609#ifdef CONFIG_CRASH_DUMP
610
611int smp_store_status(int cpu)
612{
613 struct lowcore *lc;
614 struct pcpu *pcpu;
615 unsigned long pa;
616
617 pcpu = pcpu_devices + cpu;
618 lc = lowcore_ptr[cpu];
619 pa = __pa(&lc->floating_pt_save_area);
620 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
621 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
622 return -EIO;
623 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
624 return 0;
625 pa = __pa(lc->mcesad & MCESA_ORIGIN_MASK);
626 if (MACHINE_HAS_GS)
627 pa |= lc->mcesad & MCESA_LC_MASK;
628 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
629 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
630 return -EIO;
631 return 0;
632}
633
634/*
635 * Collect CPU state of the previous, crashed system.
636 * There are four cases:
637 * 1) standard zfcp/nvme dump
638 * condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true
639 * The state for all CPUs except the boot CPU needs to be collected
640 * with sigp stop-and-store-status. The boot CPU state is located in
641 * the absolute lowcore of the memory stored in the HSA. The zcore code
642 * will copy the boot CPU state from the HSA.
643 * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory)
644 * condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true
645 * The state for all CPUs except the boot CPU needs to be collected
646 * with sigp stop-and-store-status. The firmware or the boot-loader
647 * stored the registers of the boot CPU in the absolute lowcore in the
648 * memory of the old system.
649 * 3) kdump and the old kernel did not store the CPU state,
650 * or stand-alone kdump for DASD
651 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
652 * The state for all CPUs except the boot CPU needs to be collected
653 * with sigp stop-and-store-status. The kexec code or the boot-loader
654 * stored the registers of the boot CPU in the memory of the old system.
655 * 4) kdump and the old kernel stored the CPU state
656 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
657 * This case does not exist for s390 anymore, setup_arch explicitly
658 * deactivates the elfcorehdr= kernel parameter
659 */
660static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
661 bool is_boot_cpu, unsigned long page)
662{
663 __vector128 *vxrs = (__vector128 *) page;
664
665 if (is_boot_cpu)
666 vxrs = boot_cpu_vector_save_area;
667 else
668 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
669 save_area_add_vxrs(sa, vxrs);
670}
671
672static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
673 bool is_boot_cpu, unsigned long page)
674{
675 void *regs = (void *) page;
676
677 if (is_boot_cpu)
678 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
679 else
680 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
681 save_area_add_regs(sa, regs);
682}
683
684void __init smp_save_dump_cpus(void)
685{
686 int addr, boot_cpu_addr, max_cpu_addr;
687 struct save_area *sa;
688 unsigned long page;
689 bool is_boot_cpu;
690
691 if (!(OLDMEM_BASE || is_ipl_type_dump()))
692 /* No previous system present, normal boot. */
693 return;
694 /* Allocate a page as dumping area for the store status sigps */
695 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31);
696 if (!page)
697 panic("ERROR: Failed to allocate %lx bytes below %lx\n",
698 PAGE_SIZE, 1UL << 31);
699
700 /* Set multi-threading state to the previous system. */
701 pcpu_set_smt(sclp.mtid_prev);
702 boot_cpu_addr = stap();
703 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
704 for (addr = 0; addr <= max_cpu_addr; addr++) {
705 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
706 SIGP_CC_NOT_OPERATIONAL)
707 continue;
708 is_boot_cpu = (addr == boot_cpu_addr);
709 /* Allocate save area */
710 sa = save_area_alloc(is_boot_cpu);
711 if (!sa)
712 panic("could not allocate memory for save area\n");
713 if (MACHINE_HAS_VX)
714 /* Get the vector registers */
715 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
716 /*
717 * For a zfcp/nvme dump OLDMEM_BASE == NULL and the registers
718 * of the boot CPU are stored in the HSA. To retrieve
719 * these registers an SCLP request is required which is
720 * done by drivers/s390/char/zcore.c:init_cpu_info()
721 */
722 if (!is_boot_cpu || OLDMEM_BASE)
723 /* Get the CPU registers */
724 smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
725 }
726 memblock_free(page, PAGE_SIZE);
727 diag_dma_ops.diag308_reset();
728 pcpu_set_smt(0);
729}
730#endif /* CONFIG_CRASH_DUMP */
731
732void smp_cpu_set_polarization(int cpu, int val)
733{
734 pcpu_devices[cpu].polarization = val;
735}
736
737int smp_cpu_get_polarization(int cpu)
738{
739 return pcpu_devices[cpu].polarization;
740}
741
742int smp_cpu_get_cpu_address(int cpu)
743{
744 return pcpu_devices[cpu].address;
745}
746
747static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
748{
749 static int use_sigp_detection;
750 int address;
751
752 if (use_sigp_detection || sclp_get_core_info(info, early)) {
753 use_sigp_detection = 1;
754 for (address = 0;
755 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
756 address += (1U << smp_cpu_mt_shift)) {
757 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
758 SIGP_CC_NOT_OPERATIONAL)
759 continue;
760 info->core[info->configured].core_id =
761 address >> smp_cpu_mt_shift;
762 info->configured++;
763 }
764 info->combined = info->configured;
765 }
766}
767
768static int smp_add_present_cpu(int cpu);
769
770static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
771 bool configured, bool early)
772{
773 struct pcpu *pcpu;
774 int cpu, nr, i;
775 u16 address;
776
777 nr = 0;
778 if (sclp.has_core_type && core->type != boot_core_type)
779 return nr;
780 cpu = cpumask_first(avail);
781 address = core->core_id << smp_cpu_mt_shift;
782 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
783 if (pcpu_find_address(cpu_present_mask, address + i))
784 continue;
785 pcpu = pcpu_devices + cpu;
786 pcpu->address = address + i;
787 if (configured)
788 pcpu->state = CPU_STATE_CONFIGURED;
789 else
790 pcpu->state = CPU_STATE_STANDBY;
791 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
792 set_cpu_present(cpu, true);
793 if (!early && smp_add_present_cpu(cpu) != 0)
794 set_cpu_present(cpu, false);
795 else
796 nr++;
797 cpumask_clear_cpu(cpu, avail);
798 cpu = cpumask_next(cpu, avail);
799 }
800 return nr;
801}
802
803static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
804{
805 struct sclp_core_entry *core;
806 static cpumask_t avail;
807 bool configured;
808 u16 core_id;
809 int nr, i;
810
811 get_online_cpus();
812 mutex_lock(&smp_cpu_state_mutex);
813 nr = 0;
814 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
815 /*
816 * Add IPL core first (which got logical CPU number 0) to make sure
817 * that all SMT threads get subsequent logical CPU numbers.
818 */
819 if (early) {
820 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
821 for (i = 0; i < info->configured; i++) {
822 core = &info->core[i];
823 if (core->core_id == core_id) {
824 nr += smp_add_core(core, &avail, true, early);
825 break;
826 }
827 }
828 }
829 for (i = 0; i < info->combined; i++) {
830 configured = i < info->configured;
831 nr += smp_add_core(&info->core[i], &avail, configured, early);
832 }
833 mutex_unlock(&smp_cpu_state_mutex);
834 put_online_cpus();
835 return nr;
836}
837
838void __init smp_detect_cpus(void)
839{
840 unsigned int cpu, mtid, c_cpus, s_cpus;
841 struct sclp_core_info *info;
842 u16 address;
843
844 /* Get CPU information */
845 info = memblock_alloc(sizeof(*info), 8);
846 if (!info)
847 panic("%s: Failed to allocate %zu bytes align=0x%x\n",
848 __func__, sizeof(*info), 8);
849 smp_get_core_info(info, 1);
850 /* Find boot CPU type */
851 if (sclp.has_core_type) {
852 address = stap();
853 for (cpu = 0; cpu < info->combined; cpu++)
854 if (info->core[cpu].core_id == address) {
855 /* The boot cpu dictates the cpu type. */
856 boot_core_type = info->core[cpu].type;
857 break;
858 }
859 if (cpu >= info->combined)
860 panic("Could not find boot CPU type");
861 }
862
863 /* Set multi-threading state for the current system */
864 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
865 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
866 pcpu_set_smt(mtid);
867
868 /* Print number of CPUs */
869 c_cpus = s_cpus = 0;
870 for (cpu = 0; cpu < info->combined; cpu++) {
871 if (sclp.has_core_type &&
872 info->core[cpu].type != boot_core_type)
873 continue;
874 if (cpu < info->configured)
875 c_cpus += smp_cpu_mtid + 1;
876 else
877 s_cpus += smp_cpu_mtid + 1;
878 }
879 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
880
881 /* Add CPUs present at boot */
882 __smp_rescan_cpus(info, true);
883 memblock_free_early((unsigned long)info, sizeof(*info));
884}
885
886static void smp_init_secondary(void)
887{
888 int cpu = raw_smp_processor_id();
889
890 S390_lowcore.last_update_clock = get_tod_clock();
891 restore_access_regs(S390_lowcore.access_regs_save_area);
892 cpu_init();
893 rcu_cpu_starting(cpu);
894 init_cpu_timer();
895 vtime_init();
896 vdso_getcpu_init();
897 pfault_init();
898 cpumask_set_cpu(cpu, &cpu_setup_mask);
899 update_cpu_masks();
900 notify_cpu_starting(cpu);
901 if (topology_cpu_dedicated(cpu))
902 set_cpu_flag(CIF_DEDICATED_CPU);
903 else
904 clear_cpu_flag(CIF_DEDICATED_CPU);
905 set_cpu_online(cpu, true);
906 inc_irq_stat(CPU_RST);
907 local_irq_enable();
908 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
909}
910
911/*
912 * Activate a secondary processor.
913 */
914static void smp_start_secondary(void *cpuvoid)
915{
916 S390_lowcore.restart_stack = (unsigned long) restart_stack;
917 S390_lowcore.restart_fn = (unsigned long) do_restart;
918 S390_lowcore.restart_data = 0;
919 S390_lowcore.restart_source = -1U;
920 S390_lowcore.restart_flags = 0;
921 call_on_stack_noreturn(smp_init_secondary, S390_lowcore.kernel_stack);
922}
923
924/* Upping and downing of CPUs */
925int __cpu_up(unsigned int cpu, struct task_struct *tidle)
926{
927 struct pcpu *pcpu = pcpu_devices + cpu;
928 int rc;
929
930 if (pcpu->state != CPU_STATE_CONFIGURED)
931 return -EIO;
932 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
933 SIGP_CC_ORDER_CODE_ACCEPTED)
934 return -EIO;
935
936 rc = pcpu_alloc_lowcore(pcpu, cpu);
937 if (rc)
938 return rc;
939 pcpu_prepare_secondary(pcpu, cpu);
940 pcpu_attach_task(pcpu, tidle);
941 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
942 /* Wait until cpu puts itself in the online & active maps */
943 while (!cpu_online(cpu))
944 cpu_relax();
945 return 0;
946}
947
948static unsigned int setup_possible_cpus __initdata;
949
950static int __init _setup_possible_cpus(char *s)
951{
952 get_option(&s, &setup_possible_cpus);
953 return 0;
954}
955early_param("possible_cpus", _setup_possible_cpus);
956
957int __cpu_disable(void)
958{
959 unsigned long cregs[16];
960 int cpu;
961
962 /* Handle possible pending IPIs */
963 smp_handle_ext_call();
964 cpu = smp_processor_id();
965 set_cpu_online(cpu, false);
966 cpumask_clear_cpu(cpu, &cpu_setup_mask);
967 update_cpu_masks();
968 /* Disable pseudo page faults on this cpu. */
969 pfault_fini();
970 /* Disable interrupt sources via control register. */
971 __ctl_store(cregs, 0, 15);
972 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
973 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
974 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
975 __ctl_load(cregs, 0, 15);
976 clear_cpu_flag(CIF_NOHZ_DELAY);
977 return 0;
978}
979
980void __cpu_die(unsigned int cpu)
981{
982 struct pcpu *pcpu;
983
984 /* Wait until target cpu is down */
985 pcpu = pcpu_devices + cpu;
986 while (!pcpu_stopped(pcpu))
987 cpu_relax();
988 pcpu_free_lowcore(pcpu);
989 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
990 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
991}
992
993void __noreturn cpu_die(void)
994{
995 idle_task_exit();
996 __bpon();
997 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
998 for (;;) ;
999}
1000
1001void __init smp_fill_possible_mask(void)
1002{
1003 unsigned int possible, sclp_max, cpu;
1004
1005 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
1006 sclp_max = min(smp_max_threads, sclp_max);
1007 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
1008 possible = setup_possible_cpus ?: nr_cpu_ids;
1009 possible = min(possible, sclp_max);
1010 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
1011 set_cpu_possible(cpu, true);
1012}
1013
1014void __init smp_prepare_cpus(unsigned int max_cpus)
1015{
1016 /* request the 0x1201 emergency signal external interrupt */
1017 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
1018 panic("Couldn't request external interrupt 0x1201");
1019 /* request the 0x1202 external call external interrupt */
1020 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
1021 panic("Couldn't request external interrupt 0x1202");
1022}
1023
1024void __init smp_prepare_boot_cpu(void)
1025{
1026 struct pcpu *pcpu = pcpu_devices;
1027
1028 WARN_ON(!cpu_present(0) || !cpu_online(0));
1029 pcpu->state = CPU_STATE_CONFIGURED;
1030 S390_lowcore.percpu_offset = __per_cpu_offset[0];
1031 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
1032}
1033
1034void __init smp_setup_processor_id(void)
1035{
1036 pcpu_devices[0].address = stap();
1037 S390_lowcore.cpu_nr = 0;
1038 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
1039 S390_lowcore.spinlock_index = 0;
1040}
1041
1042/*
1043 * the frequency of the profiling timer can be changed
1044 * by writing a multiplier value into /proc/profile.
1045 *
1046 * usually you want to run this on all CPUs ;)
1047 */
1048int setup_profiling_timer(unsigned int multiplier)
1049{
1050 return 0;
1051}
1052
1053static ssize_t cpu_configure_show(struct device *dev,
1054 struct device_attribute *attr, char *buf)
1055{
1056 ssize_t count;
1057
1058 mutex_lock(&smp_cpu_state_mutex);
1059 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1060 mutex_unlock(&smp_cpu_state_mutex);
1061 return count;
1062}
1063
1064static ssize_t cpu_configure_store(struct device *dev,
1065 struct device_attribute *attr,
1066 const char *buf, size_t count)
1067{
1068 struct pcpu *pcpu;
1069 int cpu, val, rc, i;
1070 char delim;
1071
1072 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1073 return -EINVAL;
1074 if (val != 0 && val != 1)
1075 return -EINVAL;
1076 get_online_cpus();
1077 mutex_lock(&smp_cpu_state_mutex);
1078 rc = -EBUSY;
1079 /* disallow configuration changes of online cpus and cpu 0 */
1080 cpu = dev->id;
1081 cpu = smp_get_base_cpu(cpu);
1082 if (cpu == 0)
1083 goto out;
1084 for (i = 0; i <= smp_cpu_mtid; i++)
1085 if (cpu_online(cpu + i))
1086 goto out;
1087 pcpu = pcpu_devices + cpu;
1088 rc = 0;
1089 switch (val) {
1090 case 0:
1091 if (pcpu->state != CPU_STATE_CONFIGURED)
1092 break;
1093 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1094 if (rc)
1095 break;
1096 for (i = 0; i <= smp_cpu_mtid; i++) {
1097 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1098 continue;
1099 pcpu[i].state = CPU_STATE_STANDBY;
1100 smp_cpu_set_polarization(cpu + i,
1101 POLARIZATION_UNKNOWN);
1102 }
1103 topology_expect_change();
1104 break;
1105 case 1:
1106 if (pcpu->state != CPU_STATE_STANDBY)
1107 break;
1108 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1109 if (rc)
1110 break;
1111 for (i = 0; i <= smp_cpu_mtid; i++) {
1112 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1113 continue;
1114 pcpu[i].state = CPU_STATE_CONFIGURED;
1115 smp_cpu_set_polarization(cpu + i,
1116 POLARIZATION_UNKNOWN);
1117 }
1118 topology_expect_change();
1119 break;
1120 default:
1121 break;
1122 }
1123out:
1124 mutex_unlock(&smp_cpu_state_mutex);
1125 put_online_cpus();
1126 return rc ? rc : count;
1127}
1128static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1129
1130static ssize_t show_cpu_address(struct device *dev,
1131 struct device_attribute *attr, char *buf)
1132{
1133 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1134}
1135static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1136
1137static struct attribute *cpu_common_attrs[] = {
1138 &dev_attr_configure.attr,
1139 &dev_attr_address.attr,
1140 NULL,
1141};
1142
1143static struct attribute_group cpu_common_attr_group = {
1144 .attrs = cpu_common_attrs,
1145};
1146
1147static struct attribute *cpu_online_attrs[] = {
1148 &dev_attr_idle_count.attr,
1149 &dev_attr_idle_time_us.attr,
1150 NULL,
1151};
1152
1153static struct attribute_group cpu_online_attr_group = {
1154 .attrs = cpu_online_attrs,
1155};
1156
1157static int smp_cpu_online(unsigned int cpu)
1158{
1159 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1160
1161 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1162}
1163
1164static int smp_cpu_pre_down(unsigned int cpu)
1165{
1166 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1167
1168 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1169 return 0;
1170}
1171
1172static int smp_add_present_cpu(int cpu)
1173{
1174 struct device *s;
1175 struct cpu *c;
1176 int rc;
1177
1178 c = kzalloc(sizeof(*c), GFP_KERNEL);
1179 if (!c)
1180 return -ENOMEM;
1181 per_cpu(cpu_device, cpu) = c;
1182 s = &c->dev;
1183 c->hotpluggable = 1;
1184 rc = register_cpu(c, cpu);
1185 if (rc)
1186 goto out;
1187 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1188 if (rc)
1189 goto out_cpu;
1190 rc = topology_cpu_init(c);
1191 if (rc)
1192 goto out_topology;
1193 return 0;
1194
1195out_topology:
1196 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1197out_cpu:
1198 unregister_cpu(c);
1199out:
1200 return rc;
1201}
1202
1203int __ref smp_rescan_cpus(void)
1204{
1205 struct sclp_core_info *info;
1206 int nr;
1207
1208 info = kzalloc(sizeof(*info), GFP_KERNEL);
1209 if (!info)
1210 return -ENOMEM;
1211 smp_get_core_info(info, 0);
1212 nr = __smp_rescan_cpus(info, false);
1213 kfree(info);
1214 if (nr)
1215 topology_schedule_update();
1216 return 0;
1217}
1218
1219static ssize_t __ref rescan_store(struct device *dev,
1220 struct device_attribute *attr,
1221 const char *buf,
1222 size_t count)
1223{
1224 int rc;
1225
1226 rc = lock_device_hotplug_sysfs();
1227 if (rc)
1228 return rc;
1229 rc = smp_rescan_cpus();
1230 unlock_device_hotplug();
1231 return rc ? rc : count;
1232}
1233static DEVICE_ATTR_WO(rescan);
1234
1235static int __init s390_smp_init(void)
1236{
1237 int cpu, rc = 0;
1238
1239 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1240 if (rc)
1241 return rc;
1242 for_each_present_cpu(cpu) {
1243 rc = smp_add_present_cpu(cpu);
1244 if (rc)
1245 goto out;
1246 }
1247
1248 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1249 smp_cpu_online, smp_cpu_pre_down);
1250 rc = rc <= 0 ? rc : 0;
1251out:
1252 return rc;
1253}
1254subsys_initcall(s390_smp_init);
1255
1256static __always_inline void set_new_lowcore(struct lowcore *lc)
1257{
1258 union register_pair dst, src;
1259 u32 pfx;
1260
1261 src.even = (unsigned long) &S390_lowcore;
1262 src.odd = sizeof(S390_lowcore);
1263 dst.even = (unsigned long) lc;
1264 dst.odd = sizeof(*lc);
1265 pfx = (unsigned long) lc;
1266
1267 asm volatile(
1268 " mvcl %[dst],%[src]\n"
1269 " spx %[pfx]\n"
1270 : [dst] "+&d" (dst.pair), [src] "+&d" (src.pair)
1271 : [pfx] "Q" (pfx)
1272 : "memory", "cc");
1273}
1274
1275static int __init smp_reinit_ipl_cpu(void)
1276{
1277 unsigned long async_stack, nodat_stack, mcck_stack;
1278 struct lowcore *lc, *lc_ipl;
1279 unsigned long flags;
1280
1281 lc_ipl = lowcore_ptr[0];
1282 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1283 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
1284 async_stack = stack_alloc();
1285 mcck_stack = stack_alloc();
1286 if (!lc || !nodat_stack || !async_stack || !mcck_stack)
1287 panic("Couldn't allocate memory");
1288
1289 local_irq_save(flags);
1290 local_mcck_disable();
1291 set_new_lowcore(lc);
1292 S390_lowcore.nodat_stack = nodat_stack + STACK_INIT_OFFSET;
1293 S390_lowcore.async_stack = async_stack + STACK_INIT_OFFSET;
1294 S390_lowcore.mcck_stack = mcck_stack + STACK_INIT_OFFSET;
1295 lowcore_ptr[0] = lc;
1296 local_mcck_enable();
1297 local_irq_restore(flags);
1298
1299 free_pages(lc_ipl->async_stack - STACK_INIT_OFFSET, THREAD_SIZE_ORDER);
1300 memblock_free_late(lc_ipl->mcck_stack - STACK_INIT_OFFSET, THREAD_SIZE);
1301 memblock_free_late((unsigned long) lc_ipl, sizeof(*lc_ipl));
1302
1303 return 0;
1304}
1305early_initcall(smp_reinit_ipl_cpu);