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1/*
2 * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
3 *
4 * Some ideas based on un-pushed work done by Vivek Mahajan, Jason Jin, and
5 * Mingkai Hu from Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2 of the
10 * License.
11 *
12 */
13
14#include <linux/list.h>
15#include <linux/of_platform.h>
16#include <linux/errno.h>
17#include <linux/err.h>
18#include <linux/export.h>
19#include <linux/slab.h>
20#include <asm/prom.h>
21#include <asm/hw_irq.h>
22#include <asm/ppc-pci.h>
23#include <asm/mpic_msgr.h>
24
25#define MPIC_MSGR_REGISTERS_PER_BLOCK 4
26#define MPIC_MSGR_STRIDE 0x10
27#define MPIC_MSGR_MER_OFFSET 0x100
28#define MSGR_INUSE 0
29#define MSGR_FREE 1
30
31static struct mpic_msgr **mpic_msgrs;
32static unsigned int mpic_msgr_count;
33static DEFINE_RAW_SPINLOCK(msgrs_lock);
34
35static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
36{
37 out_be32(msgr->mer, value);
38}
39
40static inline u32 _mpic_msgr_mer_read(struct mpic_msgr *msgr)
41{
42 return in_be32(msgr->mer);
43}
44
45static inline void _mpic_msgr_disable(struct mpic_msgr *msgr)
46{
47 u32 mer = _mpic_msgr_mer_read(msgr);
48
49 _mpic_msgr_mer_write(msgr, mer & ~(1 << msgr->num));
50}
51
52struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
53{
54 unsigned long flags;
55 struct mpic_msgr *msgr;
56
57 /* Assume busy until proven otherwise. */
58 msgr = ERR_PTR(-EBUSY);
59
60 if (reg_num >= mpic_msgr_count)
61 return ERR_PTR(-ENODEV);
62
63 raw_spin_lock_irqsave(&msgrs_lock, flags);
64 msgr = mpic_msgrs[reg_num];
65 if (msgr->in_use == MSGR_FREE)
66 msgr->in_use = MSGR_INUSE;
67 raw_spin_unlock_irqrestore(&msgrs_lock, flags);
68
69 return msgr;
70}
71EXPORT_SYMBOL_GPL(mpic_msgr_get);
72
73void mpic_msgr_put(struct mpic_msgr *msgr)
74{
75 unsigned long flags;
76
77 raw_spin_lock_irqsave(&msgr->lock, flags);
78 msgr->in_use = MSGR_FREE;
79 _mpic_msgr_disable(msgr);
80 raw_spin_unlock_irqrestore(&msgr->lock, flags);
81}
82EXPORT_SYMBOL_GPL(mpic_msgr_put);
83
84void mpic_msgr_enable(struct mpic_msgr *msgr)
85{
86 unsigned long flags;
87 u32 mer;
88
89 raw_spin_lock_irqsave(&msgr->lock, flags);
90 mer = _mpic_msgr_mer_read(msgr);
91 _mpic_msgr_mer_write(msgr, mer | (1 << msgr->num));
92 raw_spin_unlock_irqrestore(&msgr->lock, flags);
93}
94EXPORT_SYMBOL_GPL(mpic_msgr_enable);
95
96void mpic_msgr_disable(struct mpic_msgr *msgr)
97{
98 unsigned long flags;
99
100 raw_spin_lock_irqsave(&msgr->lock, flags);
101 _mpic_msgr_disable(msgr);
102 raw_spin_unlock_irqrestore(&msgr->lock, flags);
103}
104EXPORT_SYMBOL_GPL(mpic_msgr_disable);
105
106/* The following three functions are used to compute the order and number of
107 * the message register blocks. They are clearly very inefficent. However,
108 * they are called *only* a few times during device initialization.
109 */
110static unsigned int mpic_msgr_number_of_blocks(void)
111{
112 unsigned int count;
113 struct device_node *aliases;
114
115 count = 0;
116 aliases = of_find_node_by_name(NULL, "aliases");
117
118 if (aliases) {
119 char buf[32];
120
121 for (;;) {
122 snprintf(buf, sizeof(buf), "mpic-msgr-block%d", count);
123 if (!of_find_property(aliases, buf, NULL))
124 break;
125
126 count += 1;
127 }
128 }
129
130 return count;
131}
132
133static unsigned int mpic_msgr_number_of_registers(void)
134{
135 return mpic_msgr_number_of_blocks() * MPIC_MSGR_REGISTERS_PER_BLOCK;
136}
137
138static int mpic_msgr_block_number(struct device_node *node)
139{
140 struct device_node *aliases;
141 unsigned int index, number_of_blocks;
142 char buf[64];
143
144 number_of_blocks = mpic_msgr_number_of_blocks();
145 aliases = of_find_node_by_name(NULL, "aliases");
146 if (!aliases)
147 return -1;
148
149 for (index = 0; index < number_of_blocks; ++index) {
150 struct property *prop;
151
152 snprintf(buf, sizeof(buf), "mpic-msgr-block%d", index);
153 prop = of_find_property(aliases, buf, NULL);
154 if (node == of_find_node_by_path(prop->value))
155 break;
156 }
157
158 return index == number_of_blocks ? -1 : index;
159}
160
161/* The probe function for a single message register block.
162 */
163static int mpic_msgr_probe(struct platform_device *dev)
164{
165 void __iomem *msgr_block_addr;
166 int block_number;
167 struct resource rsrc;
168 unsigned int i;
169 unsigned int irq_index;
170 struct device_node *np = dev->dev.of_node;
171 unsigned int receive_mask;
172 const unsigned int *prop;
173
174 if (!np) {
175 dev_err(&dev->dev, "Device OF-Node is NULL");
176 return -EFAULT;
177 }
178
179 /* Allocate the message register array upon the first device
180 * registered.
181 */
182 if (!mpic_msgrs) {
183 mpic_msgr_count = mpic_msgr_number_of_registers();
184 dev_info(&dev->dev, "Found %d message registers\n",
185 mpic_msgr_count);
186
187 mpic_msgrs = kcalloc(mpic_msgr_count, sizeof(*mpic_msgrs),
188 GFP_KERNEL);
189 if (!mpic_msgrs) {
190 dev_err(&dev->dev,
191 "No memory for message register blocks\n");
192 return -ENOMEM;
193 }
194 }
195 dev_info(&dev->dev, "Of-device full name %pOF\n", np);
196
197 /* IO map the message register block. */
198 of_address_to_resource(np, 0, &rsrc);
199 msgr_block_addr = ioremap(rsrc.start, rsrc.end - rsrc.start);
200 if (!msgr_block_addr) {
201 dev_err(&dev->dev, "Failed to iomap MPIC message registers");
202 return -EFAULT;
203 }
204
205 /* Ensure the block has a defined order. */
206 block_number = mpic_msgr_block_number(np);
207 if (block_number < 0) {
208 dev_err(&dev->dev,
209 "Failed to find message register block alias\n");
210 return -ENODEV;
211 }
212 dev_info(&dev->dev, "Setting up message register block %d\n",
213 block_number);
214
215 /* Grab the receive mask which specifies what registers can receive
216 * interrupts.
217 */
218 prop = of_get_property(np, "mpic-msgr-receive-mask", NULL);
219 receive_mask = (prop) ? *prop : 0xF;
220
221 /* Build up the appropriate message register data structures. */
222 for (i = 0, irq_index = 0; i < MPIC_MSGR_REGISTERS_PER_BLOCK; ++i) {
223 struct mpic_msgr *msgr;
224 unsigned int reg_number;
225
226 msgr = kzalloc(sizeof(struct mpic_msgr), GFP_KERNEL);
227 if (!msgr) {
228 dev_err(&dev->dev, "No memory for message register\n");
229 return -ENOMEM;
230 }
231
232 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
233 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
234 msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
235 msgr->in_use = MSGR_FREE;
236 msgr->num = i;
237 raw_spin_lock_init(&msgr->lock);
238
239 if (receive_mask & (1 << i)) {
240 msgr->irq = irq_of_parse_and_map(np, irq_index);
241 if (!msgr->irq) {
242 dev_err(&dev->dev,
243 "Missing interrupt specifier");
244 kfree(msgr);
245 return -EFAULT;
246 }
247 irq_index += 1;
248 } else {
249 msgr->irq = 0;
250 }
251
252 mpic_msgrs[reg_number] = msgr;
253 mpic_msgr_disable(msgr);
254 dev_info(&dev->dev, "Register %d initialized: irq %d\n",
255 reg_number, msgr->irq);
256
257 }
258
259 return 0;
260}
261
262static const struct of_device_id mpic_msgr_ids[] = {
263 {
264 .compatible = "fsl,mpic-v3.1-msgr",
265 .data = NULL,
266 },
267 {}
268};
269
270static struct platform_driver mpic_msgr_driver = {
271 .driver = {
272 .name = "mpic-msgr",
273 .of_match_table = mpic_msgr_ids,
274 },
275 .probe = mpic_msgr_probe,
276};
277
278static __init int mpic_msgr_init(void)
279{
280 return platform_driver_register(&mpic_msgr_driver);
281}
282subsys_initcall(mpic_msgr_init);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
4 *
5 * Some ideas based on un-pushed work done by Vivek Mahajan, Jason Jin, and
6 * Mingkai Hu from Freescale Semiconductor, Inc.
7 */
8
9#include <linux/list.h>
10#include <linux/of_platform.h>
11#include <linux/errno.h>
12#include <linux/err.h>
13#include <linux/export.h>
14#include <linux/slab.h>
15#include <asm/prom.h>
16#include <asm/hw_irq.h>
17#include <asm/ppc-pci.h>
18#include <asm/mpic_msgr.h>
19
20#define MPIC_MSGR_REGISTERS_PER_BLOCK 4
21#define MPIC_MSGR_STRIDE 0x10
22#define MPIC_MSGR_MER_OFFSET 0x100
23#define MSGR_INUSE 0
24#define MSGR_FREE 1
25
26static struct mpic_msgr **mpic_msgrs;
27static unsigned int mpic_msgr_count;
28static DEFINE_RAW_SPINLOCK(msgrs_lock);
29
30static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
31{
32 out_be32(msgr->mer, value);
33}
34
35static inline u32 _mpic_msgr_mer_read(struct mpic_msgr *msgr)
36{
37 return in_be32(msgr->mer);
38}
39
40static inline void _mpic_msgr_disable(struct mpic_msgr *msgr)
41{
42 u32 mer = _mpic_msgr_mer_read(msgr);
43
44 _mpic_msgr_mer_write(msgr, mer & ~(1 << msgr->num));
45}
46
47struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
48{
49 unsigned long flags;
50 struct mpic_msgr *msgr;
51
52 /* Assume busy until proven otherwise. */
53 msgr = ERR_PTR(-EBUSY);
54
55 if (reg_num >= mpic_msgr_count)
56 return ERR_PTR(-ENODEV);
57
58 raw_spin_lock_irqsave(&msgrs_lock, flags);
59 msgr = mpic_msgrs[reg_num];
60 if (msgr->in_use == MSGR_FREE)
61 msgr->in_use = MSGR_INUSE;
62 raw_spin_unlock_irqrestore(&msgrs_lock, flags);
63
64 return msgr;
65}
66EXPORT_SYMBOL_GPL(mpic_msgr_get);
67
68void mpic_msgr_put(struct mpic_msgr *msgr)
69{
70 unsigned long flags;
71
72 raw_spin_lock_irqsave(&msgr->lock, flags);
73 msgr->in_use = MSGR_FREE;
74 _mpic_msgr_disable(msgr);
75 raw_spin_unlock_irqrestore(&msgr->lock, flags);
76}
77EXPORT_SYMBOL_GPL(mpic_msgr_put);
78
79void mpic_msgr_enable(struct mpic_msgr *msgr)
80{
81 unsigned long flags;
82 u32 mer;
83
84 raw_spin_lock_irqsave(&msgr->lock, flags);
85 mer = _mpic_msgr_mer_read(msgr);
86 _mpic_msgr_mer_write(msgr, mer | (1 << msgr->num));
87 raw_spin_unlock_irqrestore(&msgr->lock, flags);
88}
89EXPORT_SYMBOL_GPL(mpic_msgr_enable);
90
91void mpic_msgr_disable(struct mpic_msgr *msgr)
92{
93 unsigned long flags;
94
95 raw_spin_lock_irqsave(&msgr->lock, flags);
96 _mpic_msgr_disable(msgr);
97 raw_spin_unlock_irqrestore(&msgr->lock, flags);
98}
99EXPORT_SYMBOL_GPL(mpic_msgr_disable);
100
101/* The following three functions are used to compute the order and number of
102 * the message register blocks. They are clearly very inefficent. However,
103 * they are called *only* a few times during device initialization.
104 */
105static unsigned int mpic_msgr_number_of_blocks(void)
106{
107 unsigned int count;
108 struct device_node *aliases;
109
110 count = 0;
111 aliases = of_find_node_by_name(NULL, "aliases");
112
113 if (aliases) {
114 char buf[32];
115
116 for (;;) {
117 snprintf(buf, sizeof(buf), "mpic-msgr-block%d", count);
118 if (!of_find_property(aliases, buf, NULL))
119 break;
120
121 count += 1;
122 }
123 }
124
125 return count;
126}
127
128static unsigned int mpic_msgr_number_of_registers(void)
129{
130 return mpic_msgr_number_of_blocks() * MPIC_MSGR_REGISTERS_PER_BLOCK;
131}
132
133static int mpic_msgr_block_number(struct device_node *node)
134{
135 struct device_node *aliases;
136 unsigned int index, number_of_blocks;
137 char buf[64];
138
139 number_of_blocks = mpic_msgr_number_of_blocks();
140 aliases = of_find_node_by_name(NULL, "aliases");
141 if (!aliases)
142 return -1;
143
144 for (index = 0; index < number_of_blocks; ++index) {
145 struct property *prop;
146
147 snprintf(buf, sizeof(buf), "mpic-msgr-block%d", index);
148 prop = of_find_property(aliases, buf, NULL);
149 if (node == of_find_node_by_path(prop->value))
150 break;
151 }
152
153 return index == number_of_blocks ? -1 : index;
154}
155
156/* The probe function for a single message register block.
157 */
158static int mpic_msgr_probe(struct platform_device *dev)
159{
160 void __iomem *msgr_block_addr;
161 int block_number;
162 struct resource rsrc;
163 unsigned int i;
164 unsigned int irq_index;
165 struct device_node *np = dev->dev.of_node;
166 unsigned int receive_mask;
167 const unsigned int *prop;
168
169 if (!np) {
170 dev_err(&dev->dev, "Device OF-Node is NULL");
171 return -EFAULT;
172 }
173
174 /* Allocate the message register array upon the first device
175 * registered.
176 */
177 if (!mpic_msgrs) {
178 mpic_msgr_count = mpic_msgr_number_of_registers();
179 dev_info(&dev->dev, "Found %d message registers\n",
180 mpic_msgr_count);
181
182 mpic_msgrs = kcalloc(mpic_msgr_count, sizeof(*mpic_msgrs),
183 GFP_KERNEL);
184 if (!mpic_msgrs) {
185 dev_err(&dev->dev,
186 "No memory for message register blocks\n");
187 return -ENOMEM;
188 }
189 }
190 dev_info(&dev->dev, "Of-device full name %pOF\n", np);
191
192 /* IO map the message register block. */
193 of_address_to_resource(np, 0, &rsrc);
194 msgr_block_addr = devm_ioremap(&dev->dev, rsrc.start, resource_size(&rsrc));
195 if (!msgr_block_addr) {
196 dev_err(&dev->dev, "Failed to iomap MPIC message registers");
197 return -EFAULT;
198 }
199
200 /* Ensure the block has a defined order. */
201 block_number = mpic_msgr_block_number(np);
202 if (block_number < 0) {
203 dev_err(&dev->dev,
204 "Failed to find message register block alias\n");
205 return -ENODEV;
206 }
207 dev_info(&dev->dev, "Setting up message register block %d\n",
208 block_number);
209
210 /* Grab the receive mask which specifies what registers can receive
211 * interrupts.
212 */
213 prop = of_get_property(np, "mpic-msgr-receive-mask", NULL);
214 receive_mask = (prop) ? *prop : 0xF;
215
216 /* Build up the appropriate message register data structures. */
217 for (i = 0, irq_index = 0; i < MPIC_MSGR_REGISTERS_PER_BLOCK; ++i) {
218 struct mpic_msgr *msgr;
219 unsigned int reg_number;
220
221 msgr = kzalloc(sizeof(struct mpic_msgr), GFP_KERNEL);
222 if (!msgr) {
223 dev_err(&dev->dev, "No memory for message register\n");
224 return -ENOMEM;
225 }
226
227 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
228 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
229 msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
230 msgr->in_use = MSGR_FREE;
231 msgr->num = i;
232 raw_spin_lock_init(&msgr->lock);
233
234 if (receive_mask & (1 << i)) {
235 msgr->irq = irq_of_parse_and_map(np, irq_index);
236 if (!msgr->irq) {
237 dev_err(&dev->dev,
238 "Missing interrupt specifier");
239 kfree(msgr);
240 return -EFAULT;
241 }
242 irq_index += 1;
243 } else {
244 msgr->irq = 0;
245 }
246
247 mpic_msgrs[reg_number] = msgr;
248 mpic_msgr_disable(msgr);
249 dev_info(&dev->dev, "Register %d initialized: irq %d\n",
250 reg_number, msgr->irq);
251
252 }
253
254 return 0;
255}
256
257static const struct of_device_id mpic_msgr_ids[] = {
258 {
259 .compatible = "fsl,mpic-v3.1-msgr",
260 .data = NULL,
261 },
262 {}
263};
264
265static struct platform_driver mpic_msgr_driver = {
266 .driver = {
267 .name = "mpic-msgr",
268 .of_match_table = mpic_msgr_ids,
269 },
270 .probe = mpic_msgr_probe,
271};
272
273static __init int mpic_msgr_init(void)
274{
275 return platform_driver_register(&mpic_msgr_driver);
276}
277subsys_initcall(mpic_msgr_init);