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1/*
2 * Device Tree Source for the Alt board
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12#include "r8a7794.dtsi"
13#include <dt-bindings/gpio/gpio.h>
14
15/ {
16 model = "Alt";
17 compatible = "renesas,alt", "renesas,r8a7794";
18
19 aliases {
20 serial0 = &scif2;
21 i2c9 = &gpioi2c1;
22 i2c10 = &gpioi2c4;
23 i2c11 = &i2chdmi;
24 i2c12 = &i2cexio4;
25 };
26
27 chosen {
28 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
29 stdout-path = "serial0:115200n8";
30 };
31
32 memory@40000000 {
33 device_type = "memory";
34 reg = <0 0x40000000 0 0x40000000>;
35 };
36
37 d3_3v: regulator-d3-3v {
38 compatible = "regulator-fixed";
39 regulator-name = "D3.3V";
40 regulator-min-microvolt = <3300000>;
41 regulator-max-microvolt = <3300000>;
42 regulator-boot-on;
43 regulator-always-on;
44 };
45
46 vcc_sdhi0: regulator-vcc-sdhi0 {
47 compatible = "regulator-fixed";
48
49 regulator-name = "SDHI0 Vcc";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
52
53 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
54 enable-active-high;
55 };
56
57 vccq_sdhi0: regulator-vccq-sdhi0 {
58 compatible = "regulator-gpio";
59
60 regulator-name = "SDHI0 VccQ";
61 regulator-min-microvolt = <1800000>;
62 regulator-max-microvolt = <3300000>;
63
64 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
65 gpios-states = <1>;
66 states = <3300000 1
67 1800000 0>;
68 };
69
70 vcc_sdhi1: regulator-vcc-sdhi1 {
71 compatible = "regulator-fixed";
72
73 regulator-name = "SDHI1 Vcc";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
76
77 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
78 enable-active-high;
79 };
80
81 vccq_sdhi1: regulator-vccq-sdhi1 {
82 compatible = "regulator-gpio";
83
84 regulator-name = "SDHI1 VccQ";
85 regulator-min-microvolt = <1800000>;
86 regulator-max-microvolt = <3300000>;
87
88 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
89 gpios-states = <1>;
90 states = <3300000 1
91 1800000 0>;
92 };
93
94 lbsc {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 };
98
99 vga-encoder {
100 compatible = "adi,adv7123";
101
102 ports {
103 #address-cells = <1>;
104 #size-cells = <0>;
105
106 port@0 {
107 reg = <0>;
108 adv7123_in: endpoint {
109 remote-endpoint = <&du_out_rgb1>;
110 };
111 };
112 port@1 {
113 reg = <1>;
114 adv7123_out: endpoint {
115 remote-endpoint = <&vga_in>;
116 };
117 };
118 };
119 };
120
121 vga {
122 compatible = "vga-connector";
123
124 port {
125 vga_in: endpoint {
126 remote-endpoint = <&adv7123_out>;
127 };
128 };
129 };
130
131 x2_clk: x2-clock {
132 compatible = "fixed-clock";
133 #clock-cells = <0>;
134 clock-frequency = <74250000>;
135 };
136
137 x13_clk: x13-clock {
138 compatible = "fixed-clock";
139 #clock-cells = <0>;
140 clock-frequency = <148500000>;
141 };
142
143 gpioi2c1: i2c-9 {
144 #address-cells = <1>;
145 #size-cells = <0>;
146 compatible = "i2c-gpio";
147 status = "disabled";
148 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
149 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
150 };
151
152 gpioi2c4: i2c-10 {
153 #address-cells = <1>;
154 #size-cells = <0>;
155 compatible = "i2c-gpio";
156 status = "disabled";
157 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
158 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
159 i2c-gpio,delay-us = <5>;
160 };
161
162 /*
163 * A fallback to GPIO is provided for I2C1.
164 */
165 i2chdmi: i2c-11 {
166 compatible = "i2c-demux-pinctrl";
167 i2c-parent = <&i2c1>, <&gpioi2c1>;
168 i2c-bus-name = "i2c-hdmi";
169 #address-cells = <1>;
170 #size-cells = <0>;
171
172 composite-in@20 {
173 compatible = "adi,adv7180";
174 reg = <0x20>;
175 remote = <&vin0>;
176
177 port {
178 adv7180: endpoint {
179 bus-width = <8>;
180 remote-endpoint = <&vin0ep>;
181 };
182 };
183 };
184 };
185
186 /*
187 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
188 * A fallback to GPIO is provided.
189 */
190 i2cexio4: i2c-14 {
191 compatible = "i2c-demux-pinctrl";
192 i2c-parent = <&i2c4>, <&gpioi2c4>;
193 i2c-bus-name = "i2c-exio4";
194 #address-cells = <1>;
195 #size-cells = <0>;
196 };
197};
198
199&du {
200 pinctrl-0 = <&du_pins>;
201 pinctrl-names = "default";
202 status = "okay";
203
204 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
205 <&x13_clk>, <&x2_clk>;
206 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
207
208 ports {
209 port@1 {
210 endpoint {
211 remote-endpoint = <&adv7123_in>;
212 };
213 };
214 };
215};
216
217&extal_clk {
218 clock-frequency = <20000000>;
219};
220
221&pfc {
222 pinctrl-0 = <&scif_clk_pins>;
223 pinctrl-names = "default";
224
225 du_pins: du {
226 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
227 function = "du1";
228 };
229
230 scif2_pins: scif2 {
231 groups = "scif2_data";
232 function = "scif2";
233 };
234
235 scif_clk_pins: scif_clk {
236 groups = "scif_clk";
237 function = "scif_clk";
238 };
239
240 ether_pins: ether {
241 groups = "eth_link", "eth_mdio", "eth_rmii";
242 function = "eth";
243 };
244
245 phy1_pins: phy1 {
246 groups = "intc_irq8";
247 function = "intc";
248 };
249
250 i2c1_pins: i2c1 {
251 groups = "i2c1";
252 function = "i2c1";
253 };
254
255 i2c4_pins: i2c4 {
256 groups = "i2c4";
257 function = "i2c4";
258 };
259
260 vin0_pins: vin0 {
261 groups = "vin0_data8", "vin0_clk";
262 function = "vin0";
263 };
264
265 mmcif0_pins: mmcif0 {
266 groups = "mmc_data8", "mmc_ctrl";
267 function = "mmc";
268 };
269
270 sdhi0_pins: sd0 {
271 groups = "sdhi0_data4", "sdhi0_ctrl";
272 function = "sdhi0";
273 power-source = <3300>;
274 };
275
276 sdhi0_pins_uhs: sd0_uhs {
277 groups = "sdhi0_data4", "sdhi0_ctrl";
278 function = "sdhi0";
279 power-source = <1800>;
280 };
281
282 sdhi1_pins: sd1 {
283 groups = "sdhi1_data4", "sdhi1_ctrl";
284 function = "sdhi1";
285 power-source = <3300>;
286 };
287
288 sdhi1_pins_uhs: sd1_uhs {
289 groups = "sdhi1_data4", "sdhi1_ctrl";
290 function = "sdhi1";
291 power-source = <1800>;
292 };
293};
294
295&cmt0 {
296 status = "okay";
297};
298
299&pfc {
300 qspi_pins: qspi {
301 groups = "qspi_ctrl", "qspi_data4";
302 function = "qspi";
303 };
304};
305
306ðer {
307 pinctrl-0 = <ðer_pins &phy1_pins>;
308 pinctrl-names = "default";
309
310 phy-handle = <&phy1>;
311 renesas,ether-link-active-low;
312 status = "okay";
313
314 phy1: ethernet-phy@1 {
315 reg = <1>;
316 interrupt-parent = <&irqc0>;
317 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
318 micrel,led-mode = <1>;
319 };
320};
321
322&mmcif0 {
323 pinctrl-0 = <&mmcif0_pins>;
324 pinctrl-names = "default";
325
326 vmmc-supply = <&d3_3v>;
327 vqmmc-supply = <&d3_3v>;
328 bus-width = <8>;
329 non-removable;
330 status = "okay";
331};
332
333&sdhi0 {
334 pinctrl-0 = <&sdhi0_pins>;
335 pinctrl-1 = <&sdhi0_pins_uhs>;
336 pinctrl-names = "default", "state_uhs";
337
338 vmmc-supply = <&vcc_sdhi0>;
339 vqmmc-supply = <&vccq_sdhi0>;
340 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
341 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
342 sd-uhs-sdr50;
343 sd-uhs-sdr104;
344 status = "okay";
345};
346
347&sdhi1 {
348 pinctrl-0 = <&sdhi1_pins>;
349 pinctrl-1 = <&sdhi1_pins_uhs>;
350 pinctrl-names = "default", "state_uhs";
351
352 vmmc-supply = <&vcc_sdhi1>;
353 vqmmc-supply = <&vccq_sdhi1>;
354 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
355 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
356 sd-uhs-sdr50;
357 status = "okay";
358};
359
360&i2c1 {
361 pinctrl-0 = <&i2c1_pins>;
362 pinctrl-names = "i2c-hdmi";
363
364 clock-frequency = <400000>;
365};
366
367&i2c4 {
368 pinctrl-0 = <&i2c4_pins>;
369 pinctrl-names = "i2c-exio4";
370};
371
372&vin0 {
373 status = "okay";
374 pinctrl-0 = <&vin0_pins>;
375 pinctrl-names = "default";
376
377 port {
378 #address-cells = <1>;
379 #size-cells = <0>;
380
381 vin0ep: endpoint {
382 remote-endpoint = <&adv7180>;
383 bus-width = <8>;
384 };
385 };
386};
387
388&scif2 {
389 pinctrl-0 = <&scif2_pins>;
390 pinctrl-names = "default";
391
392 status = "okay";
393};
394
395&scif_clk {
396 clock-frequency = <14745600>;
397};
398
399&qspi {
400 pinctrl-0 = <&qspi_pins>;
401 pinctrl-names = "default";
402
403 status = "okay";
404
405 flash@0 {
406 compatible = "spansion,s25fl512s", "jedec,spi-nor";
407 reg = <0>;
408 spi-max-frequency = <30000000>;
409 spi-tx-bus-width = <4>;
410 spi-rx-bus-width = <4>;
411 spi-cpol;
412 spi-cpha;
413 m25p,fast-read;
414
415 partitions {
416 compatible = "fixed-partitions";
417 #address-cells = <1>;
418 #size-cells = <1>;
419
420 partition@0 {
421 label = "loader";
422 reg = <0x00000000 0x00040000>;
423 read-only;
424 };
425 partition@40000 {
426 label = "system";
427 reg = <0x00040000 0x00040000>;
428 read-only;
429 };
430 partition@80000 {
431 label = "user";
432 reg = <0x00080000 0x03f80000>;
433 };
434 };
435 };
436};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Alt board
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 */
7
8/dts-v1/;
9#include "r8a7794.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/input/input.h>
12
13/ {
14 model = "Alt";
15 compatible = "renesas,alt", "renesas,r8a7794";
16
17 aliases {
18 serial0 = &scif2;
19 i2c9 = &gpioi2c1;
20 i2c10 = &gpioi2c4;
21 i2c11 = &i2chdmi;
22 i2c12 = &i2cexio4;
23 mmc0 = &mmcif0;
24 mmc1 = &sdhi0;
25 mmc2 = &sdhi1;
26 };
27
28 chosen {
29 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
30 stdout-path = "serial0:115200n8";
31 };
32
33 memory@40000000 {
34 device_type = "memory";
35 reg = <0 0x40000000 0 0x40000000>;
36 };
37
38 d3_3v: regulator-d3-3v {
39 compatible = "regulator-fixed";
40 regulator-name = "D3.3V";
41 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <3300000>;
43 regulator-boot-on;
44 regulator-always-on;
45 };
46
47 vcc_sdhi0: regulator-vcc-sdhi0 {
48 compatible = "regulator-fixed";
49
50 regulator-name = "SDHI0 Vcc";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53
54 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
55 enable-active-high;
56 };
57
58 vccq_sdhi0: regulator-vccq-sdhi0 {
59 compatible = "regulator-gpio";
60
61 regulator-name = "SDHI0 VccQ";
62 regulator-min-microvolt = <1800000>;
63 regulator-max-microvolt = <3300000>;
64
65 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
66 gpios-states = <1>;
67 states = <3300000 1>, <1800000 0>;
68 };
69
70 vcc_sdhi1: regulator-vcc-sdhi1 {
71 compatible = "regulator-fixed";
72
73 regulator-name = "SDHI1 Vcc";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
76
77 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
78 enable-active-high;
79 };
80
81 vccq_sdhi1: regulator-vccq-sdhi1 {
82 compatible = "regulator-gpio";
83
84 regulator-name = "SDHI1 VccQ";
85 regulator-min-microvolt = <1800000>;
86 regulator-max-microvolt = <3300000>;
87
88 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
89 gpios-states = <1>;
90 states = <3300000 1>, <1800000 0>;
91 };
92
93 lbsc {
94 #address-cells = <1>;
95 #size-cells = <1>;
96 };
97
98 keyboard {
99 compatible = "gpio-keys";
100
101 pinctrl-0 = <&keyboard_pins>;
102 pinctrl-names = "default";
103
104 one {
105 linux,code = <KEY_1>;
106 label = "SW2-1";
107 wakeup-source;
108 debounce-interval = <20>;
109 gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
110 };
111 two {
112 linux,code = <KEY_2>;
113 label = "SW2-2";
114 wakeup-source;
115 debounce-interval = <20>;
116 gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
117 };
118 three {
119 linux,code = <KEY_3>;
120 label = "SW2-3";
121 wakeup-source;
122 debounce-interval = <20>;
123 gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
124 };
125 four {
126 linux,code = <KEY_4>;
127 label = "SW2-4";
128 wakeup-source;
129 debounce-interval = <20>;
130 gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
131 };
132 };
133
134 vga-encoder {
135 compatible = "adi,adv7123";
136
137 ports {
138 #address-cells = <1>;
139 #size-cells = <0>;
140
141 port@0 {
142 reg = <0>;
143 adv7123_in: endpoint {
144 remote-endpoint = <&du_out_rgb1>;
145 };
146 };
147 port@1 {
148 reg = <1>;
149 adv7123_out: endpoint {
150 remote-endpoint = <&vga_in>;
151 };
152 };
153 };
154 };
155
156 vga {
157 compatible = "vga-connector";
158
159 port {
160 vga_in: endpoint {
161 remote-endpoint = <&adv7123_out>;
162 };
163 };
164 };
165
166 x2_clk: x2-clock {
167 compatible = "fixed-clock";
168 #clock-cells = <0>;
169 clock-frequency = <74250000>;
170 };
171
172 x13_clk: x13-clock {
173 compatible = "fixed-clock";
174 #clock-cells = <0>;
175 clock-frequency = <148500000>;
176 };
177
178 gpioi2c1: i2c-9 {
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "i2c-gpio";
182 status = "disabled";
183 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
184 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
185 };
186
187 gpioi2c4: i2c-10 {
188 #address-cells = <1>;
189 #size-cells = <0>;
190 compatible = "i2c-gpio";
191 status = "disabled";
192 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
193 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
194 i2c-gpio,delay-us = <5>;
195 };
196
197 /*
198 * A fallback to GPIO is provided for I2C1.
199 */
200 i2chdmi: i2c-11 {
201 compatible = "i2c-demux-pinctrl";
202 i2c-parent = <&i2c1>, <&gpioi2c1>;
203 i2c-bus-name = "i2c-hdmi";
204 #address-cells = <1>;
205 #size-cells = <0>;
206
207 composite-in@20 {
208 compatible = "adi,adv7180";
209 reg = <0x20>;
210
211 port {
212 adv7180: endpoint {
213 bus-width = <8>;
214 remote-endpoint = <&vin0ep>;
215 };
216 };
217 };
218
219 eeprom@50 {
220 compatible = "renesas,r1ex24002", "atmel,24c02";
221 reg = <0x50>;
222 pagesize = <16>;
223 };
224 };
225
226 /*
227 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
228 * A fallback to GPIO is provided.
229 */
230 i2cexio4: i2c-14 {
231 compatible = "i2c-demux-pinctrl";
232 i2c-parent = <&i2c4>, <&gpioi2c4>;
233 i2c-bus-name = "i2c-exio4";
234 #address-cells = <1>;
235 #size-cells = <0>;
236 };
237};
238
239&pci0 {
240 status = "okay";
241 pinctrl-0 = <&usb0_pins>;
242 pinctrl-names = "default";
243};
244
245&pci1 {
246 status = "okay";
247 pinctrl-0 = <&usb1_pins>;
248 pinctrl-names = "default";
249};
250
251&usbphy {
252 status = "okay";
253};
254
255&du {
256 pinctrl-0 = <&du_pins>;
257 pinctrl-names = "default";
258 status = "okay";
259
260 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
261 <&x13_clk>, <&x2_clk>;
262 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
263
264 ports {
265 port@1 {
266 endpoint {
267 remote-endpoint = <&adv7123_in>;
268 };
269 };
270 };
271};
272
273&extal_clk {
274 clock-frequency = <20000000>;
275};
276
277&pfc {
278 pinctrl-0 = <&scif_clk_pins>;
279 pinctrl-names = "default";
280
281 du_pins: du {
282 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
283 function = "du1";
284 };
285
286 scif2_pins: scif2 {
287 groups = "scif2_data";
288 function = "scif2";
289 };
290
291 scif_clk_pins: scif_clk {
292 groups = "scif_clk";
293 function = "scif_clk";
294 };
295
296 ether_pins: ether {
297 groups = "eth_link", "eth_mdio", "eth_rmii";
298 function = "eth";
299 };
300
301 phy1_pins: phy1 {
302 groups = "intc_irq8";
303 function = "intc";
304 };
305
306 i2c1_pins: i2c1 {
307 groups = "i2c1";
308 function = "i2c1";
309 };
310
311 i2c4_pins: i2c4 {
312 groups = "i2c4";
313 function = "i2c4";
314 };
315
316 vin0_pins: vin0 {
317 groups = "vin0_data8", "vin0_clk";
318 function = "vin0";
319 };
320
321 mmcif0_pins: mmcif0 {
322 groups = "mmc_data8", "mmc_ctrl";
323 function = "mmc";
324 };
325
326 sdhi0_pins: sd0 {
327 groups = "sdhi0_data4", "sdhi0_ctrl";
328 function = "sdhi0";
329 power-source = <3300>;
330 };
331
332 sdhi0_pins_uhs: sd0_uhs {
333 groups = "sdhi0_data4", "sdhi0_ctrl";
334 function = "sdhi0";
335 power-source = <1800>;
336 };
337
338 sdhi1_pins: sd1 {
339 groups = "sdhi1_data4", "sdhi1_ctrl";
340 function = "sdhi1";
341 power-source = <3300>;
342 };
343
344 sdhi1_pins_uhs: sd1_uhs {
345 groups = "sdhi1_data4", "sdhi1_ctrl";
346 function = "sdhi1";
347 power-source = <1800>;
348 };
349
350 usb0_pins: usb0 {
351 groups = "usb0";
352 function = "usb0";
353 };
354
355 usb1_pins: usb1 {
356 groups = "usb1";
357 function = "usb1";
358 };
359
360 keyboard_pins: keyboard {
361 pins = "GP_3_9", "GP_3_10", "GP_3_11", "GP_3_12";
362 bias-pull-up;
363 };
364};
365
366&cmt0 {
367 status = "okay";
368};
369
370&pfc {
371 qspi_pins: qspi {
372 groups = "qspi_ctrl", "qspi_data4";
373 function = "qspi";
374 };
375};
376
377ðer {
378 pinctrl-0 = <ðer_pins>, <&phy1_pins>;
379 pinctrl-names = "default";
380
381 phy-handle = <&phy1>;
382 renesas,ether-link-active-low;
383 status = "okay";
384
385 phy1: ethernet-phy@1 {
386 reg = <1>;
387 interrupt-parent = <&irqc0>;
388 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
389 micrel,led-mode = <1>;
390 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
391 };
392};
393
394&mmcif0 {
395 pinctrl-0 = <&mmcif0_pins>;
396 pinctrl-names = "default";
397
398 vmmc-supply = <&d3_3v>;
399 vqmmc-supply = <&d3_3v>;
400 bus-width = <8>;
401 non-removable;
402 status = "okay";
403};
404
405&rwdt {
406 timeout-sec = <60>;
407 status = "okay";
408};
409
410&sdhi0 {
411 pinctrl-0 = <&sdhi0_pins>;
412 pinctrl-1 = <&sdhi0_pins_uhs>;
413 pinctrl-names = "default", "state_uhs";
414
415 vmmc-supply = <&vcc_sdhi0>;
416 vqmmc-supply = <&vccq_sdhi0>;
417 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
418 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
419 sd-uhs-sdr50;
420 sd-uhs-sdr104;
421 status = "okay";
422};
423
424&sdhi1 {
425 pinctrl-0 = <&sdhi1_pins>;
426 pinctrl-1 = <&sdhi1_pins_uhs>;
427 pinctrl-names = "default", "state_uhs";
428
429 vmmc-supply = <&vcc_sdhi1>;
430 vqmmc-supply = <&vccq_sdhi1>;
431 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
432 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
433 sd-uhs-sdr50;
434 status = "okay";
435};
436
437&i2c1 {
438 pinctrl-0 = <&i2c1_pins>;
439 pinctrl-names = "i2c-hdmi";
440
441 clock-frequency = <400000>;
442};
443
444&i2c4 {
445 pinctrl-0 = <&i2c4_pins>;
446 pinctrl-names = "i2c-exio4";
447};
448
449&i2c7 {
450 status = "okay";
451 clock-frequency = <100000>;
452
453 pmic@58 {
454 compatible = "dlg,da9063";
455 reg = <0x58>;
456 interrupt-parent = <&gpio3>;
457 interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
458 interrupt-controller;
459
460 rtc {
461 compatible = "dlg,da9063-rtc";
462 };
463
464 wdt {
465 compatible = "dlg,da9063-watchdog";
466 };
467 };
468};
469
470&vin0 {
471 status = "okay";
472 pinctrl-0 = <&vin0_pins>;
473 pinctrl-names = "default";
474
475 port {
476 vin0ep: endpoint {
477 remote-endpoint = <&adv7180>;
478 bus-width = <8>;
479 };
480 };
481};
482
483&scif2 {
484 pinctrl-0 = <&scif2_pins>;
485 pinctrl-names = "default";
486
487 status = "okay";
488};
489
490&scif_clk {
491 clock-frequency = <14745600>;
492};
493
494&qspi {
495 pinctrl-0 = <&qspi_pins>;
496 pinctrl-names = "default";
497
498 status = "okay";
499
500 flash@0 {
501 compatible = "spansion,s25fl512s", "jedec,spi-nor";
502 reg = <0>;
503 spi-max-frequency = <30000000>;
504 spi-tx-bus-width = <4>;
505 spi-rx-bus-width = <4>;
506 spi-cpol;
507 spi-cpha;
508 m25p,fast-read;
509
510 partitions {
511 compatible = "fixed-partitions";
512 #address-cells = <1>;
513 #size-cells = <1>;
514
515 partition@0 {
516 label = "loader";
517 reg = <0x00000000 0x00040000>;
518 read-only;
519 };
520 partition@40000 {
521 label = "system";
522 reg = <0x00040000 0x00040000>;
523 read-only;
524 };
525 partition@80000 {
526 label = "user";
527 reg = <0x00080000 0x03f80000>;
528 };
529 };
530 };
531};