1/*
 2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 3 *
 4 * This program is free software; you can redistribute it and/or modify
 5 * it under the terms of the GNU General Public License version 2 as
 6 * published by the Free Software Foundation.
 7 */
 8/dts-v1/;
 9
10#include "omap2430.dtsi"
11
12/ {
13	model = "TI OMAP2430 SDP";
14	compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2";
15
16	memory@80000000 {
17		device_type = "memory";
18		reg = <0x80000000 0x8000000>; /* 128 MB */
19	};
20};
21
22&i2c2 {
23	clock-frequency = <100000>;
24
25	twl: twl@48 {
26		reg = <0x48>;
27		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
28	};
29};
30
31#include "twl4030.dtsi"
32
33&mmc1 {
34	vmmc-supply = <&vmmc1>;
35	bus-width = <4>;
36};
37
38&gpmc {
39	ranges = <5 0 0x08000000 0x01000000>;
40	ethernet@gpmc {
41		compatible = "smsc,lan91c94";
42		interrupt-parent = <&gpio5>;
43		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;	/* gpio149 */
44		reg = <5 0x300 0xf>;
45		bank-width = <2>;
46		gpmc,sync-clk-ps = <0>;
47		gpmc,mux-add-data = <2>;
48		gpmc,device-width = <1>;
49		gpmc,cycle2cycle-samecsen = <1>;
50		gpmc,cycle2cycle-diffcsen = <1>;
51		gpmc,cs-on-ns = <6>;
52		gpmc,cs-rd-off-ns = <187>;
53		gpmc,cs-wr-off-ns = <187>;
54		gpmc,adv-on-ns = <18>;
55		gpmc,adv-rd-off-ns = <48>;
56		gpmc,adv-wr-off-ns = <48>;
57		gpmc,oe-on-ns = <60>;
58		gpmc,oe-off-ns = <169>;
59		gpmc,we-on-ns = <66>;
60		gpmc,we-off-ns = <169>;
61		gpmc,rd-cycle-ns = <187>;
62		gpmc,wr-cycle-ns = <187>;
63		gpmc,access-ns = <187>;
64		gpmc,page-burst-access-ns = <24>;
65		gpmc,bus-turnaround-ns = <24>;
66		gpmc,cycle2cycle-delay-ns = <24>;
67		gpmc,wait-monitoring-ns = <0>;
68		gpmc,clk-activation-ns = <0>;
69		gpmc,wr-data-mux-bus-ns = <0>;
70		gpmc,wr-access-ns = <0>;
71	};
72};
73

 1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 
 
 
 
 4 */
 5/dts-v1/;
 6
 7#include "omap2430.dtsi"
 8
 9/ {
10	model = "TI OMAP2430 SDP";
11	compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2";
12
13	memory@80000000 {
14		device_type = "memory";
15		reg = <0x80000000 0x8000000>; /* 128 MB */
16	};
17};
18
19&i2c2 {
20	clock-frequency = <100000>;
21
22	twl: twl@48 {
23		reg = <0x48>;
24		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
25	};
26};
27
28#include "twl4030.dtsi"
29
30&mmc1 {
31	vmmc-supply = <&vmmc1>;
32	bus-width = <4>;
33};
34
35&gpmc {
36	ranges = <5 0 0x08000000 0x01000000>;
37	ethernet@gpmc {
38		compatible = "smsc,lan91c94";
39		interrupt-parent = <&gpio5>;
40		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;	/* gpio149 */
41		reg = <5 0x300 0xf>;
42		bank-width = <2>;
43		gpmc,sync-clk-ps = <0>;
44		gpmc,mux-add-data = <2>;
45		gpmc,device-width = <1>;
46		gpmc,cycle2cycle-samecsen = <1>;
47		gpmc,cycle2cycle-diffcsen = <1>;
48		gpmc,cs-on-ns = <6>;
49		gpmc,cs-rd-off-ns = <187>;
50		gpmc,cs-wr-off-ns = <187>;
51		gpmc,adv-on-ns = <18>;
52		gpmc,adv-rd-off-ns = <48>;
53		gpmc,adv-wr-off-ns = <48>;
54		gpmc,oe-on-ns = <60>;
55		gpmc,oe-off-ns = <169>;
56		gpmc,we-on-ns = <66>;
57		gpmc,we-off-ns = <169>;
58		gpmc,rd-cycle-ns = <187>;
59		gpmc,wr-cycle-ns = <187>;
60		gpmc,access-ns = <187>;
61		gpmc,page-burst-access-ns = <24>;
62		gpmc,bus-turnaround-ns = <24>;
63		gpmc,cycle2cycle-delay-ns = <24>;
64		gpmc,wait-monitoring-ns = <0>;
65		gpmc,clk-activation-ns = <0>;
66		gpmc,wr-data-mux-bus-ns = <0>;
67		gpmc,wr-access-ns = <0>;
68	};
69};
70