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1/*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pinctrl/dm814x.h>
9
10/ {
11 compatible = "ti,dm814";
12 interrupt-parent = <&intc>;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 chosen { };
16
17 aliases {
18 i2c0 = &i2c1;
19 i2c1 = &i2c2;
20 serial0 = &uart1;
21 serial1 = &uart2;
22 serial2 = &uart3;
23 ethernet0 = &cpsw_emac0;
24 ethernet1 = &cpsw_emac1;
25 usb0 = &usb0;
26 usb1 = &usb1;
27 phy0 = &usb0_phy;
28 phy1 = &usb1_phy;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34 cpu@0 {
35 compatible = "arm,cortex-a8";
36 device_type = "cpu";
37 reg = <0>;
38 };
39 };
40
41 pmu {
42 compatible = "arm,cortex-a8-pmu";
43 interrupts = <3>;
44 };
45
46 /*
47 * The soc node represents the soc top level view. It is used for IPs
48 * that are not memory mapped in the MPU view or for the MPU itself.
49 */
50 soc {
51 compatible = "ti,omap-infra";
52 mpu {
53 compatible = "ti,omap3-mpu";
54 ti,hwmods = "mpu";
55 };
56 };
57
58 ocp {
59 compatible = "simple-bus";
60 #address-cells = <1>;
61 #size-cells = <1>;
62 ranges;
63 ti,hwmods = "l3_main";
64
65 usb: usb@47400000 {
66 compatible = "ti,am33xx-usb";
67 reg = <0x47400000 0x1000>;
68 ranges;
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ti,hwmods = "usb_otg_hs";
72
73 usb0_phy: usb-phy@47401300 {
74 compatible = "ti,am335x-usb-phy";
75 reg = <0x47401300 0x100>;
76 reg-names = "phy";
77 ti,ctrl_mod = <&usb_ctrl_mod>;
78 #phy-cells = <0>;
79 };
80
81 usb0: usb@47401000 {
82 compatible = "ti,musb-am33xx";
83 reg = <0x47401400 0x400
84 0x47401000 0x200>;
85 reg-names = "mc", "control";
86
87 interrupts = <18>;
88 interrupt-names = "mc";
89 dr_mode = "otg";
90 mentor,multipoint = <1>;
91 mentor,num-eps = <16>;
92 mentor,ram-bits = <12>;
93 mentor,power = <500>;
94 phys = <&usb0_phy>;
95
96 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
97 &cppi41dma 2 0 &cppi41dma 3 0
98 &cppi41dma 4 0 &cppi41dma 5 0
99 &cppi41dma 6 0 &cppi41dma 7 0
100 &cppi41dma 8 0 &cppi41dma 9 0
101 &cppi41dma 10 0 &cppi41dma 11 0
102 &cppi41dma 12 0 &cppi41dma 13 0
103 &cppi41dma 14 0 &cppi41dma 0 1
104 &cppi41dma 1 1 &cppi41dma 2 1
105 &cppi41dma 3 1 &cppi41dma 4 1
106 &cppi41dma 5 1 &cppi41dma 6 1
107 &cppi41dma 7 1 &cppi41dma 8 1
108 &cppi41dma 9 1 &cppi41dma 10 1
109 &cppi41dma 11 1 &cppi41dma 12 1
110 &cppi41dma 13 1 &cppi41dma 14 1>;
111 dma-names =
112 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
113 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
114 "rx14", "rx15",
115 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
116 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
117 "tx14", "tx15";
118 };
119
120 usb1: usb@47401800 {
121 compatible = "ti,musb-am33xx";
122 reg = <0x47401c00 0x400
123 0x47401800 0x200>;
124 reg-names = "mc", "control";
125 interrupts = <19>;
126 interrupt-names = "mc";
127 dr_mode = "otg";
128 mentor,multipoint = <1>;
129 mentor,num-eps = <16>;
130 mentor,ram-bits = <12>;
131 mentor,power = <500>;
132 phys = <&usb1_phy>;
133
134 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
135 &cppi41dma 17 0 &cppi41dma 18 0
136 &cppi41dma 19 0 &cppi41dma 20 0
137 &cppi41dma 21 0 &cppi41dma 22 0
138 &cppi41dma 23 0 &cppi41dma 24 0
139 &cppi41dma 25 0 &cppi41dma 26 0
140 &cppi41dma 27 0 &cppi41dma 28 0
141 &cppi41dma 29 0 &cppi41dma 15 1
142 &cppi41dma 16 1 &cppi41dma 17 1
143 &cppi41dma 18 1 &cppi41dma 19 1
144 &cppi41dma 20 1 &cppi41dma 21 1
145 &cppi41dma 22 1 &cppi41dma 23 1
146 &cppi41dma 24 1 &cppi41dma 25 1
147 &cppi41dma 26 1 &cppi41dma 27 1
148 &cppi41dma 28 1 &cppi41dma 29 1>;
149 dma-names =
150 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
151 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
152 "rx14", "rx15",
153 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
154 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
155 "tx14", "tx15";
156 };
157
158 cppi41dma: dma-controller@47402000 {
159 compatible = "ti,am3359-cppi41";
160 reg = <0x47400000 0x1000
161 0x47402000 0x1000
162 0x47403000 0x1000
163 0x47404000 0x4000>;
164 reg-names = "glue", "controller", "scheduler", "queuemgr";
165 interrupts = <17>;
166 interrupt-names = "glue";
167 #dma-cells = <2>;
168 #dma-channels = <30>;
169 #dma-requests = <256>;
170 };
171 };
172
173 /*
174 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
175 * It shows the module target agent registers though, so the
176 * actual device is typically 0x1000 before the target agent
177 * except in cases where the module is larger than 0x1000.
178 */
179 l4ls: l4ls@48000000 {
180 compatible = "ti,dm814-l4ls", "simple-bus";
181 #address-cells = <1>;
182 #size-cells = <1>;
183 ranges = <0 0x48000000 0x2000000>;
184
185 i2c1: i2c@28000 {
186 compatible = "ti,omap4-i2c";
187 #address-cells = <1>;
188 #size-cells = <0>;
189 ti,hwmods = "i2c1";
190 reg = <0x28000 0x1000>;
191 interrupts = <70>;
192 };
193
194 elm: elm@80000 {
195 compatible = "ti,814-elm";
196 ti,hwmods = "elm";
197 reg = <0x80000 0x2000>;
198 interrupts = <4>;
199 };
200
201 gpio1: gpio@32000 {
202 compatible = "ti,omap4-gpio";
203 ti,hwmods = "gpio1";
204 ti,gpio-always-on;
205 reg = <0x32000 0x2000>;
206 interrupts = <96>;
207 gpio-controller;
208 #gpio-cells = <2>;
209 interrupt-controller;
210 #interrupt-cells = <2>;
211 };
212
213 gpio2: gpio@4c000 {
214 compatible = "ti,omap4-gpio";
215 ti,hwmods = "gpio2";
216 ti,gpio-always-on;
217 reg = <0x4c000 0x2000>;
218 interrupts = <98>;
219 gpio-controller;
220 #gpio-cells = <2>;
221 interrupt-controller;
222 #interrupt-cells = <2>;
223 };
224
225 i2c2: i2c@2a000 {
226 compatible = "ti,omap4-i2c";
227 #address-cells = <1>;
228 #size-cells = <0>;
229 ti,hwmods = "i2c2";
230 reg = <0x2a000 0x1000>;
231 interrupts = <71>;
232 };
233
234 mcspi1: spi@30000 {
235 compatible = "ti,omap4-mcspi";
236 reg = <0x30000 0x1000>;
237 #address-cells = <1>;
238 #size-cells = <0>;
239 interrupts = <65>;
240 ti,spi-num-cs = <4>;
241 ti,hwmods = "mcspi1";
242 dmas = <&edma 16 0 &edma 17 0
243 &edma 18 0 &edma 19 0>;
244 dma-names = "tx0", "rx0", "tx1", "rx1";
245 };
246
247 timer1: timer@2e000 {
248 compatible = "ti,dm814-timer";
249 reg = <0x2e000 0x2000>;
250 interrupts = <67>;
251 ti,hwmods = "timer1";
252 ti,timer-alwon;
253 clocks = <&timer1_fck>;
254 clock-names = "fck";
255 };
256
257 uart1: uart@20000 {
258 compatible = "ti,am3352-uart", "ti,omap3-uart";
259 ti,hwmods = "uart1";
260 reg = <0x20000 0x2000>;
261 clock-frequency = <48000000>;
262 interrupts = <72>;
263 dmas = <&edma 26 0 &edma 27 0>;
264 dma-names = "tx", "rx";
265 };
266
267 uart2: uart@22000 {
268 compatible = "ti,am3352-uart", "ti,omap3-uart";
269 ti,hwmods = "uart2";
270 reg = <0x22000 0x2000>;
271 clock-frequency = <48000000>;
272 interrupts = <73>;
273 dmas = <&edma 28 0 &edma 29 0>;
274 dma-names = "tx", "rx";
275 };
276
277 uart3: uart@24000 {
278 compatible = "ti,am3352-uart", "ti,omap3-uart";
279 ti,hwmods = "uart3";
280 reg = <0x24000 0x2000>;
281 clock-frequency = <48000000>;
282 interrupts = <74>;
283 dmas = <&edma 30 0 &edma 31 0>;
284 dma-names = "tx", "rx";
285 };
286
287 timer2: timer@40000 {
288 compatible = "ti,dm814-timer";
289 reg = <0x40000 0x2000>;
290 interrupts = <68>;
291 ti,hwmods = "timer2";
292 clocks = <&timer2_fck>;
293 clock-names = "fck";
294 };
295
296 timer3: timer@42000 {
297 compatible = "ti,dm814-timer";
298 reg = <0x42000 0x2000>;
299 interrupts = <69>;
300 ti,hwmods = "timer3";
301 };
302
303 mmc1: mmc@60000 {
304 compatible = "ti,omap4-hsmmc";
305 ti,hwmods = "mmc1";
306 dmas = <&edma 24 0
307 &edma 25 0>;
308 dma-names = "tx", "rx";
309 interrupts = <64>;
310 interrupt-parent = <&intc>;
311 reg = <0x60000 0x1000>;
312 };
313
314 rtc: rtc@c0000 {
315 compatible = "ti,am3352-rtc", "ti,da830-rtc";
316 reg = <0xc0000 0x1000>;
317 interrupts = <75 76>;
318 ti,hwmods = "rtc";
319 };
320
321 mmc2: mmc@1d8000 {
322 compatible = "ti,omap4-hsmmc";
323 ti,hwmods = "mmc2";
324 dmas = <&edma 2 0
325 &edma 3 0>;
326 dma-names = "tx", "rx";
327 interrupts = <28>;
328 interrupt-parent = <&intc>;
329 reg = <0x1d8000 0x1000>;
330 };
331
332 control: control@140000 {
333 compatible = "ti,dm814-scm", "simple-bus";
334 reg = <0x140000 0x20000>;
335 #address-cells = <1>;
336 #size-cells = <1>;
337 ranges = <0 0x140000 0x20000>;
338
339 scm_conf: scm_conf@0 {
340 compatible = "syscon", "simple-bus";
341 reg = <0x0 0x800>;
342 #address-cells = <1>;
343 #size-cells = <1>;
344 ranges = <0 0 0x800>;
345
346 scm_clocks: clocks {
347 #address-cells = <1>;
348 #size-cells = <0>;
349 };
350
351 scm_clockdomains: clockdomains {
352 };
353 };
354
355 usb_ctrl_mod: control@620 {
356 compatible = "ti,am335x-usb-ctrl-module";
357 reg = <0x620 0x10
358 0x648 0x4>;
359 reg-names = "phy_ctrl", "wakeup";
360 };
361
362 edma_xbar: dma-router@f90 {
363 compatible = "ti,am335x-edma-crossbar";
364 reg = <0xf90 0x40>;
365 #dma-cells = <3>;
366 dma-requests = <32>;
367 dma-masters = <&edma>;
368 };
369
370 /*
371 * Note that silicon revision 2.1 and older
372 * require input enabled (bit 18 set) for all
373 * 3.3V I/Os to avoid cumulative hardware damage.
374 * For more info, see errata advisory 2.1.87.
375 * We leave bit 18 out of function-mask and rely
376 * on the bootloader for it.
377 */
378 pincntl: pinmux@800 {
379 compatible = "pinctrl-single";
380 reg = <0x800 0x438>;
381 #address-cells = <1>;
382 #size-cells = <0>;
383 #pinctrl-cells = <1>;
384 pinctrl-single,register-width = <32>;
385 pinctrl-single,function-mask = <0x307ff>;
386 };
387
388 usb1_phy: usb-phy@1b00 {
389 compatible = "ti,am335x-usb-phy";
390 reg = <0x1b00 0x100>;
391 reg-names = "phy";
392 ti,ctrl_mod = <&usb_ctrl_mod>;
393 #phy-cells = <0>;
394 };
395 };
396
397 prcm: prcm@180000 {
398 compatible = "ti,dm814-prcm", "simple-bus";
399 reg = <0x180000 0x2000>;
400 #address-cells = <1>;
401 #size-cells = <1>;
402 ranges = <0 0x180000 0x2000>;
403
404 prcm_clocks: clocks {
405 #address-cells = <1>;
406 #size-cells = <0>;
407 };
408
409 prcm_clockdomains: clockdomains {
410 };
411 };
412
413 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
414 pllss: pllss@1c5000 {
415 compatible = "ti,dm814-pllss", "simple-bus";
416 reg = <0x1c5000 0x1000>;
417 #address-cells = <1>;
418 #size-cells = <1>;
419 ranges = <0 0x1c5000 0x1000>;
420
421 pllss_clocks: clocks {
422 #address-cells = <1>;
423 #size-cells = <0>;
424 };
425
426 pllss_clockdomains: clockdomains {
427 };
428 };
429
430 wdt1: wdt@1c7000 {
431 compatible = "ti,omap3-wdt";
432 ti,hwmods = "wd_timer";
433 reg = <0x1c7000 0x1000>;
434 interrupts = <91>;
435 };
436 };
437
438 intc: interrupt-controller@48200000 {
439 compatible = "ti,dm814-intc";
440 interrupt-controller;
441 #interrupt-cells = <1>;
442 reg = <0x48200000 0x1000>;
443 };
444
445 /* Board must configure evtmux with edma_xbar for EDMA */
446 mmc3: mmc@47810000 {
447 compatible = "ti,omap4-hsmmc";
448 ti,hwmods = "mmc3";
449 interrupts = <29>;
450 interrupt-parent = <&intc>;
451 reg = <0x47810000 0x1000>;
452 };
453
454 edma: edma@49000000 {
455 compatible = "ti,edma3-tpcc";
456 ti,hwmods = "tpcc";
457 reg = <0x49000000 0x10000>;
458 reg-names = "edma3_cc";
459 interrupts = <12 13 14>;
460 interrupt-names = "edma3_ccint", "edma3_mperr",
461 "edma3_ccerrint";
462 dma-requests = <64>;
463 #dma-cells = <2>;
464
465 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
466 <&edma_tptc2 3>, <&edma_tptc3 0>;
467
468 ti,edma-memcpy-channels = <20 21>;
469 };
470
471 edma_tptc0: tptc@49800000 {
472 compatible = "ti,edma3-tptc";
473 ti,hwmods = "tptc0";
474 reg = <0x49800000 0x100000>;
475 interrupts = <112>;
476 interrupt-names = "edma3_tcerrint";
477 };
478
479 edma_tptc1: tptc@49900000 {
480 compatible = "ti,edma3-tptc";
481 ti,hwmods = "tptc1";
482 reg = <0x49900000 0x100000>;
483 interrupts = <113>;
484 interrupt-names = "edma3_tcerrint";
485 };
486
487 edma_tptc2: tptc@49a00000 {
488 compatible = "ti,edma3-tptc";
489 ti,hwmods = "tptc2";
490 reg = <0x49a00000 0x100000>;
491 interrupts = <114>;
492 interrupt-names = "edma3_tcerrint";
493 };
494
495 edma_tptc3: tptc@49b00000 {
496 compatible = "ti,edma3-tptc";
497 ti,hwmods = "tptc3";
498 reg = <0x49b00000 0x100000>;
499 interrupts = <115>;
500 interrupt-names = "edma3_tcerrint";
501 };
502
503 /* See TRM "Table 1-318. L4HS Instance Summary" */
504 l4hs: l4hs@4a000000 {
505 compatible = "ti,dm814-l4hs", "simple-bus";
506 #address-cells = <1>;
507 #size-cells = <1>;
508 ranges = <0 0x4a000000 0x1b4040>;
509 };
510
511 /* REVISIT: Move to live under l4hs once driver is fixed */
512 mac: ethernet@4a100000 {
513 compatible = "ti,cpsw";
514 ti,hwmods = "cpgmac0";
515 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
516 clock-names = "fck", "cpts";
517 cpdma_channels = <8>;
518 ale_entries = <1024>;
519 bd_ram_size = <0x2000>;
520 mac_control = <0x20>;
521 slaves = <2>;
522 active_slave = <0>;
523 cpts_clock_mult = <0x80000000>;
524 cpts_clock_shift = <29>;
525 reg = <0x4a100000 0x800
526 0x4a100900 0x100>;
527 #address-cells = <1>;
528 #size-cells = <1>;
529 interrupt-parent = <&intc>;
530 /*
531 * c0_rx_thresh_pend
532 * c0_rx_pend
533 * c0_tx_pend
534 * c0_misc_pend
535 */
536 interrupts = <40 41 42 43>;
537 ranges;
538 syscon = <&scm_conf>;
539
540 davinci_mdio: mdio@4a100800 {
541 compatible = "ti,davinci_mdio";
542 #address-cells = <1>;
543 #size-cells = <0>;
544 ti,hwmods = "davinci_mdio";
545 bus_freq = <1000000>;
546 reg = <0x4a100800 0x100>;
547 };
548
549 cpsw_emac0: slave@4a100200 {
550 /* Filled in by U-Boot */
551 mac-address = [ 00 00 00 00 00 00 ];
552 };
553
554 cpsw_emac1: slave@4a100300 {
555 /* Filled in by U-Boot */
556 mac-address = [ 00 00 00 00 00 00 ];
557 };
558
559 phy_sel: cpsw-phy-sel@48140650 {
560 compatible = "ti,am3352-cpsw-phy-sel";
561 reg= <0x48140650 0x4>;
562 reg-names = "gmii-sel";
563 };
564 };
565
566 gpmc: gpmc@50000000 {
567 compatible = "ti,am3352-gpmc";
568 ti,hwmods = "gpmc";
569 ti,no-idle-on-init;
570 reg = <0x50000000 0x2000>;
571 interrupts = <100>;
572 gpmc,num-cs = <7>;
573 gpmc,num-waitpins = <2>;
574 #address-cells = <2>;
575 #size-cells = <1>;
576 interrupt-controller;
577 #interrupt-cells = <2>;
578 gpio-controller;
579 #gpio-cells = <2>;
580 };
581 };
582};
583
584#include "dm814x-clocks.dtsi"
1/*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
6
7#include <dt-bindings/bus/ti-sysc.h>
8#include <dt-bindings/clock/dm814.h>
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/pinctrl/dm814x.h>
11
12/ {
13 compatible = "ti,dm814";
14 interrupt-parent = <&intc>;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 chosen { };
18
19 aliases {
20 i2c0 = &i2c1;
21 i2c1 = &i2c2;
22 serial0 = &uart1;
23 serial1 = &uart2;
24 serial2 = &uart3;
25 ethernet0 = &cpsw_emac0;
26 ethernet1 = &cpsw_emac1;
27 usb0 = &usb0;
28 usb1 = &usb1;
29 phy0 = &usb0_phy;
30 phy1 = &usb1_phy;
31 };
32
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36 cpu@0 {
37 compatible = "arm,cortex-a8";
38 device_type = "cpu";
39 reg = <0>;
40 };
41 };
42
43 pmu {
44 compatible = "arm,cortex-a8-pmu";
45 interrupts = <3>;
46 };
47
48 /*
49 * The soc node represents the soc top level view. It is used for IPs
50 * that are not memory mapped in the MPU view or for the MPU itself.
51 */
52 soc {
53 compatible = "ti,omap-infra";
54 mpu {
55 compatible = "ti,omap3-mpu";
56 ti,hwmods = "mpu";
57 };
58 };
59
60 ocp {
61 compatible = "simple-bus";
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65 ti,hwmods = "l3_main";
66
67 usb: usb@47400000 {
68 compatible = "ti,am33xx-usb";
69 reg = <0x47400000 0x1000>;
70 ranges;
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ti,hwmods = "usb_otg_hs";
74
75 usb0_phy: usb-phy@47401300 {
76 compatible = "ti,am335x-usb-phy";
77 reg = <0x47401300 0x100>;
78 reg-names = "phy";
79 ti,ctrl_mod = <&usb_ctrl_mod>;
80 #phy-cells = <0>;
81 };
82
83 usb0: usb@47401000 {
84 compatible = "ti,musb-am33xx";
85 reg = <0x47401400 0x400
86 0x47401000 0x200>;
87 reg-names = "mc", "control";
88
89 interrupts = <18>;
90 interrupt-names = "mc";
91 dr_mode = "otg";
92 mentor,multipoint = <1>;
93 mentor,num-eps = <16>;
94 mentor,ram-bits = <12>;
95 mentor,power = <500>;
96 phys = <&usb0_phy>;
97
98 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
99 &cppi41dma 2 0 &cppi41dma 3 0
100 &cppi41dma 4 0 &cppi41dma 5 0
101 &cppi41dma 6 0 &cppi41dma 7 0
102 &cppi41dma 8 0 &cppi41dma 9 0
103 &cppi41dma 10 0 &cppi41dma 11 0
104 &cppi41dma 12 0 &cppi41dma 13 0
105 &cppi41dma 14 0 &cppi41dma 0 1
106 &cppi41dma 1 1 &cppi41dma 2 1
107 &cppi41dma 3 1 &cppi41dma 4 1
108 &cppi41dma 5 1 &cppi41dma 6 1
109 &cppi41dma 7 1 &cppi41dma 8 1
110 &cppi41dma 9 1 &cppi41dma 10 1
111 &cppi41dma 11 1 &cppi41dma 12 1
112 &cppi41dma 13 1 &cppi41dma 14 1>;
113 dma-names =
114 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
115 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
116 "rx14", "rx15",
117 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
118 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
119 "tx14", "tx15";
120 };
121
122 usb1: usb@47401800 {
123 compatible = "ti,musb-am33xx";
124 reg = <0x47401c00 0x400
125 0x47401800 0x200>;
126 reg-names = "mc", "control";
127 interrupts = <19>;
128 interrupt-names = "mc";
129 dr_mode = "otg";
130 mentor,multipoint = <1>;
131 mentor,num-eps = <16>;
132 mentor,ram-bits = <12>;
133 mentor,power = <500>;
134 phys = <&usb1_phy>;
135
136 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
137 &cppi41dma 17 0 &cppi41dma 18 0
138 &cppi41dma 19 0 &cppi41dma 20 0
139 &cppi41dma 21 0 &cppi41dma 22 0
140 &cppi41dma 23 0 &cppi41dma 24 0
141 &cppi41dma 25 0 &cppi41dma 26 0
142 &cppi41dma 27 0 &cppi41dma 28 0
143 &cppi41dma 29 0 &cppi41dma 15 1
144 &cppi41dma 16 1 &cppi41dma 17 1
145 &cppi41dma 18 1 &cppi41dma 19 1
146 &cppi41dma 20 1 &cppi41dma 21 1
147 &cppi41dma 22 1 &cppi41dma 23 1
148 &cppi41dma 24 1 &cppi41dma 25 1
149 &cppi41dma 26 1 &cppi41dma 27 1
150 &cppi41dma 28 1 &cppi41dma 29 1>;
151 dma-names =
152 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
153 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
154 "rx14", "rx15",
155 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
156 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
157 "tx14", "tx15";
158 };
159
160 cppi41dma: dma-controller@47402000 {
161 compatible = "ti,am3359-cppi41";
162 reg = <0x47400000 0x1000
163 0x47402000 0x1000
164 0x47403000 0x1000
165 0x47404000 0x4000>;
166 reg-names = "glue", "controller", "scheduler", "queuemgr";
167 interrupts = <17>;
168 interrupt-names = "glue";
169 #dma-cells = <2>;
170 #dma-channels = <30>;
171 #dma-requests = <256>;
172 };
173 };
174
175 /*
176 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
177 * It shows the module target agent registers though, so the
178 * actual device is typically 0x1000 before the target agent
179 * except in cases where the module is larger than 0x1000.
180 */
181 l4ls: l4ls@48000000 {
182 compatible = "ti,dm814-l4ls", "simple-bus";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 ranges = <0 0x48000000 0x2000000>;
186
187 i2c1: i2c@28000 {
188 compatible = "ti,omap4-i2c";
189 #address-cells = <1>;
190 #size-cells = <0>;
191 ti,hwmods = "i2c1";
192 reg = <0x28000 0x1000>;
193 interrupts = <70>;
194 };
195
196 elm: elm@80000 {
197 compatible = "ti,814-elm";
198 ti,hwmods = "elm";
199 reg = <0x80000 0x2000>;
200 interrupts = <4>;
201 };
202
203 gpio1: gpio@32000 {
204 compatible = "ti,omap4-gpio";
205 ti,hwmods = "gpio1";
206 ti,gpio-always-on;
207 reg = <0x32000 0x2000>;
208 interrupts = <96>;
209 gpio-controller;
210 #gpio-cells = <2>;
211 interrupt-controller;
212 #interrupt-cells = <2>;
213 };
214
215 gpio2: gpio@4c000 {
216 compatible = "ti,omap4-gpio";
217 ti,hwmods = "gpio2";
218 ti,gpio-always-on;
219 reg = <0x4c000 0x2000>;
220 interrupts = <98>;
221 gpio-controller;
222 #gpio-cells = <2>;
223 interrupt-controller;
224 #interrupt-cells = <2>;
225 };
226
227 gpio3: gpio@1ac000 {
228 compatible = "ti,omap4-gpio";
229 ti,hwmods = "gpio3";
230 ti,gpio-always-on;
231 reg = <0x1ac000 0x2000>;
232 interrupts = <32>;
233 gpio-controller;
234 #gpio-cells = <2>;
235 interrupt-controller;
236 #interrupt-cells = <2>;
237 };
238
239 gpio4: gpio@1ae000 {
240 compatible = "ti,omap4-gpio";
241 ti,hwmods = "gpio4";
242 ti,gpio-always-on;
243 reg = <0x1ae000 0x2000>;
244 interrupts = <62>;
245 gpio-controller;
246 #gpio-cells = <2>;
247 interrupt-controller;
248 #interrupt-cells = <2>;
249 };
250
251 i2c2: i2c@2a000 {
252 compatible = "ti,omap4-i2c";
253 #address-cells = <1>;
254 #size-cells = <0>;
255 ti,hwmods = "i2c2";
256 reg = <0x2a000 0x1000>;
257 interrupts = <71>;
258 };
259
260 mcspi1: spi@30000 {
261 compatible = "ti,omap4-mcspi";
262 reg = <0x30000 0x1000>;
263 #address-cells = <1>;
264 #size-cells = <0>;
265 interrupts = <65>;
266 ti,spi-num-cs = <4>;
267 ti,hwmods = "mcspi1";
268 dmas = <&edma 16 0 &edma 17 0
269 &edma 18 0 &edma 19 0
270 &edma 20 0 &edma 21 0
271 &edma 22 0 &edma 23 0>;
272
273 dma-names = "tx0", "rx0", "tx1", "rx1",
274 "tx2", "rx2", "tx3", "rx3";
275 };
276
277 mcspi2: spi@1a0000 {
278 compatible = "ti,omap4-mcspi";
279 reg = <0x1a0000 0x1000>;
280 #address-cells = <1>;
281 #size-cells = <0>;
282 interrupts = <125>;
283 ti,spi-num-cs = <4>;
284 ti,hwmods = "mcspi2";
285 dmas = <&edma 42 0 &edma 43 0
286 &edma 44 0 &edma 45 0>;
287 dma-names = "tx0", "rx0", "tx1", "rx1";
288 };
289
290 /* Board must configure dmas with edma_xbar for EDMA */
291 mcspi3: spi@1a2000 {
292 compatible = "ti,omap4-mcspi";
293 reg = <0x1a2000 0x1000>;
294 #address-cells = <1>;
295 #size-cells = <0>;
296 interrupts = <126>;
297 ti,spi-num-cs = <4>;
298 ti,hwmods = "mcspi3";
299 };
300
301 mcspi4: spi@1a4000 {
302 compatible = "ti,omap4-mcspi";
303 reg = <0x1a4000 0x1000>;
304 #address-cells = <1>;
305 #size-cells = <0>;
306 interrupts = <127>;
307 ti,spi-num-cs = <4>;
308 ti,hwmods = "mcspi4";
309 };
310
311 timer1_target: target-module@2e000 {
312 compatible = "ti,sysc-omap4-timer", "ti,sysc";
313 reg = <0x2e000 0x4>,
314 <0x2e010 0x4>;
315 reg-names = "rev", "sysc";
316 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
317 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
318 <SYSC_IDLE_NO>,
319 <SYSC_IDLE_SMART>,
320 <SYSC_IDLE_SMART_WKUP>;
321 clocks = <&timer1_fck>;
322 clock-names = "fck";
323 #address-cells = <1>;
324 #size-cells = <1>;
325 ranges = <0x0 0x2e000 0x1000>;
326
327 timer1: timer@0 {
328 compatible = "ti,am335x-timer-1ms";
329 reg = <0x0 0x400>;
330 interrupts = <67>;
331 ti,timer-alwon;
332 clocks = <&timer1_fck>;
333 clock-names = "fck";
334 };
335 };
336
337 uart1: uart@20000 {
338 compatible = "ti,am3352-uart", "ti,omap3-uart";
339 ti,hwmods = "uart1";
340 reg = <0x20000 0x2000>;
341 clock-frequency = <48000000>;
342 interrupts = <72>;
343 dmas = <&edma 26 0 &edma 27 0>;
344 dma-names = "tx", "rx";
345 };
346
347 uart2: uart@22000 {
348 compatible = "ti,am3352-uart", "ti,omap3-uart";
349 ti,hwmods = "uart2";
350 reg = <0x22000 0x2000>;
351 clock-frequency = <48000000>;
352 interrupts = <73>;
353 dmas = <&edma 28 0 &edma 29 0>;
354 dma-names = "tx", "rx";
355 };
356
357 uart3: uart@24000 {
358 compatible = "ti,am3352-uart", "ti,omap3-uart";
359 ti,hwmods = "uart3";
360 reg = <0x24000 0x2000>;
361 clock-frequency = <48000000>;
362 interrupts = <74>;
363 dmas = <&edma 30 0 &edma 31 0>;
364 dma-names = "tx", "rx";
365 };
366
367 timer2_target: target-module@40000 {
368 compatible = "ti,sysc-omap4-timer", "ti,sysc";
369 reg = <0x40000 0x4>,
370 <0x40010 0x4>;
371 reg-names = "rev", "sysc";
372 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
373 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
374 <SYSC_IDLE_NO>,
375 <SYSC_IDLE_SMART>,
376 <SYSC_IDLE_SMART_WKUP>;
377 clocks = <&timer2_fck>;
378 clock-names = "fck";
379 #address-cells = <1>;
380 #size-cells = <1>;
381 ranges = <0x0 0x40000 0x1000>;
382
383 timer2: timer@0 {
384 compatible = "ti,dm814-timer";
385 reg = <0 0x1000>;
386 interrupts = <68>;
387 clocks = <&timer2_fck>;
388 clock-names = "fck";
389 };
390 };
391
392 timer3: timer@42000 {
393 compatible = "ti,dm814-timer";
394 reg = <0x42000 0x2000>;
395 interrupts = <69>;
396 ti,hwmods = "timer3";
397 };
398
399 mmc1: mmc@60000 {
400 compatible = "ti,omap4-hsmmc";
401 ti,hwmods = "mmc1";
402 dmas = <&edma 24 0
403 &edma 25 0>;
404 dma-names = "tx", "rx";
405 interrupts = <64>;
406 interrupt-parent = <&intc>;
407 reg = <0x60000 0x1000>;
408 };
409
410 rtc: rtc@c0000 {
411 compatible = "ti,am3352-rtc", "ti,da830-rtc";
412 reg = <0xc0000 0x1000>;
413 interrupts = <75 76>;
414 ti,hwmods = "rtc";
415 };
416
417 mmc2: mmc@1d8000 {
418 compatible = "ti,omap4-hsmmc";
419 ti,hwmods = "mmc2";
420 dmas = <&edma 2 0
421 &edma 3 0>;
422 dma-names = "tx", "rx";
423 interrupts = <28>;
424 interrupt-parent = <&intc>;
425 reg = <0x1d8000 0x1000>;
426 };
427
428 control: control@140000 {
429 compatible = "ti,dm814-scm", "simple-bus";
430 reg = <0x140000 0x20000>;
431 #address-cells = <1>;
432 #size-cells = <1>;
433 ranges = <0 0x140000 0x20000>;
434
435 scm_conf: scm_conf@0 {
436 compatible = "syscon", "simple-bus";
437 reg = <0x0 0x800>;
438 #address-cells = <1>;
439 #size-cells = <1>;
440 ranges = <0 0 0x800>;
441
442 phy_gmii_sel: phy-gmii-sel {
443 compatible = "ti,dm814-phy-gmii-sel";
444 reg = <0x650 0x4>;
445 #phy-cells = <1>;
446 };
447
448 scm_clocks: clocks {
449 #address-cells = <1>;
450 #size-cells = <0>;
451 };
452
453 scm_clockdomains: clockdomains {
454 };
455 };
456
457 usb_ctrl_mod: control@620 {
458 compatible = "ti,am335x-usb-ctrl-module";
459 reg = <0x620 0x10
460 0x648 0x4>;
461 reg-names = "phy_ctrl", "wakeup";
462 };
463
464 edma_xbar: dma-router@f90 {
465 compatible = "ti,am335x-edma-crossbar";
466 reg = <0xf90 0x40>;
467 #dma-cells = <3>;
468 dma-requests = <32>;
469 dma-masters = <&edma>;
470 };
471
472 /*
473 * Note that silicon revision 2.1 and older
474 * require input enabled (bit 18 set) for all
475 * 3.3V I/Os to avoid cumulative hardware damage.
476 * For more info, see errata advisory 2.1.87.
477 * We leave bit 18 out of function-mask and rely
478 * on the bootloader for it.
479 */
480 pincntl: pinmux@800 {
481 compatible = "pinctrl-single";
482 reg = <0x800 0x438>;
483 #address-cells = <1>;
484 #size-cells = <0>;
485 #pinctrl-cells = <1>;
486 pinctrl-single,register-width = <32>;
487 pinctrl-single,function-mask = <0x307ff>;
488 };
489
490 usb1_phy: usb-phy@1b00 {
491 compatible = "ti,am335x-usb-phy";
492 reg = <0x1b00 0x100>;
493 reg-names = "phy";
494 ti,ctrl_mod = <&usb_ctrl_mod>;
495 #phy-cells = <0>;
496 };
497 };
498
499 prcm: prcm@180000 {
500 compatible = "ti,dm814-prcm", "simple-bus";
501 reg = <0x180000 0x2000>;
502 #address-cells = <1>;
503 #size-cells = <1>;
504 ranges = <0 0x180000 0x2000>;
505
506 prcm_clocks: clocks {
507 #address-cells = <1>;
508 #size-cells = <0>;
509 };
510
511 prcm_clockdomains: clockdomains {
512 };
513 };
514
515 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
516 pllss: pllss@1c5000 {
517 compatible = "ti,dm814-pllss", "simple-bus";
518 reg = <0x1c5000 0x1000>;
519 #address-cells = <1>;
520 #size-cells = <1>;
521 ranges = <0 0x1c5000 0x1000>;
522
523 pllss_clocks: clocks {
524 #address-cells = <1>;
525 #size-cells = <0>;
526 };
527
528 pllss_clockdomains: clockdomains {
529 };
530 };
531
532 wdt1: wdt@1c7000 {
533 compatible = "ti,omap3-wdt";
534 ti,hwmods = "wd_timer";
535 reg = <0x1c7000 0x1000>;
536 interrupts = <91>;
537 };
538 };
539
540 intc: interrupt-controller@48200000 {
541 compatible = "ti,dm814-intc";
542 interrupt-controller;
543 #interrupt-cells = <1>;
544 reg = <0x48200000 0x1000>;
545 };
546
547 /* Board must configure evtmux with edma_xbar for EDMA */
548 mmc3: mmc@47810000 {
549 compatible = "ti,omap4-hsmmc";
550 ti,hwmods = "mmc3";
551 interrupts = <29>;
552 interrupt-parent = <&intc>;
553 reg = <0x47810000 0x1000>;
554 };
555
556 target-module@49000000 {
557 compatible = "ti,sysc-omap4", "ti,sysc";
558 reg = <0x49000000 0x4>;
559 reg-names = "rev";
560 clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
561 clock-names = "fck";
562 #address-cells = <1>;
563 #size-cells = <1>;
564 ranges = <0x0 0x49000000 0x10000>;
565
566 edma: dma@0 {
567 compatible = "ti,edma3-tpcc";
568 reg = <0 0x10000>;
569 reg-names = "edma3_cc";
570 interrupts = <12 13 14>;
571 interrupt-names = "edma3_ccint", "edma3_mperr",
572 "edma3_ccerrint";
573 dma-requests = <64>;
574 #dma-cells = <2>;
575
576 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
577 <&edma_tptc2 3>, <&edma_tptc3 0>;
578
579 ti,edma-memcpy-channels = <20 21>;
580 };
581 };
582
583 target-module@49800000 {
584 compatible = "ti,sysc-omap4", "ti,sysc";
585 reg = <0x49800000 0x4>,
586 <0x49800010 0x4>;
587 reg-names = "rev", "sysc";
588 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
589 ti,sysc-midle = <SYSC_IDLE_FORCE>;
590 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
591 <SYSC_IDLE_SMART>;
592 clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>;
593 clock-names = "fck";
594 #address-cells = <1>;
595 #size-cells = <1>;
596 ranges = <0x0 0x49800000 0x100000>;
597
598 edma_tptc0: dma@0 {
599 compatible = "ti,edma3-tptc";
600 reg = <0 0x100000>;
601 interrupts = <112>;
602 interrupt-names = "edma3_tcerrint";
603 };
604 };
605
606 target-module@49900000 {
607 compatible = "ti,sysc-omap4", "ti,sysc";
608 reg = <0x49900000 0x4>,
609 <0x49900010 0x4>;
610 reg-names = "rev", "sysc";
611 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
612 ti,sysc-midle = <SYSC_IDLE_FORCE>;
613 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
614 <SYSC_IDLE_SMART>;
615 clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>;
616 clock-names = "fck";
617 #address-cells = <1>;
618 #size-cells = <1>;
619 ranges = <0x0 0x49900000 0x100000>;
620
621 edma_tptc1: dma@0 {
622 compatible = "ti,edma3-tptc";
623 reg = <0 0x100000>;
624 interrupts = <113>;
625 interrupt-names = "edma3_tcerrint";
626 };
627 };
628
629 target-module@49a00000 {
630 compatible = "ti,sysc-omap4", "ti,sysc";
631 reg = <0x49a00000 0x4>,
632 <0x49a00010 0x4>;
633 reg-names = "rev", "sysc";
634 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
635 ti,sysc-midle = <SYSC_IDLE_FORCE>;
636 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
637 <SYSC_IDLE_SMART>;
638 clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>;
639 clock-names = "fck";
640 #address-cells = <1>;
641 #size-cells = <1>;
642 ranges = <0x0 0x49a00000 0x100000>;
643
644 edma_tptc2: dma@0 {
645 compatible = "ti,edma3-tptc";
646 reg = <0 0x100000>;
647 interrupts = <114>;
648 interrupt-names = "edma3_tcerrint";
649 };
650 };
651
652 target-module@49b00000 {
653 compatible = "ti,sysc-omap4", "ti,sysc";
654 reg = <0x49b00000 0x4>,
655 <0x49b00010 0x4>;
656 reg-names = "rev", "sysc";
657 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
658 ti,sysc-midle = <SYSC_IDLE_FORCE>;
659 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
660 <SYSC_IDLE_SMART>;
661 clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>;
662 clock-names = "fck";
663 #address-cells = <1>;
664 #size-cells = <1>;
665 ranges = <0x0 0x49b00000 0x100000>;
666
667 edma_tptc3: dma@0 {
668 compatible = "ti,edma3-tptc";
669 reg = <0 0x100000>;
670 interrupts = <115>;
671 interrupt-names = "edma3_tcerrint";
672 };
673 };
674
675 /* See TRM "Table 1-318. L4HS Instance Summary" */
676 l4hs: l4hs@4a000000 {
677 compatible = "ti,dm814-l4hs", "simple-bus";
678 #address-cells = <1>;
679 #size-cells = <1>;
680 ranges = <0 0x4a000000 0x1b4040>;
681
682 target-module@100000 {
683 compatible = "ti,sysc-omap4-simple", "ti,sysc";
684 reg = <0x100900 0x4>,
685 <0x100908 0x4>,
686 <0x100904 0x4>;
687 reg-names = "rev", "sysc", "syss";
688 ti,sysc-mask = <0>;
689 ti,sysc-midle = <SYSC_IDLE_FORCE>,
690 <SYSC_IDLE_NO>;
691 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
692 <SYSC_IDLE_NO>;
693 ti,syss-mask = <1>;
694 clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
695 clock-names = "fck";
696 #address-cells = <1>;
697 #size-cells = <1>;
698 ranges = <0 0x100000 0x8000>;
699
700 mac: ethernet@0 {
701 compatible = "ti,cpsw";
702 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
703 clock-names = "fck", "cpts";
704 cpdma_channels = <8>;
705 ale_entries = <1024>;
706 bd_ram_size = <0x2000>;
707 mac_control = <0x20>;
708 slaves = <2>;
709 active_slave = <0>;
710 cpts_clock_mult = <0x80000000>;
711 cpts_clock_shift = <29>;
712 reg = <0 0x800>,
713 <0x900 0x100>;
714 #address-cells = <1>;
715 #size-cells = <1>;
716 /*
717 * c0_rx_thresh_pend
718 * c0_rx_pend
719 * c0_tx_pend
720 * c0_misc_pend
721 */
722 interrupts = <40 41 42 43>;
723 ranges = <0 0 0x8000>;
724 syscon = <&scm_conf>;
725
726 davinci_mdio: mdio@800 {
727 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
728 clocks = <&cpsw_125mhz_gclk>;
729 clock-names = "fck";
730 #address-cells = <1>;
731 #size-cells = <0>;
732 bus_freq = <1000000>;
733 reg = <0x800 0x100>;
734 };
735
736 cpsw_emac0: slave@200 {
737 /* Filled in by U-Boot */
738 mac-address = [ 00 00 00 00 00 00 ];
739 phys = <&phy_gmii_sel 1>;
740 };
741
742 cpsw_emac1: slave@300 {
743 /* Filled in by U-Boot */
744 mac-address = [ 00 00 00 00 00 00 ];
745 phys = <&phy_gmii_sel 2>;
746 };
747 };
748 };
749 };
750
751 gpmc: gpmc@50000000 {
752 compatible = "ti,am3352-gpmc";
753 ti,hwmods = "gpmc";
754 ti,no-idle-on-init;
755 reg = <0x50000000 0x2000>;
756 interrupts = <100>;
757 gpmc,num-cs = <7>;
758 gpmc,num-waitpins = <2>;
759 #address-cells = <2>;
760 #size-cells = <1>;
761 interrupt-controller;
762 #interrupt-cells = <2>;
763 gpio-controller;
764 #gpio-cells = <2>;
765 };
766 };
767};
768
769#include "dm814x-clocks.dtsi"
770
771/* Preferred always-on timer for clocksource */
772&timer1_target {
773 ti,no-reset-on-init;
774 ti,no-idle;
775 timer@0 {
776 assigned-clocks = <&timer1_fck>;
777 assigned-clock-parents = <&devosc_ck>;
778 };
779};
780
781/* Preferred timer for clockevent */
782&timer2_target {
783 ti,no-reset-on-init;
784 ti,no-idle;
785 timer@0 {
786 assigned-clocks = <&timer2_fck>;
787 assigned-clock-parents = <&devosc_ck>;
788 };
789};