1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  4 */
  5
  6/*
  7 * VScom OnRISC
  8 * http://www.vscom.de
  9 */
 10
 11/dts-v1/;
 12
 13#include "am335x-baltos.dtsi"
 14
 15/ {
 16	model = "NetCom Plus";
 17};
 18
 19&am33xx_pinmux {
 20	pinctrl-names = "default";
 21	pinctrl-0 = <&dip_switches>;
 22
 23	dip_switches: pinmux_dip_switches {
 24		pinctrl-single,pins = <
 25			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7)
 26			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)
 27			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)
 28			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)
 29		>;
 30	};
 31
 32	tca6416_pins: pinmux_tca6416_pins {
 33		pinctrl-single,pins = <
 34			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7)
 35		>;
 36	};
 37
 38	i2c2_pins: pinmux_i2c2_pins {
 39		pinctrl-single,pins = <
 40			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
 41			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
 42		>;
 43	};
 44};
 45
 46&usb0_phy {
 47	status = "okay";
 48};
 49
 50&usb1_phy {
 51	status = "okay";
 52};
 53
 54&usb0 {
 55	status = "okay";
 56	dr_mode = "host";
 57};
 58
 59&usb1 {
 60	status = "okay";
 61	dr_mode = "host";
 62};
 63
 64&i2c1 {
 65	tca6416a: gpio@20 {
 66		compatible = "ti,tca6416";
 67		reg = <0x20>;
 68		gpio-controller;
 69		#gpio-cells = <2>;
 70		interrupt-parent = <&gpio0>;
 71		interrupts = <20 IRQ_TYPE_EDGE_RISING>;
 72		pinctrl-names = "default";
 73		pinctrl-0 = <&tca6416_pins>;
 74	};
 75};
 76
 77&i2c2 {
 78	pinctrl-names = "default";
 79	pinctrl-0 = <&i2c2_pins>;
 80
 81	status = "okay";
 82	clock-frequency = <400000>;
 83
 84	tca6416b: gpio@20 {
 85		compatible = "ti,tca6416";
 86		reg = <0x20>;
 87		gpio-controller;
 88		#gpio-cells = <2>;
 89	};
 90
 91	tca6416c: gpio@21 {
 92		compatible = "ti,tca6416";
 93		reg = <0x21>;
 94		gpio-controller;
 95		#gpio-cells = <2>;
 96	};
 97};
 98
 99&davinci_mdio {
100	phy0: ethernet-phy@0 {
101		reg = <1>;
102	};
103};
104
105&cpsw_emac0 {
106	phy-mode = "rmii";
107	dual_emac_res_vlan = <1>;
108	phy-handle = <&phy0>;
109};
110
111&cpsw_emac1 {
112	phy-mode = "rgmii-id";
113	dual_emac_res_vlan = <2>;
114	phy-handle = <&phy1>;
115};