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1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * VScom OnRISC
11 * http://www.vscom.de
12 */
13
14/dts-v1/;
15
16#include "am335x-baltos.dtsi"
17#include "am335x-baltos-leds.dtsi"
18
19/ {
20 model = "OnRISC Baltos iR 3220";
21};
22
23&am33xx_pinmux {
24 tca6416_pins: pinmux_tca6416_pins {
25 pinctrl-single,pins = <
26 AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
27 >;
28 };
29
30 uart1_pins: pinmux_uart1_pins {
31 pinctrl-single,pins = <
32 AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd */
33 AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0) /* uart1_txd */
34 AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart1_ctsn */
35 AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn */
36 AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
37 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
38 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
39 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
40 >;
41 };
42
43 uart2_pins: pinmux_uart2_pins {
44 pinctrl-single,pins = <
45 AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd_mux3 */
46 AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd_mux3 */
47 AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE2) /* i2c0_sda.uart2_ctsn_mux0 */
48 AM33XX_IOPAD(0x98c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* i2c0_scl.uart2_rtsn_mux0 */
49 AM33XX_IOPAD(0x830, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */
50 AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
51 AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.gpio1[14] DCD */
52 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.gpio1[15] RI */
53
54 AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
55 >;
56 };
57};
58
59&uart1 {
60 pinctrl-names = "default";
61 pinctrl-0 = <&uart1_pins>;
62 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
63 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
64 dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
65 rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
66
67 status = "okay";
68};
69
70&uart2 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&uart2_pins>;
73 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
74 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
75 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
76 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
77
78 status = "okay";
79};
80
81&i2c1 {
82 tca6416: gpio@20 {
83 compatible = "ti,tca6416";
84 reg = <0x20>;
85 gpio-controller;
86 #gpio-cells = <2>;
87 interrupt-parent = <&gpio0>;
88 interrupts = <20 GPIO_ACTIVE_LOW>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&tca6416_pins>;
91 };
92};
93
94&usb0_phy {
95 status = "okay";
96};
97
98&usb0 {
99 status = "okay";
100 dr_mode = "host";
101};
102
103&cpsw_emac0 {
104 phy-mode = "rmii";
105 dual_emac_res_vlan = <1>;
106 fixed-link {
107 speed = <100>;
108 full-duplex;
109 };
110};
111
112&cpsw_emac1 {
113 phy-mode = "rgmii-txid";
114 dual_emac_res_vlan = <2>;
115 phy-handle = <&phy1>;
116};
117
118&phy_sel {
119 rmii-clock-ext = <1>;
120};
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/*
7 * VScom OnRISC
8 * http://www.vscom.de
9 */
10
11/dts-v1/;
12
13#include "am335x-baltos.dtsi"
14#include "am335x-baltos-leds.dtsi"
15
16/ {
17 model = "OnRISC Baltos iR 3220";
18};
19
20&am33xx_pinmux {
21 tca6416_pins: pinmux_tca6416_pins {
22 pinctrl-single,pins = <
23 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
24 >;
25 };
26
27 uart1_pins: pinmux_uart1_pins {
28 pinctrl-single,pins = <
29 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
30 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
31 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
32 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
33 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
34 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
35 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
36 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
37 >;
38 };
39
40 uart2_pins: pinmux_uart2_pins {
41 pinctrl-single,pins = <
42 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* spi0_sclk.uart2_rxd_mux3 */
43 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* spi0_d0.uart2_txd_mux3 */
44 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) /* i2c0_sda.uart2_ctsn_mux0 */
45 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* i2c0_scl.uart2_rtsn_mux0 */
46 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.gpio1[12] DTR */
47 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
48 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad14.gpio1[14] DCD */
49 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad15.gpio1[15] RI */
50
51 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
52 >;
53 };
54
55 mmc1_pins: pinmux_mmc1_pins {
56 pinctrl-single,pins = <
57 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
58 >;
59 };
60};
61
62&uart1 {
63 pinctrl-names = "default";
64 pinctrl-0 = <&uart1_pins>;
65 dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
66 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
67 dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
68 rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
69
70 status = "okay";
71};
72
73&uart2 {
74 pinctrl-names = "default";
75 pinctrl-0 = <&uart2_pins>;
76 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
77 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
78 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
79 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
80
81 status = "okay";
82};
83
84&i2c1 {
85 tca6416: gpio@20 {
86 compatible = "ti,tca6416";
87 reg = <0x20>;
88 gpio-controller;
89 #gpio-cells = <2>;
90 interrupt-parent = <&gpio0>;
91 interrupts = <20 IRQ_TYPE_EDGE_RISING>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&tca6416_pins>;
94 };
95};
96
97&usb0_phy {
98 status = "okay";
99};
100
101&usb0 {
102 status = "okay";
103 dr_mode = "host";
104};
105
106&cpsw_emac0 {
107 phy-mode = "rmii";
108 dual_emac_res_vlan = <1>;
109 fixed-link {
110 speed = <100>;
111 full-duplex;
112 };
113};
114
115&cpsw_emac1 {
116 phy-mode = "rgmii-id";
117 dual_emac_res_vlan = <2>;
118 phy-handle = <&phy1>;
119};
120
121&mmc1 {
122 pinctrl-names = "default";
123 pinctrl-0 = <&mmc1_pins>;
124 cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
125};