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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2014 Intel Corp.
4 * Author: Jiang Liu <jiang.liu@linux.intel.com>
5 *
6 * This file is licensed under GPLv2.
7 *
8 * This file contains common code to support Message Signalled Interrupt for
9 * PCI compatible and non PCI compatible devices.
10 */
11#include <linux/types.h>
12#include <linux/device.h>
13#include <linux/irq.h>
14#include <linux/irqdomain.h>
15#include <linux/msi.h>
16#include <linux/slab.h>
17
18#include "internals.h"
19
20/**
21 * alloc_msi_entry - Allocate an initialize msi_entry
22 * @dev: Pointer to the device for which this is allocated
23 * @nvec: The number of vectors used in this entry
24 * @affinity: Optional pointer to an affinity mask array size of @nvec
25 *
26 * If @affinity is not NULL then a an affinity array[@nvec] is allocated
27 * and the affinity masks from @affinity are copied.
28 */
29struct msi_desc *
30alloc_msi_entry(struct device *dev, int nvec, const struct cpumask *affinity)
31{
32 struct msi_desc *desc;
33
34 desc = kzalloc(sizeof(*desc), GFP_KERNEL);
35 if (!desc)
36 return NULL;
37
38 INIT_LIST_HEAD(&desc->list);
39 desc->dev = dev;
40 desc->nvec_used = nvec;
41 if (affinity) {
42 desc->affinity = kmemdup(affinity,
43 nvec * sizeof(*desc->affinity), GFP_KERNEL);
44 if (!desc->affinity) {
45 kfree(desc);
46 return NULL;
47 }
48 }
49
50 return desc;
51}
52
53void free_msi_entry(struct msi_desc *entry)
54{
55 kfree(entry->affinity);
56 kfree(entry);
57}
58
59void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
60{
61 *msg = entry->msg;
62}
63
64void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
65{
66 struct msi_desc *entry = irq_get_msi_desc(irq);
67
68 __get_cached_msi_msg(entry, msg);
69}
70EXPORT_SYMBOL_GPL(get_cached_msi_msg);
71
72#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
73static inline void irq_chip_write_msi_msg(struct irq_data *data,
74 struct msi_msg *msg)
75{
76 data->chip->irq_write_msi_msg(data, msg);
77}
78
79/**
80 * msi_domain_set_affinity - Generic affinity setter function for MSI domains
81 * @irq_data: The irq data associated to the interrupt
82 * @mask: The affinity mask to set
83 * @force: Flag to enforce setting (disable online checks)
84 *
85 * Intended to be used by MSI interrupt controllers which are
86 * implemented with hierarchical domains.
87 */
88int msi_domain_set_affinity(struct irq_data *irq_data,
89 const struct cpumask *mask, bool force)
90{
91 struct irq_data *parent = irq_data->parent_data;
92 struct msi_msg msg;
93 int ret;
94
95 ret = parent->chip->irq_set_affinity(parent, mask, force);
96 if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
97 BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
98 irq_chip_write_msi_msg(irq_data, &msg);
99 }
100
101 return ret;
102}
103
104static int msi_domain_activate(struct irq_domain *domain,
105 struct irq_data *irq_data, bool early)
106{
107 struct msi_msg msg;
108
109 BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
110 irq_chip_write_msi_msg(irq_data, &msg);
111 return 0;
112}
113
114static void msi_domain_deactivate(struct irq_domain *domain,
115 struct irq_data *irq_data)
116{
117 struct msi_msg msg;
118
119 memset(&msg, 0, sizeof(msg));
120 irq_chip_write_msi_msg(irq_data, &msg);
121}
122
123static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
124 unsigned int nr_irqs, void *arg)
125{
126 struct msi_domain_info *info = domain->host_data;
127 struct msi_domain_ops *ops = info->ops;
128 irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
129 int i, ret;
130
131 if (irq_find_mapping(domain, hwirq) > 0)
132 return -EEXIST;
133
134 if (domain->parent) {
135 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
136 if (ret < 0)
137 return ret;
138 }
139
140 for (i = 0; i < nr_irqs; i++) {
141 ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
142 if (ret < 0) {
143 if (ops->msi_free) {
144 for (i--; i > 0; i--)
145 ops->msi_free(domain, info, virq + i);
146 }
147 irq_domain_free_irqs_top(domain, virq, nr_irqs);
148 return ret;
149 }
150 }
151
152 return 0;
153}
154
155static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
156 unsigned int nr_irqs)
157{
158 struct msi_domain_info *info = domain->host_data;
159 int i;
160
161 if (info->ops->msi_free) {
162 for (i = 0; i < nr_irqs; i++)
163 info->ops->msi_free(domain, info, virq + i);
164 }
165 irq_domain_free_irqs_top(domain, virq, nr_irqs);
166}
167
168static const struct irq_domain_ops msi_domain_ops = {
169 .alloc = msi_domain_alloc,
170 .free = msi_domain_free,
171 .activate = msi_domain_activate,
172 .deactivate = msi_domain_deactivate,
173};
174
175#ifdef GENERIC_MSI_DOMAIN_OPS
176static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
177 msi_alloc_info_t *arg)
178{
179 return arg->hwirq;
180}
181
182static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
183 int nvec, msi_alloc_info_t *arg)
184{
185 memset(arg, 0, sizeof(*arg));
186 return 0;
187}
188
189static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
190 struct msi_desc *desc)
191{
192 arg->desc = desc;
193}
194#else
195#define msi_domain_ops_get_hwirq NULL
196#define msi_domain_ops_prepare NULL
197#define msi_domain_ops_set_desc NULL
198#endif /* !GENERIC_MSI_DOMAIN_OPS */
199
200static int msi_domain_ops_init(struct irq_domain *domain,
201 struct msi_domain_info *info,
202 unsigned int virq, irq_hw_number_t hwirq,
203 msi_alloc_info_t *arg)
204{
205 irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
206 info->chip_data);
207 if (info->handler && info->handler_name) {
208 __irq_set_handler(virq, info->handler, 0, info->handler_name);
209 if (info->handler_data)
210 irq_set_handler_data(virq, info->handler_data);
211 }
212 return 0;
213}
214
215static int msi_domain_ops_check(struct irq_domain *domain,
216 struct msi_domain_info *info,
217 struct device *dev)
218{
219 return 0;
220}
221
222static struct msi_domain_ops msi_domain_ops_default = {
223 .get_hwirq = msi_domain_ops_get_hwirq,
224 .msi_init = msi_domain_ops_init,
225 .msi_check = msi_domain_ops_check,
226 .msi_prepare = msi_domain_ops_prepare,
227 .set_desc = msi_domain_ops_set_desc,
228};
229
230static void msi_domain_update_dom_ops(struct msi_domain_info *info)
231{
232 struct msi_domain_ops *ops = info->ops;
233
234 if (ops == NULL) {
235 info->ops = &msi_domain_ops_default;
236 return;
237 }
238
239 if (ops->get_hwirq == NULL)
240 ops->get_hwirq = msi_domain_ops_default.get_hwirq;
241 if (ops->msi_init == NULL)
242 ops->msi_init = msi_domain_ops_default.msi_init;
243 if (ops->msi_check == NULL)
244 ops->msi_check = msi_domain_ops_default.msi_check;
245 if (ops->msi_prepare == NULL)
246 ops->msi_prepare = msi_domain_ops_default.msi_prepare;
247 if (ops->set_desc == NULL)
248 ops->set_desc = msi_domain_ops_default.set_desc;
249}
250
251static void msi_domain_update_chip_ops(struct msi_domain_info *info)
252{
253 struct irq_chip *chip = info->chip;
254
255 BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
256 if (!chip->irq_set_affinity)
257 chip->irq_set_affinity = msi_domain_set_affinity;
258}
259
260/**
261 * msi_create_irq_domain - Create a MSI interrupt domain
262 * @fwnode: Optional fwnode of the interrupt controller
263 * @info: MSI domain info
264 * @parent: Parent irq domain
265 */
266struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
267 struct msi_domain_info *info,
268 struct irq_domain *parent)
269{
270 struct irq_domain *domain;
271
272 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
273 msi_domain_update_dom_ops(info);
274 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
275 msi_domain_update_chip_ops(info);
276
277 domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0,
278 fwnode, &msi_domain_ops, info);
279
280 if (domain && !domain->name && info->chip)
281 domain->name = info->chip->name;
282
283 return domain;
284}
285
286int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
287 int nvec, msi_alloc_info_t *arg)
288{
289 struct msi_domain_info *info = domain->host_data;
290 struct msi_domain_ops *ops = info->ops;
291 int ret;
292
293 ret = ops->msi_check(domain, info, dev);
294 if (ret == 0)
295 ret = ops->msi_prepare(domain, dev, nvec, arg);
296
297 return ret;
298}
299
300int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
301 int virq, int nvec, msi_alloc_info_t *arg)
302{
303 struct msi_domain_info *info = domain->host_data;
304 struct msi_domain_ops *ops = info->ops;
305 struct msi_desc *desc;
306 int ret = 0;
307
308 for_each_msi_entry(desc, dev) {
309 /* Don't even try the multi-MSI brain damage. */
310 if (WARN_ON(!desc->irq || desc->nvec_used != 1)) {
311 ret = -EINVAL;
312 break;
313 }
314
315 if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
316 continue;
317
318 ops->set_desc(arg, desc);
319 /* Assumes the domain mutex is held! */
320 ret = irq_domain_alloc_irqs_hierarchy(domain, desc->irq, 1,
321 arg);
322 if (ret)
323 break;
324
325 irq_set_msi_desc_off(desc->irq, 0, desc);
326 }
327
328 if (ret) {
329 /* Mop up the damage */
330 for_each_msi_entry(desc, dev) {
331 if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
332 continue;
333
334 irq_domain_free_irqs_common(domain, desc->irq, 1);
335 }
336 }
337
338 return ret;
339}
340
341/*
342 * Carefully check whether the device can use reservation mode. If
343 * reservation mode is enabled then the early activation will assign a
344 * dummy vector to the device. If the PCI/MSI device does not support
345 * masking of the entry then this can result in spurious interrupts when
346 * the device driver is not absolutely careful. But even then a malfunction
347 * of the hardware could result in a spurious interrupt on the dummy vector
348 * and render the device unusable. If the entry can be masked then the core
349 * logic will prevent the spurious interrupt and reservation mode can be
350 * used. For now reservation mode is restricted to PCI/MSI.
351 */
352static bool msi_check_reservation_mode(struct irq_domain *domain,
353 struct msi_domain_info *info,
354 struct device *dev)
355{
356 struct msi_desc *desc;
357
358 if (domain->bus_token != DOMAIN_BUS_PCI_MSI)
359 return false;
360
361 if (!(info->flags & MSI_FLAG_MUST_REACTIVATE))
362 return false;
363
364 if (IS_ENABLED(CONFIG_PCI_MSI) && pci_msi_ignore_mask)
365 return false;
366
367 /*
368 * Checking the first MSI descriptor is sufficient. MSIX supports
369 * masking and MSI does so when the maskbit is set.
370 */
371 desc = first_msi_entry(dev);
372 return desc->msi_attrib.is_msix || desc->msi_attrib.maskbit;
373}
374
375/**
376 * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
377 * @domain: The domain to allocate from
378 * @dev: Pointer to device struct of the device for which the interrupts
379 * are allocated
380 * @nvec: The number of interrupts to allocate
381 *
382 * Returns 0 on success or an error code.
383 */
384int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
385 int nvec)
386{
387 struct msi_domain_info *info = domain->host_data;
388 struct msi_domain_ops *ops = info->ops;
389 struct irq_data *irq_data;
390 struct msi_desc *desc;
391 msi_alloc_info_t arg;
392 int i, ret, virq;
393 bool can_reserve;
394
395 ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
396 if (ret)
397 return ret;
398
399 for_each_msi_entry(desc, dev) {
400 ops->set_desc(&arg, desc);
401
402 virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
403 dev_to_node(dev), &arg, false,
404 desc->affinity);
405 if (virq < 0) {
406 ret = -ENOSPC;
407 if (ops->handle_error)
408 ret = ops->handle_error(domain, desc, ret);
409 if (ops->msi_finish)
410 ops->msi_finish(&arg, ret);
411 return ret;
412 }
413
414 for (i = 0; i < desc->nvec_used; i++) {
415 irq_set_msi_desc_off(virq, i, desc);
416 irq_debugfs_copy_devname(virq + i, dev);
417 }
418 }
419
420 if (ops->msi_finish)
421 ops->msi_finish(&arg, 0);
422
423 can_reserve = msi_check_reservation_mode(domain, info, dev);
424
425 for_each_msi_entry(desc, dev) {
426 virq = desc->irq;
427 if (desc->nvec_used == 1)
428 dev_dbg(dev, "irq %d for MSI\n", virq);
429 else
430 dev_dbg(dev, "irq [%d-%d] for MSI\n",
431 virq, virq + desc->nvec_used - 1);
432 /*
433 * This flag is set by the PCI layer as we need to activate
434 * the MSI entries before the PCI layer enables MSI in the
435 * card. Otherwise the card latches a random msi message.
436 */
437 if (!(info->flags & MSI_FLAG_ACTIVATE_EARLY))
438 continue;
439
440 irq_data = irq_domain_get_irq_data(domain, desc->irq);
441 if (!can_reserve)
442 irqd_clr_can_reserve(irq_data);
443 ret = irq_domain_activate_irq(irq_data, can_reserve);
444 if (ret)
445 goto cleanup;
446 }
447
448 /*
449 * If these interrupts use reservation mode, clear the activated bit
450 * so request_irq() will assign the final vector.
451 */
452 if (can_reserve) {
453 for_each_msi_entry(desc, dev) {
454 irq_data = irq_domain_get_irq_data(domain, desc->irq);
455 irqd_clr_activated(irq_data);
456 }
457 }
458 return 0;
459
460cleanup:
461 for_each_msi_entry(desc, dev) {
462 struct irq_data *irqd;
463
464 if (desc->irq == virq)
465 break;
466
467 irqd = irq_domain_get_irq_data(domain, desc->irq);
468 if (irqd_is_activated(irqd))
469 irq_domain_deactivate_irq(irqd);
470 }
471 msi_domain_free_irqs(domain, dev);
472 return ret;
473}
474
475/**
476 * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
477 * @domain: The domain to managing the interrupts
478 * @dev: Pointer to device struct of the device for which the interrupts
479 * are free
480 */
481void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
482{
483 struct msi_desc *desc;
484
485 for_each_msi_entry(desc, dev) {
486 /*
487 * We might have failed to allocate an MSI early
488 * enough that there is no IRQ associated to this
489 * entry. If that's the case, don't do anything.
490 */
491 if (desc->irq) {
492 irq_domain_free_irqs(desc->irq, desc->nvec_used);
493 desc->irq = 0;
494 }
495 }
496}
497
498/**
499 * msi_get_domain_info - Get the MSI interrupt domain info for @domain
500 * @domain: The interrupt domain to retrieve data from
501 *
502 * Returns the pointer to the msi_domain_info stored in
503 * @domain->host_data.
504 */
505struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
506{
507 return (struct msi_domain_info *)domain->host_data;
508}
509
510#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2014 Intel Corp.
4 * Author: Jiang Liu <jiang.liu@linux.intel.com>
5 *
6 * This file is licensed under GPLv2.
7 *
8 * This file contains common code to support Message Signaled Interrupts for
9 * PCI compatible and non PCI compatible devices.
10 */
11#include <linux/types.h>
12#include <linux/device.h>
13#include <linux/irq.h>
14#include <linux/irqdomain.h>
15#include <linux/msi.h>
16#include <linux/slab.h>
17
18#include "internals.h"
19
20/**
21 * alloc_msi_entry - Allocate an initialize msi_entry
22 * @dev: Pointer to the device for which this is allocated
23 * @nvec: The number of vectors used in this entry
24 * @affinity: Optional pointer to an affinity mask array size of @nvec
25 *
26 * If @affinity is not NULL then an affinity array[@nvec] is allocated
27 * and the affinity masks and flags from @affinity are copied.
28 */
29struct msi_desc *alloc_msi_entry(struct device *dev, int nvec,
30 const struct irq_affinity_desc *affinity)
31{
32 struct msi_desc *desc;
33
34 desc = kzalloc(sizeof(*desc), GFP_KERNEL);
35 if (!desc)
36 return NULL;
37
38 INIT_LIST_HEAD(&desc->list);
39 desc->dev = dev;
40 desc->nvec_used = nvec;
41 if (affinity) {
42 desc->affinity = kmemdup(affinity,
43 nvec * sizeof(*desc->affinity), GFP_KERNEL);
44 if (!desc->affinity) {
45 kfree(desc);
46 return NULL;
47 }
48 }
49
50 return desc;
51}
52
53void free_msi_entry(struct msi_desc *entry)
54{
55 kfree(entry->affinity);
56 kfree(entry);
57}
58
59void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
60{
61 *msg = entry->msg;
62}
63
64void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
65{
66 struct msi_desc *entry = irq_get_msi_desc(irq);
67
68 __get_cached_msi_msg(entry, msg);
69}
70EXPORT_SYMBOL_GPL(get_cached_msi_msg);
71
72#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
73static inline void irq_chip_write_msi_msg(struct irq_data *data,
74 struct msi_msg *msg)
75{
76 data->chip->irq_write_msi_msg(data, msg);
77}
78
79static void msi_check_level(struct irq_domain *domain, struct msi_msg *msg)
80{
81 struct msi_domain_info *info = domain->host_data;
82
83 /*
84 * If the MSI provider has messed with the second message and
85 * not advertized that it is level-capable, signal the breakage.
86 */
87 WARN_ON(!((info->flags & MSI_FLAG_LEVEL_CAPABLE) &&
88 (info->chip->flags & IRQCHIP_SUPPORTS_LEVEL_MSI)) &&
89 (msg[1].address_lo || msg[1].address_hi || msg[1].data));
90}
91
92/**
93 * msi_domain_set_affinity - Generic affinity setter function for MSI domains
94 * @irq_data: The irq data associated to the interrupt
95 * @mask: The affinity mask to set
96 * @force: Flag to enforce setting (disable online checks)
97 *
98 * Intended to be used by MSI interrupt controllers which are
99 * implemented with hierarchical domains.
100 */
101int msi_domain_set_affinity(struct irq_data *irq_data,
102 const struct cpumask *mask, bool force)
103{
104 struct irq_data *parent = irq_data->parent_data;
105 struct msi_msg msg[2] = { [1] = { }, };
106 int ret;
107
108 ret = parent->chip->irq_set_affinity(parent, mask, force);
109 if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
110 BUG_ON(irq_chip_compose_msi_msg(irq_data, msg));
111 msi_check_level(irq_data->domain, msg);
112 irq_chip_write_msi_msg(irq_data, msg);
113 }
114
115 return ret;
116}
117
118static int msi_domain_activate(struct irq_domain *domain,
119 struct irq_data *irq_data, bool early)
120{
121 struct msi_msg msg[2] = { [1] = { }, };
122
123 BUG_ON(irq_chip_compose_msi_msg(irq_data, msg));
124 msi_check_level(irq_data->domain, msg);
125 irq_chip_write_msi_msg(irq_data, msg);
126 return 0;
127}
128
129static void msi_domain_deactivate(struct irq_domain *domain,
130 struct irq_data *irq_data)
131{
132 struct msi_msg msg[2];
133
134 memset(msg, 0, sizeof(msg));
135 irq_chip_write_msi_msg(irq_data, msg);
136}
137
138static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
139 unsigned int nr_irqs, void *arg)
140{
141 struct msi_domain_info *info = domain->host_data;
142 struct msi_domain_ops *ops = info->ops;
143 irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
144 int i, ret;
145
146 if (irq_find_mapping(domain, hwirq) > 0)
147 return -EEXIST;
148
149 if (domain->parent) {
150 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
151 if (ret < 0)
152 return ret;
153 }
154
155 for (i = 0; i < nr_irqs; i++) {
156 ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
157 if (ret < 0) {
158 if (ops->msi_free) {
159 for (i--; i > 0; i--)
160 ops->msi_free(domain, info, virq + i);
161 }
162 irq_domain_free_irqs_top(domain, virq, nr_irqs);
163 return ret;
164 }
165 }
166
167 return 0;
168}
169
170static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
171 unsigned int nr_irqs)
172{
173 struct msi_domain_info *info = domain->host_data;
174 int i;
175
176 if (info->ops->msi_free) {
177 for (i = 0; i < nr_irqs; i++)
178 info->ops->msi_free(domain, info, virq + i);
179 }
180 irq_domain_free_irqs_top(domain, virq, nr_irqs);
181}
182
183static const struct irq_domain_ops msi_domain_ops = {
184 .alloc = msi_domain_alloc,
185 .free = msi_domain_free,
186 .activate = msi_domain_activate,
187 .deactivate = msi_domain_deactivate,
188};
189
190static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
191 msi_alloc_info_t *arg)
192{
193 return arg->hwirq;
194}
195
196static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
197 int nvec, msi_alloc_info_t *arg)
198{
199 memset(arg, 0, sizeof(*arg));
200 return 0;
201}
202
203static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
204 struct msi_desc *desc)
205{
206 arg->desc = desc;
207}
208
209static int msi_domain_ops_init(struct irq_domain *domain,
210 struct msi_domain_info *info,
211 unsigned int virq, irq_hw_number_t hwirq,
212 msi_alloc_info_t *arg)
213{
214 irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
215 info->chip_data);
216 if (info->handler && info->handler_name) {
217 __irq_set_handler(virq, info->handler, 0, info->handler_name);
218 if (info->handler_data)
219 irq_set_handler_data(virq, info->handler_data);
220 }
221 return 0;
222}
223
224static int msi_domain_ops_check(struct irq_domain *domain,
225 struct msi_domain_info *info,
226 struct device *dev)
227{
228 return 0;
229}
230
231static struct msi_domain_ops msi_domain_ops_default = {
232 .get_hwirq = msi_domain_ops_get_hwirq,
233 .msi_init = msi_domain_ops_init,
234 .msi_check = msi_domain_ops_check,
235 .msi_prepare = msi_domain_ops_prepare,
236 .set_desc = msi_domain_ops_set_desc,
237 .domain_alloc_irqs = __msi_domain_alloc_irqs,
238 .domain_free_irqs = __msi_domain_free_irqs,
239};
240
241static void msi_domain_update_dom_ops(struct msi_domain_info *info)
242{
243 struct msi_domain_ops *ops = info->ops;
244
245 if (ops == NULL) {
246 info->ops = &msi_domain_ops_default;
247 return;
248 }
249
250 if (ops->domain_alloc_irqs == NULL)
251 ops->domain_alloc_irqs = msi_domain_ops_default.domain_alloc_irqs;
252 if (ops->domain_free_irqs == NULL)
253 ops->domain_free_irqs = msi_domain_ops_default.domain_free_irqs;
254
255 if (!(info->flags & MSI_FLAG_USE_DEF_DOM_OPS))
256 return;
257
258 if (ops->get_hwirq == NULL)
259 ops->get_hwirq = msi_domain_ops_default.get_hwirq;
260 if (ops->msi_init == NULL)
261 ops->msi_init = msi_domain_ops_default.msi_init;
262 if (ops->msi_check == NULL)
263 ops->msi_check = msi_domain_ops_default.msi_check;
264 if (ops->msi_prepare == NULL)
265 ops->msi_prepare = msi_domain_ops_default.msi_prepare;
266 if (ops->set_desc == NULL)
267 ops->set_desc = msi_domain_ops_default.set_desc;
268}
269
270static void msi_domain_update_chip_ops(struct msi_domain_info *info)
271{
272 struct irq_chip *chip = info->chip;
273
274 BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
275 if (!chip->irq_set_affinity)
276 chip->irq_set_affinity = msi_domain_set_affinity;
277}
278
279/**
280 * msi_create_irq_domain - Create a MSI interrupt domain
281 * @fwnode: Optional fwnode of the interrupt controller
282 * @info: MSI domain info
283 * @parent: Parent irq domain
284 */
285struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
286 struct msi_domain_info *info,
287 struct irq_domain *parent)
288{
289 struct irq_domain *domain;
290
291 msi_domain_update_dom_ops(info);
292 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
293 msi_domain_update_chip_ops(info);
294
295 domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0,
296 fwnode, &msi_domain_ops, info);
297
298 if (domain && !domain->name && info->chip)
299 domain->name = info->chip->name;
300
301 return domain;
302}
303
304int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
305 int nvec, msi_alloc_info_t *arg)
306{
307 struct msi_domain_info *info = domain->host_data;
308 struct msi_domain_ops *ops = info->ops;
309 int ret;
310
311 ret = ops->msi_check(domain, info, dev);
312 if (ret == 0)
313 ret = ops->msi_prepare(domain, dev, nvec, arg);
314
315 return ret;
316}
317
318int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
319 int virq, int nvec, msi_alloc_info_t *arg)
320{
321 struct msi_domain_info *info = domain->host_data;
322 struct msi_domain_ops *ops = info->ops;
323 struct msi_desc *desc;
324 int ret = 0;
325
326 for_each_msi_entry(desc, dev) {
327 /* Don't even try the multi-MSI brain damage. */
328 if (WARN_ON(!desc->irq || desc->nvec_used != 1)) {
329 ret = -EINVAL;
330 break;
331 }
332
333 if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
334 continue;
335
336 ops->set_desc(arg, desc);
337 /* Assumes the domain mutex is held! */
338 ret = irq_domain_alloc_irqs_hierarchy(domain, desc->irq, 1,
339 arg);
340 if (ret)
341 break;
342
343 irq_set_msi_desc_off(desc->irq, 0, desc);
344 }
345
346 if (ret) {
347 /* Mop up the damage */
348 for_each_msi_entry(desc, dev) {
349 if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
350 continue;
351
352 irq_domain_free_irqs_common(domain, desc->irq, 1);
353 }
354 }
355
356 return ret;
357}
358
359/*
360 * Carefully check whether the device can use reservation mode. If
361 * reservation mode is enabled then the early activation will assign a
362 * dummy vector to the device. If the PCI/MSI device does not support
363 * masking of the entry then this can result in spurious interrupts when
364 * the device driver is not absolutely careful. But even then a malfunction
365 * of the hardware could result in a spurious interrupt on the dummy vector
366 * and render the device unusable. If the entry can be masked then the core
367 * logic will prevent the spurious interrupt and reservation mode can be
368 * used. For now reservation mode is restricted to PCI/MSI.
369 */
370static bool msi_check_reservation_mode(struct irq_domain *domain,
371 struct msi_domain_info *info,
372 struct device *dev)
373{
374 struct msi_desc *desc;
375
376 switch(domain->bus_token) {
377 case DOMAIN_BUS_PCI_MSI:
378 case DOMAIN_BUS_VMD_MSI:
379 break;
380 default:
381 return false;
382 }
383
384 if (!(info->flags & MSI_FLAG_MUST_REACTIVATE))
385 return false;
386
387 if (IS_ENABLED(CONFIG_PCI_MSI) && pci_msi_ignore_mask)
388 return false;
389
390 /*
391 * Checking the first MSI descriptor is sufficient. MSIX supports
392 * masking and MSI does so when the maskbit is set.
393 */
394 desc = first_msi_entry(dev);
395 return desc->msi_attrib.is_msix || desc->msi_attrib.maskbit;
396}
397
398int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
399 int nvec)
400{
401 struct msi_domain_info *info = domain->host_data;
402 struct msi_domain_ops *ops = info->ops;
403 struct irq_data *irq_data;
404 struct msi_desc *desc;
405 msi_alloc_info_t arg = { };
406 int i, ret, virq;
407 bool can_reserve;
408
409 ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
410 if (ret)
411 return ret;
412
413 for_each_msi_entry(desc, dev) {
414 ops->set_desc(&arg, desc);
415
416 virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
417 dev_to_node(dev), &arg, false,
418 desc->affinity);
419 if (virq < 0) {
420 ret = -ENOSPC;
421 if (ops->handle_error)
422 ret = ops->handle_error(domain, desc, ret);
423 if (ops->msi_finish)
424 ops->msi_finish(&arg, ret);
425 return ret;
426 }
427
428 for (i = 0; i < desc->nvec_used; i++) {
429 irq_set_msi_desc_off(virq, i, desc);
430 irq_debugfs_copy_devname(virq + i, dev);
431 }
432 }
433
434 if (ops->msi_finish)
435 ops->msi_finish(&arg, 0);
436
437 can_reserve = msi_check_reservation_mode(domain, info, dev);
438
439 /*
440 * This flag is set by the PCI layer as we need to activate
441 * the MSI entries before the PCI layer enables MSI in the
442 * card. Otherwise the card latches a random msi message.
443 */
444 if (!(info->flags & MSI_FLAG_ACTIVATE_EARLY))
445 goto skip_activate;
446
447 for_each_msi_vector(desc, i, dev) {
448 if (desc->irq == i) {
449 virq = desc->irq;
450 dev_dbg(dev, "irq [%d-%d] for MSI\n",
451 virq, virq + desc->nvec_used - 1);
452 }
453
454 irq_data = irq_domain_get_irq_data(domain, i);
455 if (!can_reserve) {
456 irqd_clr_can_reserve(irq_data);
457 if (domain->flags & IRQ_DOMAIN_MSI_NOMASK_QUIRK)
458 irqd_set_msi_nomask_quirk(irq_data);
459 }
460 ret = irq_domain_activate_irq(irq_data, can_reserve);
461 if (ret)
462 goto cleanup;
463 }
464
465skip_activate:
466 /*
467 * If these interrupts use reservation mode, clear the activated bit
468 * so request_irq() will assign the final vector.
469 */
470 if (can_reserve) {
471 for_each_msi_vector(desc, i, dev) {
472 irq_data = irq_domain_get_irq_data(domain, i);
473 irqd_clr_activated(irq_data);
474 }
475 }
476 return 0;
477
478cleanup:
479 msi_domain_free_irqs(domain, dev);
480 return ret;
481}
482
483/**
484 * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
485 * @domain: The domain to allocate from
486 * @dev: Pointer to device struct of the device for which the interrupts
487 * are allocated
488 * @nvec: The number of interrupts to allocate
489 *
490 * Returns 0 on success or an error code.
491 */
492int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
493 int nvec)
494{
495 struct msi_domain_info *info = domain->host_data;
496 struct msi_domain_ops *ops = info->ops;
497
498 return ops->domain_alloc_irqs(domain, dev, nvec);
499}
500
501void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
502{
503 struct irq_data *irq_data;
504 struct msi_desc *desc;
505 int i;
506
507 for_each_msi_vector(desc, i, dev) {
508 irq_data = irq_domain_get_irq_data(domain, i);
509 if (irqd_is_activated(irq_data))
510 irq_domain_deactivate_irq(irq_data);
511 }
512
513 for_each_msi_entry(desc, dev) {
514 /*
515 * We might have failed to allocate an MSI early
516 * enough that there is no IRQ associated to this
517 * entry. If that's the case, don't do anything.
518 */
519 if (desc->irq) {
520 irq_domain_free_irqs(desc->irq, desc->nvec_used);
521 desc->irq = 0;
522 }
523 }
524}
525
526/**
527 * __msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
528 * @domain: The domain to managing the interrupts
529 * @dev: Pointer to device struct of the device for which the interrupts
530 * are free
531 */
532void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
533{
534 struct msi_domain_info *info = domain->host_data;
535 struct msi_domain_ops *ops = info->ops;
536
537 return ops->domain_free_irqs(domain, dev);
538}
539
540/**
541 * msi_get_domain_info - Get the MSI interrupt domain info for @domain
542 * @domain: The interrupt domain to retrieve data from
543 *
544 * Returns the pointer to the msi_domain_info stored in
545 * @domain->host_data.
546 */
547struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
548{
549 return (struct msi_domain_info *)domain->host_data;
550}
551
552#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */