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v4.17
 
   1/*
   2 * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
   3 *
   4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
   5 * Copyright (C) 2006 David Brownell (convert to new framework)
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License
   9 * as published by the Free Software Foundation; either version
  10 * 2 of the License, or (at your option) any later version.
  11 */
  12
  13/*
  14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  15 * That defined the register interface now provided by all PCs, some
  16 * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
  17 * integrate an MC146818 clone in their southbridge, and boards use
  18 * that instead of discrete clones like the DS12887 or M48T86.  There
  19 * are also clones that connect using the LPC bus.
  20 *
  21 * That register API is also used directly by various other drivers
  22 * (notably for integrated NVRAM), infrastructure (x86 has code to
  23 * bypass the RTC framework, directly reading the RTC during boot
  24 * and updating minutes/seconds for systems using NTP synch) and
  25 * utilities (like userspace 'hwclock', if no /dev node exists).
  26 *
  27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  28 * interrupts disabled, holding the global rtc_lock, to exclude those
  29 * other drivers and utilities on correctly configured systems.
  30 */
  31
  32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  33
  34#include <linux/kernel.h>
  35#include <linux/module.h>
  36#include <linux/init.h>
  37#include <linux/interrupt.h>
  38#include <linux/spinlock.h>
  39#include <linux/platform_device.h>
  40#include <linux/log2.h>
  41#include <linux/pm.h>
  42#include <linux/of.h>
  43#include <linux/of_platform.h>
  44#ifdef CONFIG_X86
  45#include <asm/i8259.h>
 
 
  46#endif
  47
  48/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  49#include <linux/mc146818rtc.h>
  50
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  51struct cmos_rtc {
  52	struct rtc_device	*rtc;
  53	struct device		*dev;
  54	int			irq;
  55	struct resource		*iomem;
  56	time64_t		alarm_expires;
  57
  58	void			(*wake_on)(struct device *);
  59	void			(*wake_off)(struct device *);
  60
  61	u8			enabled_wake;
  62	u8			suspend_ctrl;
  63
  64	/* newer hardware extends the original register set */
  65	u8			day_alrm;
  66	u8			mon_alrm;
  67	u8			century;
  68
  69	struct rtc_wkalrm	saved_wkalrm;
  70};
  71
  72/* both platform and pnp busses use negative numbers for invalid irqs */
  73#define is_valid_irq(n)		((n) > 0)
  74
  75static const char driver_name[] = "rtc_cmos";
  76
  77/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  78 * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
  79 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  80 */
  81#define	RTC_IRQMASK	(RTC_PF | RTC_AF | RTC_UF)
  82
  83static inline int is_intr(u8 rtc_intr)
  84{
  85	if (!(rtc_intr & RTC_IRQF))
  86		return 0;
  87	return rtc_intr & RTC_IRQMASK;
  88}
  89
  90/*----------------------------------------------------------------*/
  91
  92/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  93 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  94 * used in a broken "legacy replacement" mode.  The breakage includes
  95 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  96 * other (better) use.
  97 *
  98 * When that broken mode is in use, platform glue provides a partial
  99 * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
 100 * want to use HPET for anything except those IRQs though...
 101 */
 102#ifdef CONFIG_HPET_EMULATE_RTC
 103#include <asm/hpet.h>
 104#else
 105
 106static inline int is_hpet_enabled(void)
 107{
 108	return 0;
 109}
 110
 111static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
 112{
 113	return 0;
 114}
 115
 116static inline int hpet_set_rtc_irq_bit(unsigned long mask)
 117{
 118	return 0;
 119}
 120
 121static inline int
 122hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 123{
 124	return 0;
 125}
 126
 127static inline int hpet_set_periodic_freq(unsigned long freq)
 128{
 129	return 0;
 130}
 131
 132static inline int hpet_rtc_dropped_irq(void)
 133{
 134	return 0;
 135}
 136
 137static inline int hpet_rtc_timer_init(void)
 138{
 139	return 0;
 140}
 141
 142extern irq_handler_t hpet_rtc_interrupt;
 143
 144static inline int hpet_register_irq_handler(irq_handler_t handler)
 145{
 146	return 0;
 147}
 148
 149static inline int hpet_unregister_irq_handler(irq_handler_t handler)
 150{
 151	return 0;
 152}
 153
 154#endif
 155
 
 
 
 
 
 
 156/*----------------------------------------------------------------*/
 157
 158#ifdef RTC_PORT
 159
 160/* Most newer x86 systems have two register banks, the first used
 161 * for RTC and NVRAM and the second only for NVRAM.  Caller must
 162 * own rtc_lock ... and we won't worry about access during NMI.
 163 */
 164#define can_bank2	true
 165
 166static inline unsigned char cmos_read_bank2(unsigned char addr)
 167{
 168	outb(addr, RTC_PORT(2));
 169	return inb(RTC_PORT(3));
 170}
 171
 172static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 173{
 174	outb(addr, RTC_PORT(2));
 175	outb(val, RTC_PORT(3));
 176}
 177
 178#else
 179
 180#define can_bank2	false
 181
 182static inline unsigned char cmos_read_bank2(unsigned char addr)
 183{
 184	return 0;
 185}
 186
 187static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 188{
 189}
 190
 191#endif
 192
 193/*----------------------------------------------------------------*/
 194
 195static int cmos_read_time(struct device *dev, struct rtc_time *t)
 196{
 197	/*
 198	 * If pm_trace abused the RTC for storage, set the timespec to 0,
 199	 * which tells the caller that this RTC value is unusable.
 200	 */
 201	if (!pm_trace_rtc_valid())
 202		return -EIO;
 203
 204	/* REVISIT:  if the clock has a "century" register, use
 205	 * that instead of the heuristic in mc146818_get_time().
 206	 * That'll make Y3K compatility (year > 2070) easy!
 207	 */
 208	mc146818_get_time(t);
 209	return 0;
 210}
 211
 212static int cmos_set_time(struct device *dev, struct rtc_time *t)
 213{
 214	/* REVISIT:  set the "century" register if available
 215	 *
 216	 * NOTE: this ignores the issue whereby updating the seconds
 217	 * takes effect exactly 500ms after we write the register.
 218	 * (Also queueing and other delays before we get this far.)
 219	 */
 220	return mc146818_set_time(t);
 221}
 222
 223static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 224{
 225	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 226	unsigned char	rtc_control;
 227
 
 228	if (!is_valid_irq(cmos->irq))
 229		return -EIO;
 230
 231	/* Basic alarms only support hour, minute, and seconds fields.
 232	 * Some also support day and month, for alarms up to a year in
 233	 * the future.
 234	 */
 235
 236	spin_lock_irq(&rtc_lock);
 237	t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
 238	t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
 239	t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
 240
 241	if (cmos->day_alrm) {
 242		/* ignore upper bits on readback per ACPI spec */
 243		t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
 244		if (!t->time.tm_mday)
 245			t->time.tm_mday = -1;
 246
 247		if (cmos->mon_alrm) {
 248			t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
 249			if (!t->time.tm_mon)
 250				t->time.tm_mon = -1;
 251		}
 252	}
 253
 254	rtc_control = CMOS_READ(RTC_CONTROL);
 255	spin_unlock_irq(&rtc_lock);
 256
 257	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 258		if (((unsigned)t->time.tm_sec) < 0x60)
 259			t->time.tm_sec = bcd2bin(t->time.tm_sec);
 260		else
 261			t->time.tm_sec = -1;
 262		if (((unsigned)t->time.tm_min) < 0x60)
 263			t->time.tm_min = bcd2bin(t->time.tm_min);
 264		else
 265			t->time.tm_min = -1;
 266		if (((unsigned)t->time.tm_hour) < 0x24)
 267			t->time.tm_hour = bcd2bin(t->time.tm_hour);
 268		else
 269			t->time.tm_hour = -1;
 270
 271		if (cmos->day_alrm) {
 272			if (((unsigned)t->time.tm_mday) <= 0x31)
 273				t->time.tm_mday = bcd2bin(t->time.tm_mday);
 274			else
 275				t->time.tm_mday = -1;
 276
 277			if (cmos->mon_alrm) {
 278				if (((unsigned)t->time.tm_mon) <= 0x12)
 279					t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
 280				else
 281					t->time.tm_mon = -1;
 282			}
 283		}
 284	}
 285
 286	t->enabled = !!(rtc_control & RTC_AIE);
 287	t->pending = 0;
 288
 289	return 0;
 290}
 291
 292static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
 293{
 294	unsigned char	rtc_intr;
 295
 296	/* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
 297	 * allegedly some older rtcs need that to handle irqs properly
 298	 */
 299	rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
 300
 301	if (is_hpet_enabled())
 302		return;
 303
 304	rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 305	if (is_intr(rtc_intr))
 306		rtc_update_irq(cmos->rtc, 1, rtc_intr);
 307}
 308
 309static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
 310{
 311	unsigned char	rtc_control;
 312
 313	/* flush any pending IRQ status, notably for update irqs,
 314	 * before we enable new IRQs
 315	 */
 316	rtc_control = CMOS_READ(RTC_CONTROL);
 317	cmos_checkintr(cmos, rtc_control);
 318
 319	rtc_control |= mask;
 320	CMOS_WRITE(rtc_control, RTC_CONTROL);
 321	hpet_set_rtc_irq_bit(mask);
 
 
 
 
 
 
 322
 323	cmos_checkintr(cmos, rtc_control);
 324}
 325
 326static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
 327{
 328	unsigned char	rtc_control;
 329
 330	rtc_control = CMOS_READ(RTC_CONTROL);
 331	rtc_control &= ~mask;
 332	CMOS_WRITE(rtc_control, RTC_CONTROL);
 333	hpet_mask_rtc_irq_bit(mask);
 
 
 
 
 
 
 334
 335	cmos_checkintr(cmos, rtc_control);
 336}
 337
 338static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
 339{
 340	struct cmos_rtc *cmos = dev_get_drvdata(dev);
 341	struct rtc_time now;
 342
 343	cmos_read_time(dev, &now);
 344
 345	if (!cmos->day_alrm) {
 346		time64_t t_max_date;
 347		time64_t t_alrm;
 348
 349		t_max_date = rtc_tm_to_time64(&now);
 350		t_max_date += 24 * 60 * 60 - 1;
 351		t_alrm = rtc_tm_to_time64(&t->time);
 352		if (t_alrm > t_max_date) {
 353			dev_err(dev,
 354				"Alarms can be up to one day in the future\n");
 355			return -EINVAL;
 356		}
 357	} else if (!cmos->mon_alrm) {
 358		struct rtc_time max_date = now;
 359		time64_t t_max_date;
 360		time64_t t_alrm;
 361		int max_mday;
 362
 363		if (max_date.tm_mon == 11) {
 364			max_date.tm_mon = 0;
 365			max_date.tm_year += 1;
 366		} else {
 367			max_date.tm_mon += 1;
 368		}
 369		max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
 370		if (max_date.tm_mday > max_mday)
 371			max_date.tm_mday = max_mday;
 372
 373		t_max_date = rtc_tm_to_time64(&max_date);
 374		t_max_date -= 1;
 375		t_alrm = rtc_tm_to_time64(&t->time);
 376		if (t_alrm > t_max_date) {
 377			dev_err(dev,
 378				"Alarms can be up to one month in the future\n");
 379			return -EINVAL;
 380		}
 381	} else {
 382		struct rtc_time max_date = now;
 383		time64_t t_max_date;
 384		time64_t t_alrm;
 385		int max_mday;
 386
 387		max_date.tm_year += 1;
 388		max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
 389		if (max_date.tm_mday > max_mday)
 390			max_date.tm_mday = max_mday;
 391
 392		t_max_date = rtc_tm_to_time64(&max_date);
 393		t_max_date -= 1;
 394		t_alrm = rtc_tm_to_time64(&t->time);
 395		if (t_alrm > t_max_date) {
 396			dev_err(dev,
 397				"Alarms can be up to one year in the future\n");
 398			return -EINVAL;
 399		}
 400	}
 401
 402	return 0;
 403}
 404
 405static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 406{
 407	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 408	unsigned char mon, mday, hrs, min, sec, rtc_control;
 409	int ret;
 410
 
 411	if (!is_valid_irq(cmos->irq))
 412		return -EIO;
 413
 414	ret = cmos_validate_alarm(dev, t);
 415	if (ret < 0)
 416		return ret;
 417
 418	mon = t->time.tm_mon + 1;
 419	mday = t->time.tm_mday;
 420	hrs = t->time.tm_hour;
 421	min = t->time.tm_min;
 422	sec = t->time.tm_sec;
 423
 424	rtc_control = CMOS_READ(RTC_CONTROL);
 425	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 426		/* Writing 0xff means "don't care" or "match all".  */
 427		mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
 428		mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
 429		hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
 430		min = (min < 60) ? bin2bcd(min) : 0xff;
 431		sec = (sec < 60) ? bin2bcd(sec) : 0xff;
 432	}
 433
 434	spin_lock_irq(&rtc_lock);
 435
 436	/* next rtc irq must not be from previous alarm setting */
 437	cmos_irq_disable(cmos, RTC_AIE);
 438
 439	/* update alarm */
 440	CMOS_WRITE(hrs, RTC_HOURS_ALARM);
 441	CMOS_WRITE(min, RTC_MINUTES_ALARM);
 442	CMOS_WRITE(sec, RTC_SECONDS_ALARM);
 443
 444	/* the system may support an "enhanced" alarm */
 445	if (cmos->day_alrm) {
 446		CMOS_WRITE(mday, cmos->day_alrm);
 447		if (cmos->mon_alrm)
 448			CMOS_WRITE(mon, cmos->mon_alrm);
 449	}
 450
 451	/* FIXME the HPET alarm glue currently ignores day_alrm
 452	 * and mon_alrm ...
 453	 */
 454	hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
 
 
 
 
 455
 456	if (t->enabled)
 457		cmos_irq_enable(cmos, RTC_AIE);
 458
 459	spin_unlock_irq(&rtc_lock);
 460
 461	cmos->alarm_expires = rtc_tm_to_time64(&t->time);
 462
 463	return 0;
 464}
 465
 466static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
 467{
 468	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 469	unsigned long	flags;
 470
 471	if (!is_valid_irq(cmos->irq))
 472		return -EINVAL;
 473
 474	spin_lock_irqsave(&rtc_lock, flags);
 475
 476	if (enabled)
 477		cmos_irq_enable(cmos, RTC_AIE);
 478	else
 479		cmos_irq_disable(cmos, RTC_AIE);
 480
 481	spin_unlock_irqrestore(&rtc_lock, flags);
 482	return 0;
 483}
 484
 485#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
 486
 487static int cmos_procfs(struct device *dev, struct seq_file *seq)
 488{
 489	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 490	unsigned char	rtc_control, valid;
 491
 492	spin_lock_irq(&rtc_lock);
 493	rtc_control = CMOS_READ(RTC_CONTROL);
 494	valid = CMOS_READ(RTC_VALID);
 495	spin_unlock_irq(&rtc_lock);
 496
 497	/* NOTE:  at least ICH6 reports battery status using a different
 498	 * (non-RTC) bit; and SQWE is ignored on many current systems.
 499	 */
 500	seq_printf(seq,
 501		   "periodic_IRQ\t: %s\n"
 502		   "update_IRQ\t: %s\n"
 503		   "HPET_emulated\t: %s\n"
 504		   // "square_wave\t: %s\n"
 505		   "BCD\t\t: %s\n"
 506		   "DST_enable\t: %s\n"
 507		   "periodic_freq\t: %d\n"
 508		   "batt_status\t: %s\n",
 509		   (rtc_control & RTC_PIE) ? "yes" : "no",
 510		   (rtc_control & RTC_UIE) ? "yes" : "no",
 511		   is_hpet_enabled() ? "yes" : "no",
 512		   // (rtc_control & RTC_SQWE) ? "yes" : "no",
 513		   (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
 514		   (rtc_control & RTC_DST_EN) ? "yes" : "no",
 515		   cmos->rtc->irq_freq,
 516		   (valid & RTC_VRT) ? "okay" : "dead");
 517
 518	return 0;
 519}
 520
 521#else
 522#define	cmos_procfs	NULL
 523#endif
 524
 525static const struct rtc_class_ops cmos_rtc_ops = {
 526	.read_time		= cmos_read_time,
 527	.set_time		= cmos_set_time,
 528	.read_alarm		= cmos_read_alarm,
 529	.set_alarm		= cmos_set_alarm,
 530	.proc			= cmos_procfs,
 531	.alarm_irq_enable	= cmos_alarm_irq_enable,
 532};
 533
 534/*----------------------------------------------------------------*/
 535
 536/*
 537 * All these chips have at least 64 bytes of address space, shared by
 538 * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
 539 * by boot firmware.  Modern chips have 128 or 256 bytes.
 540 */
 541
 542#define NVRAM_OFFSET	(RTC_REG_D + 1)
 543
 544static int cmos_nvram_read(void *priv, unsigned int off, void *val,
 545			   size_t count)
 546{
 547	unsigned char *buf = val;
 548	int	retval;
 549
 550	off += NVRAM_OFFSET;
 551	spin_lock_irq(&rtc_lock);
 552	for (retval = 0; count; count--, off++, retval++) {
 553		if (off < 128)
 554			*buf++ = CMOS_READ(off);
 555		else if (can_bank2)
 556			*buf++ = cmos_read_bank2(off);
 557		else
 558			break;
 559	}
 560	spin_unlock_irq(&rtc_lock);
 561
 562	return retval;
 563}
 564
 565static int cmos_nvram_write(void *priv, unsigned int off, void *val,
 566			    size_t count)
 567{
 568	struct cmos_rtc	*cmos = priv;
 569	unsigned char	*buf = val;
 570	int		retval;
 571
 572	/* NOTE:  on at least PCs and Ataris, the boot firmware uses a
 573	 * checksum on part of the NVRAM data.  That's currently ignored
 574	 * here.  If userspace is smart enough to know what fields of
 575	 * NVRAM to update, updating checksums is also part of its job.
 576	 */
 577	off += NVRAM_OFFSET;
 578	spin_lock_irq(&rtc_lock);
 579	for (retval = 0; count; count--, off++, retval++) {
 580		/* don't trash RTC registers */
 581		if (off == cmos->day_alrm
 582				|| off == cmos->mon_alrm
 583				|| off == cmos->century)
 584			buf++;
 585		else if (off < 128)
 586			CMOS_WRITE(*buf++, off);
 587		else if (can_bank2)
 588			cmos_write_bank2(*buf++, off);
 589		else
 590			break;
 591	}
 592	spin_unlock_irq(&rtc_lock);
 593
 594	return retval;
 595}
 596
 597/*----------------------------------------------------------------*/
 598
 599static struct cmos_rtc	cmos_rtc;
 600
 601static irqreturn_t cmos_interrupt(int irq, void *p)
 602{
 603	u8		irqstat;
 604	u8		rtc_control;
 605
 606	spin_lock(&rtc_lock);
 607
 608	/* When the HPET interrupt handler calls us, the interrupt
 609	 * status is passed as arg1 instead of the irq number.  But
 610	 * always clear irq status, even when HPET is in the way.
 611	 *
 612	 * Note that HPET and RTC are almost certainly out of phase,
 613	 * giving different IRQ status ...
 614	 */
 615	irqstat = CMOS_READ(RTC_INTR_FLAGS);
 616	rtc_control = CMOS_READ(RTC_CONTROL);
 617	if (is_hpet_enabled())
 618		irqstat = (unsigned long)irq & 0xF0;
 619
 620	/* If we were suspended, RTC_CONTROL may not be accurate since the
 621	 * bios may have cleared it.
 622	 */
 623	if (!cmos_rtc.suspend_ctrl)
 624		irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 625	else
 626		irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
 627
 628	/* All Linux RTC alarms should be treated as if they were oneshot.
 629	 * Similar code may be needed in system wakeup paths, in case the
 630	 * alarm woke the system.
 631	 */
 632	if (irqstat & RTC_AIE) {
 633		cmos_rtc.suspend_ctrl &= ~RTC_AIE;
 634		rtc_control &= ~RTC_AIE;
 635		CMOS_WRITE(rtc_control, RTC_CONTROL);
 636		hpet_mask_rtc_irq_bit(RTC_AIE);
 
 637		CMOS_READ(RTC_INTR_FLAGS);
 638	}
 639	spin_unlock(&rtc_lock);
 640
 641	if (is_intr(irqstat)) {
 642		rtc_update_irq(p, 1, irqstat);
 643		return IRQ_HANDLED;
 644	} else
 645		return IRQ_NONE;
 646}
 647
 648#ifdef	CONFIG_PNP
 649#define	INITSECTION
 650
 651#else
 652#define	INITSECTION	__init
 653#endif
 654
 655static int INITSECTION
 656cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
 657{
 658	struct cmos_rtc_board_info	*info = dev_get_platdata(dev);
 659	int				retval = 0;
 660	unsigned char			rtc_control;
 661	unsigned			address_space;
 662	u32				flags = 0;
 663	struct nvmem_config nvmem_cfg = {
 664		.name = "cmos_nvram",
 665		.word_size = 1,
 666		.stride = 1,
 667		.reg_read = cmos_nvram_read,
 668		.reg_write = cmos_nvram_write,
 669		.priv = &cmos_rtc,
 670	};
 671
 672	/* there can be only one ... */
 673	if (cmos_rtc.dev)
 674		return -EBUSY;
 675
 676	if (!ports)
 677		return -ENODEV;
 678
 679	/* Claim I/O ports ASAP, minimizing conflict with legacy driver.
 680	 *
 681	 * REVISIT non-x86 systems may instead use memory space resources
 682	 * (needing ioremap etc), not i/o space resources like this ...
 683	 */
 684	if (RTC_IOMAPPED)
 685		ports = request_region(ports->start, resource_size(ports),
 686				       driver_name);
 687	else
 688		ports = request_mem_region(ports->start, resource_size(ports),
 689					   driver_name);
 690	if (!ports) {
 691		dev_dbg(dev, "i/o registers already in use\n");
 692		return -EBUSY;
 693	}
 694
 695	cmos_rtc.irq = rtc_irq;
 696	cmos_rtc.iomem = ports;
 697
 698	/* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
 699	 * driver did, but don't reject unknown configs.   Old hardware
 700	 * won't address 128 bytes.  Newer chips have multiple banks,
 701	 * though they may not be listed in one I/O resource.
 702	 */
 703#if	defined(CONFIG_ATARI)
 704	address_space = 64;
 705#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
 706			|| defined(__sparc__) || defined(__mips__) \
 707			|| defined(__powerpc__)
 708	address_space = 128;
 709#else
 710#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
 711	address_space = 128;
 712#endif
 713	if (can_bank2 && ports->end > (ports->start + 1))
 714		address_space = 256;
 715
 716	/* For ACPI systems extension info comes from the FADT.  On others,
 717	 * board specific setup provides it as appropriate.  Systems where
 718	 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
 719	 * some almost-clones) can provide hooks to make that behave.
 720	 *
 721	 * Note that ACPI doesn't preclude putting these registers into
 722	 * "extended" areas of the chip, including some that we won't yet
 723	 * expect CMOS_READ and friends to handle.
 724	 */
 725	if (info) {
 726		if (info->flags)
 727			flags = info->flags;
 728		if (info->address_space)
 729			address_space = info->address_space;
 730
 731		if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
 732			cmos_rtc.day_alrm = info->rtc_day_alarm;
 733		if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
 734			cmos_rtc.mon_alrm = info->rtc_mon_alarm;
 735		if (info->rtc_century && info->rtc_century < 128)
 736			cmos_rtc.century = info->rtc_century;
 737
 738		if (info->wake_on && info->wake_off) {
 739			cmos_rtc.wake_on = info->wake_on;
 740			cmos_rtc.wake_off = info->wake_off;
 741		}
 742	}
 743
 744	cmos_rtc.dev = dev;
 745	dev_set_drvdata(dev, &cmos_rtc);
 746
 747	cmos_rtc.rtc = devm_rtc_allocate_device(dev);
 748	if (IS_ERR(cmos_rtc.rtc)) {
 749		retval = PTR_ERR(cmos_rtc.rtc);
 750		goto cleanup0;
 751	}
 752
 753	rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
 754
 755	spin_lock_irq(&rtc_lock);
 756
 
 
 
 
 
 
 
 
 757	if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
 758		/* force periodic irq to CMOS reset default of 1024Hz;
 759		 *
 760		 * REVISIT it's been reported that at least one x86_64 ALI
 761		 * mobo doesn't use 32KHz here ... for portability we might
 762		 * need to do something about other clock frequencies.
 763		 */
 764		cmos_rtc.rtc->irq_freq = 1024;
 765		hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
 
 766		CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
 767	}
 768
 769	/* disable irqs */
 770	if (is_valid_irq(rtc_irq))
 771		cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
 772
 773	rtc_control = CMOS_READ(RTC_CONTROL);
 774
 775	spin_unlock_irq(&rtc_lock);
 776
 777	if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
 778		dev_warn(dev, "only 24-hr supported\n");
 779		retval = -ENXIO;
 780		goto cleanup1;
 781	}
 782
 783	hpet_rtc_timer_init();
 
 784
 785	if (is_valid_irq(rtc_irq)) {
 786		irq_handler_t rtc_cmos_int_handler;
 787
 788		if (is_hpet_enabled()) {
 789			rtc_cmos_int_handler = hpet_rtc_interrupt;
 790			retval = hpet_register_irq_handler(cmos_interrupt);
 791			if (retval) {
 792				hpet_mask_rtc_irq_bit(RTC_IRQMASK);
 793				dev_warn(dev, "hpet_register_irq_handler "
 794						" failed in rtc_init().");
 795				goto cleanup1;
 796			}
 797		} else
 798			rtc_cmos_int_handler = cmos_interrupt;
 799
 800		retval = request_irq(rtc_irq, rtc_cmos_int_handler,
 801				IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
 802				cmos_rtc.rtc);
 803		if (retval < 0) {
 804			dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
 805			goto cleanup1;
 806		}
 
 
 807	}
 808
 809	cmos_rtc.rtc->ops = &cmos_rtc_ops;
 810	cmos_rtc.rtc->nvram_old_abi = true;
 811	retval = rtc_register_device(cmos_rtc.rtc);
 812	if (retval)
 813		goto cleanup2;
 814
 
 
 
 815	/* export at least the first block of NVRAM */
 816	nvmem_cfg.size = address_space - NVRAM_OFFSET;
 817	if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg))
 818		dev_err(dev, "nvmem registration failed\n");
 819
 820	dev_info(dev, "%s%s, %d bytes nvram%s\n",
 821		 !is_valid_irq(rtc_irq) ? "no alarms" :
 822		 cmos_rtc.mon_alrm ? "alarms up to one year" :
 823		 cmos_rtc.day_alrm ? "alarms up to one month" :
 824		 "alarms up to one day",
 825		 cmos_rtc.century ? ", y3k" : "",
 826		 nvmem_cfg.size,
 827		 is_hpet_enabled() ? ", hpet irqs" : "");
 828
 829	return 0;
 830
 831cleanup2:
 832	if (is_valid_irq(rtc_irq))
 833		free_irq(rtc_irq, cmos_rtc.rtc);
 834cleanup1:
 835	cmos_rtc.dev = NULL;
 836cleanup0:
 837	if (RTC_IOMAPPED)
 838		release_region(ports->start, resource_size(ports));
 839	else
 840		release_mem_region(ports->start, resource_size(ports));
 841	return retval;
 842}
 843
 844static void cmos_do_shutdown(int rtc_irq)
 845{
 846	spin_lock_irq(&rtc_lock);
 847	if (is_valid_irq(rtc_irq))
 848		cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
 849	spin_unlock_irq(&rtc_lock);
 850}
 851
 852static void cmos_do_remove(struct device *dev)
 853{
 854	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 855	struct resource *ports;
 856
 857	cmos_do_shutdown(cmos->irq);
 858
 859	if (is_valid_irq(cmos->irq)) {
 860		free_irq(cmos->irq, cmos->rtc);
 861		hpet_unregister_irq_handler(cmos_interrupt);
 
 862	}
 863
 864	cmos->rtc = NULL;
 865
 866	ports = cmos->iomem;
 867	if (RTC_IOMAPPED)
 868		release_region(ports->start, resource_size(ports));
 869	else
 870		release_mem_region(ports->start, resource_size(ports));
 871	cmos->iomem = NULL;
 872
 873	cmos->dev = NULL;
 874}
 875
 876static int cmos_aie_poweroff(struct device *dev)
 877{
 878	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 879	struct rtc_time now;
 880	time64_t t_now;
 881	int retval = 0;
 882	unsigned char rtc_control;
 883
 884	if (!cmos->alarm_expires)
 885		return -EINVAL;
 886
 887	spin_lock_irq(&rtc_lock);
 888	rtc_control = CMOS_READ(RTC_CONTROL);
 889	spin_unlock_irq(&rtc_lock);
 890
 891	/* We only care about the situation where AIE is disabled. */
 892	if (rtc_control & RTC_AIE)
 893		return -EBUSY;
 894
 895	cmos_read_time(dev, &now);
 896	t_now = rtc_tm_to_time64(&now);
 897
 898	/*
 899	 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
 900	 * automatically right after shutdown on some buggy boxes.
 901	 * This automatic rebooting issue won't happen when the alarm
 902	 * time is larger than now+1 seconds.
 903	 *
 904	 * If the alarm time is equal to now+1 seconds, the issue can be
 905	 * prevented by cancelling the alarm.
 906	 */
 907	if (cmos->alarm_expires == t_now + 1) {
 908		struct rtc_wkalrm alarm;
 909
 910		/* Cancel the AIE timer by configuring the past time. */
 911		rtc_time64_to_tm(t_now - 1, &alarm.time);
 912		alarm.enabled = 0;
 913		retval = cmos_set_alarm(dev, &alarm);
 914	} else if (cmos->alarm_expires > t_now + 1) {
 915		retval = -EBUSY;
 916	}
 917
 918	return retval;
 919}
 920
 921static int cmos_suspend(struct device *dev)
 922{
 923	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 924	unsigned char	tmp;
 925
 926	/* only the alarm might be a wakeup event source */
 927	spin_lock_irq(&rtc_lock);
 928	cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
 929	if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
 930		unsigned char	mask;
 931
 932		if (device_may_wakeup(dev))
 933			mask = RTC_IRQMASK & ~RTC_AIE;
 934		else
 935			mask = RTC_IRQMASK;
 936		tmp &= ~mask;
 937		CMOS_WRITE(tmp, RTC_CONTROL);
 938		hpet_mask_rtc_irq_bit(mask);
 939
 940		cmos_checkintr(cmos, tmp);
 941	}
 942	spin_unlock_irq(&rtc_lock);
 943
 944	if (tmp & RTC_AIE) {
 945		cmos->enabled_wake = 1;
 946		if (cmos->wake_on)
 947			cmos->wake_on(dev);
 948		else
 949			enable_irq_wake(cmos->irq);
 950	}
 951
 
 952	cmos_read_alarm(dev, &cmos->saved_wkalrm);
 953
 954	dev_dbg(dev, "suspend%s, ctrl %02x\n",
 955			(tmp & RTC_AIE) ? ", alarm may wake" : "",
 956			tmp);
 957
 958	return 0;
 959}
 960
 961/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
 962 * after a detour through G3 "mechanical off", although the ACPI spec
 963 * says wakeup should only work from G1/S4 "hibernate".  To most users,
 964 * distinctions between S4 and S5 are pointless.  So when the hardware
 965 * allows, don't draw that distinction.
 966 */
 967static inline int cmos_poweroff(struct device *dev)
 968{
 969	if (!IS_ENABLED(CONFIG_PM))
 970		return -ENOSYS;
 971
 972	return cmos_suspend(dev);
 973}
 974
 975static void cmos_check_wkalrm(struct device *dev)
 976{
 977	struct cmos_rtc *cmos = dev_get_drvdata(dev);
 978	struct rtc_wkalrm current_alarm;
 
 979	time64_t t_current_expires;
 980	time64_t t_saved_expires;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 981
 
 982	cmos_read_alarm(dev, &current_alarm);
 983	t_current_expires = rtc_tm_to_time64(&current_alarm.time);
 984	t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
 985	if (t_current_expires != t_saved_expires ||
 986	    cmos->saved_wkalrm.enabled != current_alarm.enabled) {
 987		cmos_set_alarm(dev, &cmos->saved_wkalrm);
 988	}
 989}
 990
 991static void cmos_check_acpi_rtc_status(struct device *dev,
 992				       unsigned char *rtc_control);
 993
 994static int __maybe_unused cmos_resume(struct device *dev)
 995{
 996	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 997	unsigned char tmp;
 998
 999	if (cmos->enabled_wake) {
1000		if (cmos->wake_off)
1001			cmos->wake_off(dev);
1002		else
1003			disable_irq_wake(cmos->irq);
1004		cmos->enabled_wake = 0;
1005	}
1006
1007	/* The BIOS might have changed the alarm, restore it */
1008	cmos_check_wkalrm(dev);
1009
1010	spin_lock_irq(&rtc_lock);
1011	tmp = cmos->suspend_ctrl;
1012	cmos->suspend_ctrl = 0;
1013	/* re-enable any irqs previously active */
1014	if (tmp & RTC_IRQMASK) {
1015		unsigned char	mask;
1016
1017		if (device_may_wakeup(dev))
1018			hpet_rtc_timer_init();
1019
1020		do {
1021			CMOS_WRITE(tmp, RTC_CONTROL);
1022			hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
 
1023
1024			mask = CMOS_READ(RTC_INTR_FLAGS);
1025			mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1026			if (!is_hpet_enabled() || !is_intr(mask))
1027				break;
1028
1029			/* force one-shot behavior if HPET blocked
1030			 * the wake alarm's irq
1031			 */
1032			rtc_update_irq(cmos->rtc, 1, mask);
1033			tmp &= ~RTC_AIE;
1034			hpet_mask_rtc_irq_bit(RTC_AIE);
1035		} while (mask & RTC_AIE);
1036
1037		if (tmp & RTC_AIE)
1038			cmos_check_acpi_rtc_status(dev, &tmp);
1039	}
1040	spin_unlock_irq(&rtc_lock);
1041
1042	dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1043
1044	return 0;
1045}
1046
1047static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1048
1049/*----------------------------------------------------------------*/
1050
1051/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1052 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1053 * probably list them in similar PNPBIOS tables; so PNP is more common.
1054 *
1055 * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
1056 * predate even PNPBIOS should set up platform_bus devices.
1057 */
1058
1059#ifdef	CONFIG_ACPI
1060
1061#include <linux/acpi.h>
1062
1063static u32 rtc_handler(void *context)
1064{
1065	struct device *dev = context;
1066	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1067	unsigned char rtc_control = 0;
1068	unsigned char rtc_intr;
1069	unsigned long flags;
1070
1071	spin_lock_irqsave(&rtc_lock, flags);
1072	if (cmos_rtc.suspend_ctrl)
1073		rtc_control = CMOS_READ(RTC_CONTROL);
1074	if (rtc_control & RTC_AIE) {
1075		cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1076		CMOS_WRITE(rtc_control, RTC_CONTROL);
1077		rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1078		rtc_update_irq(cmos->rtc, 1, rtc_intr);
 
 
 
 
 
 
 
 
 
 
 
 
1079	}
1080	spin_unlock_irqrestore(&rtc_lock, flags);
1081
1082	pm_wakeup_hard_event(dev);
1083	acpi_clear_event(ACPI_EVENT_RTC);
1084	acpi_disable_event(ACPI_EVENT_RTC, 0);
1085	return ACPI_INTERRUPT_HANDLED;
1086}
1087
1088static inline void rtc_wake_setup(struct device *dev)
1089{
1090	acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1091	/*
1092	 * After the RTC handler is installed, the Fixed_RTC event should
1093	 * be disabled. Only when the RTC alarm is set will it be enabled.
1094	 */
1095	acpi_clear_event(ACPI_EVENT_RTC);
1096	acpi_disable_event(ACPI_EVENT_RTC, 0);
1097}
1098
1099static void rtc_wake_on(struct device *dev)
1100{
1101	acpi_clear_event(ACPI_EVENT_RTC);
1102	acpi_enable_event(ACPI_EVENT_RTC, 0);
1103}
1104
1105static void rtc_wake_off(struct device *dev)
1106{
1107	acpi_disable_event(ACPI_EVENT_RTC, 0);
1108}
1109
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1110/* Every ACPI platform has a mc146818 compatible "cmos rtc".  Here we find
1111 * its device node and pass extra config data.  This helps its driver use
1112 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1113 * that this board's RTC is wakeup-capable (per ACPI spec).
1114 */
1115static struct cmos_rtc_board_info acpi_rtc_info;
1116
1117static void cmos_wake_setup(struct device *dev)
1118{
1119	if (acpi_disabled)
1120		return;
1121
 
 
1122	rtc_wake_setup(dev);
1123	acpi_rtc_info.wake_on = rtc_wake_on;
1124	acpi_rtc_info.wake_off = rtc_wake_off;
1125
1126	/* workaround bug in some ACPI tables */
1127	if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1128		dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1129			acpi_gbl_FADT.month_alarm);
1130		acpi_gbl_FADT.month_alarm = 0;
1131	}
1132
1133	acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1134	acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1135	acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1136
1137	/* NOTE:  S4_RTC_WAKE is NOT currently useful to Linux */
1138	if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1139		dev_info(dev, "RTC can wake from S4\n");
1140
1141	dev->platform_data = &acpi_rtc_info;
1142
1143	/* RTC always wakes from S1/S2/S3, and often S4/STD */
1144	device_init_wakeup(dev, 1);
1145}
1146
1147static void cmos_check_acpi_rtc_status(struct device *dev,
1148				       unsigned char *rtc_control)
1149{
1150	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1151	acpi_event_status rtc_status;
1152	acpi_status status;
1153
1154	if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1155		return;
1156
1157	status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1158	if (ACPI_FAILURE(status)) {
1159		dev_err(dev, "Could not get RTC status\n");
1160	} else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1161		unsigned char mask;
1162		*rtc_control &= ~RTC_AIE;
1163		CMOS_WRITE(*rtc_control, RTC_CONTROL);
1164		mask = CMOS_READ(RTC_INTR_FLAGS);
1165		rtc_update_irq(cmos->rtc, 1, mask);
1166	}
1167}
1168
1169#else
1170
1171static void cmos_wake_setup(struct device *dev)
1172{
1173}
1174
1175static void cmos_check_acpi_rtc_status(struct device *dev,
1176				       unsigned char *rtc_control)
1177{
1178}
1179
1180#endif
1181
1182#ifdef	CONFIG_PNP
1183
1184#include <linux/pnp.h>
1185
1186static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1187{
1188	cmos_wake_setup(&pnp->dev);
1189
1190	if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1191		unsigned int irq = 0;
1192#ifdef CONFIG_X86
1193		/* Some machines contain a PNP entry for the RTC, but
1194		 * don't define the IRQ. It should always be safe to
1195		 * hardcode it on systems with a legacy PIC.
1196		 */
1197		if (nr_legacy_irqs())
1198			irq = 8;
1199#endif
1200		return cmos_do_probe(&pnp->dev,
1201				pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1202	} else {
1203		return cmos_do_probe(&pnp->dev,
1204				pnp_get_resource(pnp, IORESOURCE_IO, 0),
1205				pnp_irq(pnp, 0));
1206	}
1207}
1208
1209static void cmos_pnp_remove(struct pnp_dev *pnp)
1210{
1211	cmos_do_remove(&pnp->dev);
1212}
1213
1214static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1215{
1216	struct device *dev = &pnp->dev;
1217	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1218
1219	if (system_state == SYSTEM_POWER_OFF) {
1220		int retval = cmos_poweroff(dev);
1221
1222		if (cmos_aie_poweroff(dev) < 0 && !retval)
1223			return;
1224	}
1225
1226	cmos_do_shutdown(cmos->irq);
1227}
1228
1229static const struct pnp_device_id rtc_ids[] = {
1230	{ .id = "PNP0b00", },
1231	{ .id = "PNP0b01", },
1232	{ .id = "PNP0b02", },
1233	{ },
1234};
1235MODULE_DEVICE_TABLE(pnp, rtc_ids);
1236
1237static struct pnp_driver cmos_pnp_driver = {
1238	.name		= (char *) driver_name,
1239	.id_table	= rtc_ids,
1240	.probe		= cmos_pnp_probe,
1241	.remove		= cmos_pnp_remove,
1242	.shutdown	= cmos_pnp_shutdown,
1243
1244	/* flag ensures resume() gets called, and stops syslog spam */
1245	.flags		= PNP_DRIVER_RES_DO_NOT_CHANGE,
1246	.driver		= {
1247			.pm = &cmos_pm_ops,
1248	},
1249};
1250
1251#endif	/* CONFIG_PNP */
1252
1253#ifdef CONFIG_OF
1254static const struct of_device_id of_cmos_match[] = {
1255	{
1256		.compatible = "motorola,mc146818",
1257	},
1258	{ },
1259};
1260MODULE_DEVICE_TABLE(of, of_cmos_match);
1261
1262static __init void cmos_of_init(struct platform_device *pdev)
1263{
1264	struct device_node *node = pdev->dev.of_node;
1265	const __be32 *val;
1266
1267	if (!node)
1268		return;
1269
1270	val = of_get_property(node, "ctrl-reg", NULL);
1271	if (val)
1272		CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1273
1274	val = of_get_property(node, "freq-reg", NULL);
1275	if (val)
1276		CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1277}
1278#else
1279static inline void cmos_of_init(struct platform_device *pdev) {}
1280#endif
1281/*----------------------------------------------------------------*/
1282
1283/* Platform setup should have set up an RTC device, when PNP is
1284 * unavailable ... this could happen even on (older) PCs.
1285 */
1286
1287static int __init cmos_platform_probe(struct platform_device *pdev)
1288{
1289	struct resource *resource;
1290	int irq;
1291
1292	cmos_of_init(pdev);
1293	cmos_wake_setup(&pdev->dev);
1294
1295	if (RTC_IOMAPPED)
1296		resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1297	else
1298		resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1299	irq = platform_get_irq(pdev, 0);
1300	if (irq < 0)
1301		irq = -1;
1302
1303	return cmos_do_probe(&pdev->dev, resource, irq);
1304}
1305
1306static int cmos_platform_remove(struct platform_device *pdev)
1307{
1308	cmos_do_remove(&pdev->dev);
1309	return 0;
1310}
1311
1312static void cmos_platform_shutdown(struct platform_device *pdev)
1313{
1314	struct device *dev = &pdev->dev;
1315	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1316
1317	if (system_state == SYSTEM_POWER_OFF) {
1318		int retval = cmos_poweroff(dev);
1319
1320		if (cmos_aie_poweroff(dev) < 0 && !retval)
1321			return;
1322	}
1323
1324	cmos_do_shutdown(cmos->irq);
1325}
1326
1327/* work with hotplug and coldplug */
1328MODULE_ALIAS("platform:rtc_cmos");
1329
1330static struct platform_driver cmos_platform_driver = {
1331	.remove		= cmos_platform_remove,
1332	.shutdown	= cmos_platform_shutdown,
1333	.driver = {
1334		.name		= driver_name,
1335		.pm		= &cmos_pm_ops,
1336		.of_match_table = of_match_ptr(of_cmos_match),
1337	}
1338};
1339
1340#ifdef CONFIG_PNP
1341static bool pnp_driver_registered;
1342#endif
1343static bool platform_driver_registered;
1344
1345static int __init cmos_init(void)
1346{
1347	int retval = 0;
1348
1349#ifdef	CONFIG_PNP
1350	retval = pnp_register_driver(&cmos_pnp_driver);
1351	if (retval == 0)
1352		pnp_driver_registered = true;
1353#endif
1354
1355	if (!cmos_rtc.dev) {
1356		retval = platform_driver_probe(&cmos_platform_driver,
1357					       cmos_platform_probe);
1358		if (retval == 0)
1359			platform_driver_registered = true;
1360	}
1361
1362	if (retval == 0)
1363		return 0;
1364
1365#ifdef	CONFIG_PNP
1366	if (pnp_driver_registered)
1367		pnp_unregister_driver(&cmos_pnp_driver);
1368#endif
1369	return retval;
1370}
1371module_init(cmos_init);
1372
1373static void __exit cmos_exit(void)
1374{
1375#ifdef	CONFIG_PNP
1376	if (pnp_driver_registered)
1377		pnp_unregister_driver(&cmos_pnp_driver);
1378#endif
1379	if (platform_driver_registered)
1380		platform_driver_unregister(&cmos_platform_driver);
1381}
1382module_exit(cmos_exit);
1383
1384
1385MODULE_AUTHOR("David Brownell");
1386MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1387MODULE_LICENSE("GPL");
v5.14.15
   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
   4 *
   5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
   6 * Copyright (C) 2006 David Brownell (convert to new framework)
 
 
 
 
 
   7 */
   8
   9/*
  10 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  11 * That defined the register interface now provided by all PCs, some
  12 * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
  13 * integrate an MC146818 clone in their southbridge, and boards use
  14 * that instead of discrete clones like the DS12887 or M48T86.  There
  15 * are also clones that connect using the LPC bus.
  16 *
  17 * That register API is also used directly by various other drivers
  18 * (notably for integrated NVRAM), infrastructure (x86 has code to
  19 * bypass the RTC framework, directly reading the RTC during boot
  20 * and updating minutes/seconds for systems using NTP synch) and
  21 * utilities (like userspace 'hwclock', if no /dev node exists).
  22 *
  23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  24 * interrupts disabled, holding the global rtc_lock, to exclude those
  25 * other drivers and utilities on correctly configured systems.
  26 */
  27
  28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29
  30#include <linux/kernel.h>
  31#include <linux/module.h>
  32#include <linux/init.h>
  33#include <linux/interrupt.h>
  34#include <linux/spinlock.h>
  35#include <linux/platform_device.h>
  36#include <linux/log2.h>
  37#include <linux/pm.h>
  38#include <linux/of.h>
  39#include <linux/of_platform.h>
  40#ifdef CONFIG_X86
  41#include <asm/i8259.h>
  42#include <asm/processor.h>
  43#include <linux/dmi.h>
  44#endif
  45
  46/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  47#include <linux/mc146818rtc.h>
  48
  49#ifdef CONFIG_ACPI
  50/*
  51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
  52 *
  53 * If cleared, ACPI SCI is only used to wake up the system from suspend
  54 *
  55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
  56 */
  57
  58static bool use_acpi_alarm;
  59module_param(use_acpi_alarm, bool, 0444);
  60
  61static inline int cmos_use_acpi_alarm(void)
  62{
  63	return use_acpi_alarm;
  64}
  65#else /* !CONFIG_ACPI */
  66
  67static inline int cmos_use_acpi_alarm(void)
  68{
  69	return 0;
  70}
  71#endif
  72
  73struct cmos_rtc {
  74	struct rtc_device	*rtc;
  75	struct device		*dev;
  76	int			irq;
  77	struct resource		*iomem;
  78	time64_t		alarm_expires;
  79
  80	void			(*wake_on)(struct device *);
  81	void			(*wake_off)(struct device *);
  82
  83	u8			enabled_wake;
  84	u8			suspend_ctrl;
  85
  86	/* newer hardware extends the original register set */
  87	u8			day_alrm;
  88	u8			mon_alrm;
  89	u8			century;
  90
  91	struct rtc_wkalrm	saved_wkalrm;
  92};
  93
  94/* both platform and pnp busses use negative numbers for invalid irqs */
  95#define is_valid_irq(n)		((n) > 0)
  96
  97static const char driver_name[] = "rtc_cmos";
  98
  99/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
 100 * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
 101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
 102 */
 103#define	RTC_IRQMASK	(RTC_PF | RTC_AF | RTC_UF)
 104
 105static inline int is_intr(u8 rtc_intr)
 106{
 107	if (!(rtc_intr & RTC_IRQF))
 108		return 0;
 109	return rtc_intr & RTC_IRQMASK;
 110}
 111
 112/*----------------------------------------------------------------*/
 113
 114/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
 115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
 116 * used in a broken "legacy replacement" mode.  The breakage includes
 117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
 118 * other (better) use.
 119 *
 120 * When that broken mode is in use, platform glue provides a partial
 121 * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
 122 * want to use HPET for anything except those IRQs though...
 123 */
 124#ifdef CONFIG_HPET_EMULATE_RTC
 125#include <asm/hpet.h>
 126#else
 127
 128static inline int is_hpet_enabled(void)
 129{
 130	return 0;
 131}
 132
 133static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
 134{
 135	return 0;
 136}
 137
 138static inline int hpet_set_rtc_irq_bit(unsigned long mask)
 139{
 140	return 0;
 141}
 142
 143static inline int
 144hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 145{
 146	return 0;
 147}
 148
 149static inline int hpet_set_periodic_freq(unsigned long freq)
 150{
 151	return 0;
 152}
 153
 154static inline int hpet_rtc_dropped_irq(void)
 155{
 156	return 0;
 157}
 158
 159static inline int hpet_rtc_timer_init(void)
 160{
 161	return 0;
 162}
 163
 164extern irq_handler_t hpet_rtc_interrupt;
 165
 166static inline int hpet_register_irq_handler(irq_handler_t handler)
 167{
 168	return 0;
 169}
 170
 171static inline int hpet_unregister_irq_handler(irq_handler_t handler)
 172{
 173	return 0;
 174}
 175
 176#endif
 177
 178/* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
 179static inline int use_hpet_alarm(void)
 180{
 181	return is_hpet_enabled() && !cmos_use_acpi_alarm();
 182}
 183
 184/*----------------------------------------------------------------*/
 185
 186#ifdef RTC_PORT
 187
 188/* Most newer x86 systems have two register banks, the first used
 189 * for RTC and NVRAM and the second only for NVRAM.  Caller must
 190 * own rtc_lock ... and we won't worry about access during NMI.
 191 */
 192#define can_bank2	true
 193
 194static inline unsigned char cmos_read_bank2(unsigned char addr)
 195{
 196	outb(addr, RTC_PORT(2));
 197	return inb(RTC_PORT(3));
 198}
 199
 200static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 201{
 202	outb(addr, RTC_PORT(2));
 203	outb(val, RTC_PORT(3));
 204}
 205
 206#else
 207
 208#define can_bank2	false
 209
 210static inline unsigned char cmos_read_bank2(unsigned char addr)
 211{
 212	return 0;
 213}
 214
 215static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
 216{
 217}
 218
 219#endif
 220
 221/*----------------------------------------------------------------*/
 222
 223static int cmos_read_time(struct device *dev, struct rtc_time *t)
 224{
 225	/*
 226	 * If pm_trace abused the RTC for storage, set the timespec to 0,
 227	 * which tells the caller that this RTC value is unusable.
 228	 */
 229	if (!pm_trace_rtc_valid())
 230		return -EIO;
 231
 232	/* REVISIT:  if the clock has a "century" register, use
 233	 * that instead of the heuristic in mc146818_get_time().
 234	 * That'll make Y3K compatility (year > 2070) easy!
 235	 */
 236	mc146818_get_time(t);
 237	return 0;
 238}
 239
 240static int cmos_set_time(struct device *dev, struct rtc_time *t)
 241{
 242	/* REVISIT:  set the "century" register if available
 243	 *
 244	 * NOTE: this ignores the issue whereby updating the seconds
 245	 * takes effect exactly 500ms after we write the register.
 246	 * (Also queueing and other delays before we get this far.)
 247	 */
 248	return mc146818_set_time(t);
 249}
 250
 251static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 252{
 253	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 254	unsigned char	rtc_control;
 255
 256	/* This not only a rtc_op, but also called directly */
 257	if (!is_valid_irq(cmos->irq))
 258		return -EIO;
 259
 260	/* Basic alarms only support hour, minute, and seconds fields.
 261	 * Some also support day and month, for alarms up to a year in
 262	 * the future.
 263	 */
 264
 265	spin_lock_irq(&rtc_lock);
 266	t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
 267	t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
 268	t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
 269
 270	if (cmos->day_alrm) {
 271		/* ignore upper bits on readback per ACPI spec */
 272		t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
 273		if (!t->time.tm_mday)
 274			t->time.tm_mday = -1;
 275
 276		if (cmos->mon_alrm) {
 277			t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
 278			if (!t->time.tm_mon)
 279				t->time.tm_mon = -1;
 280		}
 281	}
 282
 283	rtc_control = CMOS_READ(RTC_CONTROL);
 284	spin_unlock_irq(&rtc_lock);
 285
 286	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 287		if (((unsigned)t->time.tm_sec) < 0x60)
 288			t->time.tm_sec = bcd2bin(t->time.tm_sec);
 289		else
 290			t->time.tm_sec = -1;
 291		if (((unsigned)t->time.tm_min) < 0x60)
 292			t->time.tm_min = bcd2bin(t->time.tm_min);
 293		else
 294			t->time.tm_min = -1;
 295		if (((unsigned)t->time.tm_hour) < 0x24)
 296			t->time.tm_hour = bcd2bin(t->time.tm_hour);
 297		else
 298			t->time.tm_hour = -1;
 299
 300		if (cmos->day_alrm) {
 301			if (((unsigned)t->time.tm_mday) <= 0x31)
 302				t->time.tm_mday = bcd2bin(t->time.tm_mday);
 303			else
 304				t->time.tm_mday = -1;
 305
 306			if (cmos->mon_alrm) {
 307				if (((unsigned)t->time.tm_mon) <= 0x12)
 308					t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
 309				else
 310					t->time.tm_mon = -1;
 311			}
 312		}
 313	}
 314
 315	t->enabled = !!(rtc_control & RTC_AIE);
 316	t->pending = 0;
 317
 318	return 0;
 319}
 320
 321static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
 322{
 323	unsigned char	rtc_intr;
 324
 325	/* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
 326	 * allegedly some older rtcs need that to handle irqs properly
 327	 */
 328	rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
 329
 330	if (use_hpet_alarm())
 331		return;
 332
 333	rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 334	if (is_intr(rtc_intr))
 335		rtc_update_irq(cmos->rtc, 1, rtc_intr);
 336}
 337
 338static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
 339{
 340	unsigned char	rtc_control;
 341
 342	/* flush any pending IRQ status, notably for update irqs,
 343	 * before we enable new IRQs
 344	 */
 345	rtc_control = CMOS_READ(RTC_CONTROL);
 346	cmos_checkintr(cmos, rtc_control);
 347
 348	rtc_control |= mask;
 349	CMOS_WRITE(rtc_control, RTC_CONTROL);
 350	if (use_hpet_alarm())
 351		hpet_set_rtc_irq_bit(mask);
 352
 353	if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
 354		if (cmos->wake_on)
 355			cmos->wake_on(cmos->dev);
 356	}
 357
 358	cmos_checkintr(cmos, rtc_control);
 359}
 360
 361static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
 362{
 363	unsigned char	rtc_control;
 364
 365	rtc_control = CMOS_READ(RTC_CONTROL);
 366	rtc_control &= ~mask;
 367	CMOS_WRITE(rtc_control, RTC_CONTROL);
 368	if (use_hpet_alarm())
 369		hpet_mask_rtc_irq_bit(mask);
 370
 371	if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
 372		if (cmos->wake_off)
 373			cmos->wake_off(cmos->dev);
 374	}
 375
 376	cmos_checkintr(cmos, rtc_control);
 377}
 378
 379static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
 380{
 381	struct cmos_rtc *cmos = dev_get_drvdata(dev);
 382	struct rtc_time now;
 383
 384	cmos_read_time(dev, &now);
 385
 386	if (!cmos->day_alrm) {
 387		time64_t t_max_date;
 388		time64_t t_alrm;
 389
 390		t_max_date = rtc_tm_to_time64(&now);
 391		t_max_date += 24 * 60 * 60 - 1;
 392		t_alrm = rtc_tm_to_time64(&t->time);
 393		if (t_alrm > t_max_date) {
 394			dev_err(dev,
 395				"Alarms can be up to one day in the future\n");
 396			return -EINVAL;
 397		}
 398	} else if (!cmos->mon_alrm) {
 399		struct rtc_time max_date = now;
 400		time64_t t_max_date;
 401		time64_t t_alrm;
 402		int max_mday;
 403
 404		if (max_date.tm_mon == 11) {
 405			max_date.tm_mon = 0;
 406			max_date.tm_year += 1;
 407		} else {
 408			max_date.tm_mon += 1;
 409		}
 410		max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
 411		if (max_date.tm_mday > max_mday)
 412			max_date.tm_mday = max_mday;
 413
 414		t_max_date = rtc_tm_to_time64(&max_date);
 415		t_max_date -= 1;
 416		t_alrm = rtc_tm_to_time64(&t->time);
 417		if (t_alrm > t_max_date) {
 418			dev_err(dev,
 419				"Alarms can be up to one month in the future\n");
 420			return -EINVAL;
 421		}
 422	} else {
 423		struct rtc_time max_date = now;
 424		time64_t t_max_date;
 425		time64_t t_alrm;
 426		int max_mday;
 427
 428		max_date.tm_year += 1;
 429		max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
 430		if (max_date.tm_mday > max_mday)
 431			max_date.tm_mday = max_mday;
 432
 433		t_max_date = rtc_tm_to_time64(&max_date);
 434		t_max_date -= 1;
 435		t_alrm = rtc_tm_to_time64(&t->time);
 436		if (t_alrm > t_max_date) {
 437			dev_err(dev,
 438				"Alarms can be up to one year in the future\n");
 439			return -EINVAL;
 440		}
 441	}
 442
 443	return 0;
 444}
 445
 446static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 447{
 448	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 449	unsigned char mon, mday, hrs, min, sec, rtc_control;
 450	int ret;
 451
 452	/* This not only a rtc_op, but also called directly */
 453	if (!is_valid_irq(cmos->irq))
 454		return -EIO;
 455
 456	ret = cmos_validate_alarm(dev, t);
 457	if (ret < 0)
 458		return ret;
 459
 460	mon = t->time.tm_mon + 1;
 461	mday = t->time.tm_mday;
 462	hrs = t->time.tm_hour;
 463	min = t->time.tm_min;
 464	sec = t->time.tm_sec;
 465
 466	rtc_control = CMOS_READ(RTC_CONTROL);
 467	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 468		/* Writing 0xff means "don't care" or "match all".  */
 469		mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
 470		mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
 471		hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
 472		min = (min < 60) ? bin2bcd(min) : 0xff;
 473		sec = (sec < 60) ? bin2bcd(sec) : 0xff;
 474	}
 475
 476	spin_lock_irq(&rtc_lock);
 477
 478	/* next rtc irq must not be from previous alarm setting */
 479	cmos_irq_disable(cmos, RTC_AIE);
 480
 481	/* update alarm */
 482	CMOS_WRITE(hrs, RTC_HOURS_ALARM);
 483	CMOS_WRITE(min, RTC_MINUTES_ALARM);
 484	CMOS_WRITE(sec, RTC_SECONDS_ALARM);
 485
 486	/* the system may support an "enhanced" alarm */
 487	if (cmos->day_alrm) {
 488		CMOS_WRITE(mday, cmos->day_alrm);
 489		if (cmos->mon_alrm)
 490			CMOS_WRITE(mon, cmos->mon_alrm);
 491	}
 492
 493	if (use_hpet_alarm()) {
 494		/*
 495		 * FIXME the HPET alarm glue currently ignores day_alrm
 496		 * and mon_alrm ...
 497		 */
 498		hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min,
 499				    t->time.tm_sec);
 500	}
 501
 502	if (t->enabled)
 503		cmos_irq_enable(cmos, RTC_AIE);
 504
 505	spin_unlock_irq(&rtc_lock);
 506
 507	cmos->alarm_expires = rtc_tm_to_time64(&t->time);
 508
 509	return 0;
 510}
 511
 512static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
 513{
 514	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 515	unsigned long	flags;
 516
 
 
 
 517	spin_lock_irqsave(&rtc_lock, flags);
 518
 519	if (enabled)
 520		cmos_irq_enable(cmos, RTC_AIE);
 521	else
 522		cmos_irq_disable(cmos, RTC_AIE);
 523
 524	spin_unlock_irqrestore(&rtc_lock, flags);
 525	return 0;
 526}
 527
 528#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
 529
 530static int cmos_procfs(struct device *dev, struct seq_file *seq)
 531{
 532	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 533	unsigned char	rtc_control, valid;
 534
 535	spin_lock_irq(&rtc_lock);
 536	rtc_control = CMOS_READ(RTC_CONTROL);
 537	valid = CMOS_READ(RTC_VALID);
 538	spin_unlock_irq(&rtc_lock);
 539
 540	/* NOTE:  at least ICH6 reports battery status using a different
 541	 * (non-RTC) bit; and SQWE is ignored on many current systems.
 542	 */
 543	seq_printf(seq,
 544		   "periodic_IRQ\t: %s\n"
 545		   "update_IRQ\t: %s\n"
 546		   "HPET_emulated\t: %s\n"
 547		   // "square_wave\t: %s\n"
 548		   "BCD\t\t: %s\n"
 549		   "DST_enable\t: %s\n"
 550		   "periodic_freq\t: %d\n"
 551		   "batt_status\t: %s\n",
 552		   (rtc_control & RTC_PIE) ? "yes" : "no",
 553		   (rtc_control & RTC_UIE) ? "yes" : "no",
 554		   use_hpet_alarm() ? "yes" : "no",
 555		   // (rtc_control & RTC_SQWE) ? "yes" : "no",
 556		   (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
 557		   (rtc_control & RTC_DST_EN) ? "yes" : "no",
 558		   cmos->rtc->irq_freq,
 559		   (valid & RTC_VRT) ? "okay" : "dead");
 560
 561	return 0;
 562}
 563
 564#else
 565#define	cmos_procfs	NULL
 566#endif
 567
 568static const struct rtc_class_ops cmos_rtc_ops = {
 569	.read_time		= cmos_read_time,
 570	.set_time		= cmos_set_time,
 571	.read_alarm		= cmos_read_alarm,
 572	.set_alarm		= cmos_set_alarm,
 573	.proc			= cmos_procfs,
 574	.alarm_irq_enable	= cmos_alarm_irq_enable,
 575};
 576
 577/*----------------------------------------------------------------*/
 578
 579/*
 580 * All these chips have at least 64 bytes of address space, shared by
 581 * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
 582 * by boot firmware.  Modern chips have 128 or 256 bytes.
 583 */
 584
 585#define NVRAM_OFFSET	(RTC_REG_D + 1)
 586
 587static int cmos_nvram_read(void *priv, unsigned int off, void *val,
 588			   size_t count)
 589{
 590	unsigned char *buf = val;
 591	int	retval;
 592
 593	off += NVRAM_OFFSET;
 594	spin_lock_irq(&rtc_lock);
 595	for (retval = 0; count; count--, off++, retval++) {
 596		if (off < 128)
 597			*buf++ = CMOS_READ(off);
 598		else if (can_bank2)
 599			*buf++ = cmos_read_bank2(off);
 600		else
 601			break;
 602	}
 603	spin_unlock_irq(&rtc_lock);
 604
 605	return retval;
 606}
 607
 608static int cmos_nvram_write(void *priv, unsigned int off, void *val,
 609			    size_t count)
 610{
 611	struct cmos_rtc	*cmos = priv;
 612	unsigned char	*buf = val;
 613	int		retval;
 614
 615	/* NOTE:  on at least PCs and Ataris, the boot firmware uses a
 616	 * checksum on part of the NVRAM data.  That's currently ignored
 617	 * here.  If userspace is smart enough to know what fields of
 618	 * NVRAM to update, updating checksums is also part of its job.
 619	 */
 620	off += NVRAM_OFFSET;
 621	spin_lock_irq(&rtc_lock);
 622	for (retval = 0; count; count--, off++, retval++) {
 623		/* don't trash RTC registers */
 624		if (off == cmos->day_alrm
 625				|| off == cmos->mon_alrm
 626				|| off == cmos->century)
 627			buf++;
 628		else if (off < 128)
 629			CMOS_WRITE(*buf++, off);
 630		else if (can_bank2)
 631			cmos_write_bank2(*buf++, off);
 632		else
 633			break;
 634	}
 635	spin_unlock_irq(&rtc_lock);
 636
 637	return retval;
 638}
 639
 640/*----------------------------------------------------------------*/
 641
 642static struct cmos_rtc	cmos_rtc;
 643
 644static irqreturn_t cmos_interrupt(int irq, void *p)
 645{
 646	u8		irqstat;
 647	u8		rtc_control;
 648
 649	spin_lock(&rtc_lock);
 650
 651	/* When the HPET interrupt handler calls us, the interrupt
 652	 * status is passed as arg1 instead of the irq number.  But
 653	 * always clear irq status, even when HPET is in the way.
 654	 *
 655	 * Note that HPET and RTC are almost certainly out of phase,
 656	 * giving different IRQ status ...
 657	 */
 658	irqstat = CMOS_READ(RTC_INTR_FLAGS);
 659	rtc_control = CMOS_READ(RTC_CONTROL);
 660	if (use_hpet_alarm())
 661		irqstat = (unsigned long)irq & 0xF0;
 662
 663	/* If we were suspended, RTC_CONTROL may not be accurate since the
 664	 * bios may have cleared it.
 665	 */
 666	if (!cmos_rtc.suspend_ctrl)
 667		irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
 668	else
 669		irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
 670
 671	/* All Linux RTC alarms should be treated as if they were oneshot.
 672	 * Similar code may be needed in system wakeup paths, in case the
 673	 * alarm woke the system.
 674	 */
 675	if (irqstat & RTC_AIE) {
 676		cmos_rtc.suspend_ctrl &= ~RTC_AIE;
 677		rtc_control &= ~RTC_AIE;
 678		CMOS_WRITE(rtc_control, RTC_CONTROL);
 679		if (use_hpet_alarm())
 680			hpet_mask_rtc_irq_bit(RTC_AIE);
 681		CMOS_READ(RTC_INTR_FLAGS);
 682	}
 683	spin_unlock(&rtc_lock);
 684
 685	if (is_intr(irqstat)) {
 686		rtc_update_irq(p, 1, irqstat);
 687		return IRQ_HANDLED;
 688	} else
 689		return IRQ_NONE;
 690}
 691
 692#ifdef	CONFIG_PNP
 693#define	INITSECTION
 694
 695#else
 696#define	INITSECTION	__init
 697#endif
 698
 699static int INITSECTION
 700cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
 701{
 702	struct cmos_rtc_board_info	*info = dev_get_platdata(dev);
 703	int				retval = 0;
 704	unsigned char			rtc_control;
 705	unsigned			address_space;
 706	u32				flags = 0;
 707	struct nvmem_config nvmem_cfg = {
 708		.name = "cmos_nvram",
 709		.word_size = 1,
 710		.stride = 1,
 711		.reg_read = cmos_nvram_read,
 712		.reg_write = cmos_nvram_write,
 713		.priv = &cmos_rtc,
 714	};
 715
 716	/* there can be only one ... */
 717	if (cmos_rtc.dev)
 718		return -EBUSY;
 719
 720	if (!ports)
 721		return -ENODEV;
 722
 723	/* Claim I/O ports ASAP, minimizing conflict with legacy driver.
 724	 *
 725	 * REVISIT non-x86 systems may instead use memory space resources
 726	 * (needing ioremap etc), not i/o space resources like this ...
 727	 */
 728	if (RTC_IOMAPPED)
 729		ports = request_region(ports->start, resource_size(ports),
 730				       driver_name);
 731	else
 732		ports = request_mem_region(ports->start, resource_size(ports),
 733					   driver_name);
 734	if (!ports) {
 735		dev_dbg(dev, "i/o registers already in use\n");
 736		return -EBUSY;
 737	}
 738
 739	cmos_rtc.irq = rtc_irq;
 740	cmos_rtc.iomem = ports;
 741
 742	/* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
 743	 * driver did, but don't reject unknown configs.   Old hardware
 744	 * won't address 128 bytes.  Newer chips have multiple banks,
 745	 * though they may not be listed in one I/O resource.
 746	 */
 747#if	defined(CONFIG_ATARI)
 748	address_space = 64;
 749#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
 750			|| defined(__sparc__) || defined(__mips__) \
 751			|| defined(__powerpc__)
 752	address_space = 128;
 753#else
 754#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
 755	address_space = 128;
 756#endif
 757	if (can_bank2 && ports->end > (ports->start + 1))
 758		address_space = 256;
 759
 760	/* For ACPI systems extension info comes from the FADT.  On others,
 761	 * board specific setup provides it as appropriate.  Systems where
 762	 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
 763	 * some almost-clones) can provide hooks to make that behave.
 764	 *
 765	 * Note that ACPI doesn't preclude putting these registers into
 766	 * "extended" areas of the chip, including some that we won't yet
 767	 * expect CMOS_READ and friends to handle.
 768	 */
 769	if (info) {
 770		if (info->flags)
 771			flags = info->flags;
 772		if (info->address_space)
 773			address_space = info->address_space;
 774
 775		if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
 776			cmos_rtc.day_alrm = info->rtc_day_alarm;
 777		if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
 778			cmos_rtc.mon_alrm = info->rtc_mon_alarm;
 779		if (info->rtc_century && info->rtc_century < 128)
 780			cmos_rtc.century = info->rtc_century;
 781
 782		if (info->wake_on && info->wake_off) {
 783			cmos_rtc.wake_on = info->wake_on;
 784			cmos_rtc.wake_off = info->wake_off;
 785		}
 786	}
 787
 788	cmos_rtc.dev = dev;
 789	dev_set_drvdata(dev, &cmos_rtc);
 790
 791	cmos_rtc.rtc = devm_rtc_allocate_device(dev);
 792	if (IS_ERR(cmos_rtc.rtc)) {
 793		retval = PTR_ERR(cmos_rtc.rtc);
 794		goto cleanup0;
 795	}
 796
 797	rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
 798
 799	spin_lock_irq(&rtc_lock);
 800
 801	/* Ensure that the RTC is accessible. Bit 6 must be 0! */
 802	if ((CMOS_READ(RTC_VALID) & 0x40) != 0) {
 803		spin_unlock_irq(&rtc_lock);
 804		dev_warn(dev, "not accessible\n");
 805		retval = -ENXIO;
 806		goto cleanup1;
 807	}
 808
 809	if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
 810		/* force periodic irq to CMOS reset default of 1024Hz;
 811		 *
 812		 * REVISIT it's been reported that at least one x86_64 ALI
 813		 * mobo doesn't use 32KHz here ... for portability we might
 814		 * need to do something about other clock frequencies.
 815		 */
 816		cmos_rtc.rtc->irq_freq = 1024;
 817		if (use_hpet_alarm())
 818			hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
 819		CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
 820	}
 821
 822	/* disable irqs */
 823	if (is_valid_irq(rtc_irq))
 824		cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
 825
 826	rtc_control = CMOS_READ(RTC_CONTROL);
 827
 828	spin_unlock_irq(&rtc_lock);
 829
 830	if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
 831		dev_warn(dev, "only 24-hr supported\n");
 832		retval = -ENXIO;
 833		goto cleanup1;
 834	}
 835
 836	if (use_hpet_alarm())
 837		hpet_rtc_timer_init();
 838
 839	if (is_valid_irq(rtc_irq)) {
 840		irq_handler_t rtc_cmos_int_handler;
 841
 842		if (use_hpet_alarm()) {
 843			rtc_cmos_int_handler = hpet_rtc_interrupt;
 844			retval = hpet_register_irq_handler(cmos_interrupt);
 845			if (retval) {
 846				hpet_mask_rtc_irq_bit(RTC_IRQMASK);
 847				dev_warn(dev, "hpet_register_irq_handler "
 848						" failed in rtc_init().");
 849				goto cleanup1;
 850			}
 851		} else
 852			rtc_cmos_int_handler = cmos_interrupt;
 853
 854		retval = request_irq(rtc_irq, rtc_cmos_int_handler,
 855				0, dev_name(&cmos_rtc.rtc->dev),
 856				cmos_rtc.rtc);
 857		if (retval < 0) {
 858			dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
 859			goto cleanup1;
 860		}
 861	} else {
 862		clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
 863	}
 864
 865	cmos_rtc.rtc->ops = &cmos_rtc_ops;
 866
 867	retval = devm_rtc_register_device(cmos_rtc.rtc);
 868	if (retval)
 869		goto cleanup2;
 870
 871	/* Set the sync offset for the periodic 11min update correct */
 872	cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
 873
 874	/* export at least the first block of NVRAM */
 875	nvmem_cfg.size = address_space - NVRAM_OFFSET;
 876	devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
 
 877
 878	dev_info(dev, "%s%s, %d bytes nvram%s\n",
 879		 !is_valid_irq(rtc_irq) ? "no alarms" :
 880		 cmos_rtc.mon_alrm ? "alarms up to one year" :
 881		 cmos_rtc.day_alrm ? "alarms up to one month" :
 882		 "alarms up to one day",
 883		 cmos_rtc.century ? ", y3k" : "",
 884		 nvmem_cfg.size,
 885		 use_hpet_alarm() ? ", hpet irqs" : "");
 886
 887	return 0;
 888
 889cleanup2:
 890	if (is_valid_irq(rtc_irq))
 891		free_irq(rtc_irq, cmos_rtc.rtc);
 892cleanup1:
 893	cmos_rtc.dev = NULL;
 894cleanup0:
 895	if (RTC_IOMAPPED)
 896		release_region(ports->start, resource_size(ports));
 897	else
 898		release_mem_region(ports->start, resource_size(ports));
 899	return retval;
 900}
 901
 902static void cmos_do_shutdown(int rtc_irq)
 903{
 904	spin_lock_irq(&rtc_lock);
 905	if (is_valid_irq(rtc_irq))
 906		cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
 907	spin_unlock_irq(&rtc_lock);
 908}
 909
 910static void cmos_do_remove(struct device *dev)
 911{
 912	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 913	struct resource *ports;
 914
 915	cmos_do_shutdown(cmos->irq);
 916
 917	if (is_valid_irq(cmos->irq)) {
 918		free_irq(cmos->irq, cmos->rtc);
 919		if (use_hpet_alarm())
 920			hpet_unregister_irq_handler(cmos_interrupt);
 921	}
 922
 923	cmos->rtc = NULL;
 924
 925	ports = cmos->iomem;
 926	if (RTC_IOMAPPED)
 927		release_region(ports->start, resource_size(ports));
 928	else
 929		release_mem_region(ports->start, resource_size(ports));
 930	cmos->iomem = NULL;
 931
 932	cmos->dev = NULL;
 933}
 934
 935static int cmos_aie_poweroff(struct device *dev)
 936{
 937	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 938	struct rtc_time now;
 939	time64_t t_now;
 940	int retval = 0;
 941	unsigned char rtc_control;
 942
 943	if (!cmos->alarm_expires)
 944		return -EINVAL;
 945
 946	spin_lock_irq(&rtc_lock);
 947	rtc_control = CMOS_READ(RTC_CONTROL);
 948	spin_unlock_irq(&rtc_lock);
 949
 950	/* We only care about the situation where AIE is disabled. */
 951	if (rtc_control & RTC_AIE)
 952		return -EBUSY;
 953
 954	cmos_read_time(dev, &now);
 955	t_now = rtc_tm_to_time64(&now);
 956
 957	/*
 958	 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
 959	 * automatically right after shutdown on some buggy boxes.
 960	 * This automatic rebooting issue won't happen when the alarm
 961	 * time is larger than now+1 seconds.
 962	 *
 963	 * If the alarm time is equal to now+1 seconds, the issue can be
 964	 * prevented by cancelling the alarm.
 965	 */
 966	if (cmos->alarm_expires == t_now + 1) {
 967		struct rtc_wkalrm alarm;
 968
 969		/* Cancel the AIE timer by configuring the past time. */
 970		rtc_time64_to_tm(t_now - 1, &alarm.time);
 971		alarm.enabled = 0;
 972		retval = cmos_set_alarm(dev, &alarm);
 973	} else if (cmos->alarm_expires > t_now + 1) {
 974		retval = -EBUSY;
 975	}
 976
 977	return retval;
 978}
 979
 980static int cmos_suspend(struct device *dev)
 981{
 982	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 983	unsigned char	tmp;
 984
 985	/* only the alarm might be a wakeup event source */
 986	spin_lock_irq(&rtc_lock);
 987	cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
 988	if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
 989		unsigned char	mask;
 990
 991		if (device_may_wakeup(dev))
 992			mask = RTC_IRQMASK & ~RTC_AIE;
 993		else
 994			mask = RTC_IRQMASK;
 995		tmp &= ~mask;
 996		CMOS_WRITE(tmp, RTC_CONTROL);
 997		if (use_hpet_alarm())
 998			hpet_mask_rtc_irq_bit(mask);
 999		cmos_checkintr(cmos, tmp);
1000	}
1001	spin_unlock_irq(&rtc_lock);
1002
1003	if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1004		cmos->enabled_wake = 1;
1005		if (cmos->wake_on)
1006			cmos->wake_on(dev);
1007		else
1008			enable_irq_wake(cmos->irq);
1009	}
1010
1011	memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1012	cmos_read_alarm(dev, &cmos->saved_wkalrm);
1013
1014	dev_dbg(dev, "suspend%s, ctrl %02x\n",
1015			(tmp & RTC_AIE) ? ", alarm may wake" : "",
1016			tmp);
1017
1018	return 0;
1019}
1020
1021/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1022 * after a detour through G3 "mechanical off", although the ACPI spec
1023 * says wakeup should only work from G1/S4 "hibernate".  To most users,
1024 * distinctions between S4 and S5 are pointless.  So when the hardware
1025 * allows, don't draw that distinction.
1026 */
1027static inline int cmos_poweroff(struct device *dev)
1028{
1029	if (!IS_ENABLED(CONFIG_PM))
1030		return -ENOSYS;
1031
1032	return cmos_suspend(dev);
1033}
1034
1035static void cmos_check_wkalrm(struct device *dev)
1036{
1037	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1038	struct rtc_wkalrm current_alarm;
1039	time64_t t_now;
1040	time64_t t_current_expires;
1041	time64_t t_saved_expires;
1042	struct rtc_time now;
1043
1044	/* Check if we have RTC Alarm armed */
1045	if (!(cmos->suspend_ctrl & RTC_AIE))
1046		return;
1047
1048	cmos_read_time(dev, &now);
1049	t_now = rtc_tm_to_time64(&now);
1050
1051	/*
1052	 * ACPI RTC wake event is cleared after resume from STR,
1053	 * ACK the rtc irq here
1054	 */
1055	if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1056		local_irq_disable();
1057		cmos_interrupt(0, (void *)cmos->rtc);
1058		local_irq_enable();
1059		return;
1060	}
1061
1062	memset(&current_alarm, 0, sizeof(struct rtc_wkalrm));
1063	cmos_read_alarm(dev, &current_alarm);
1064	t_current_expires = rtc_tm_to_time64(&current_alarm.time);
1065	t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1066	if (t_current_expires != t_saved_expires ||
1067	    cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1068		cmos_set_alarm(dev, &cmos->saved_wkalrm);
1069	}
1070}
1071
1072static void cmos_check_acpi_rtc_status(struct device *dev,
1073				       unsigned char *rtc_control);
1074
1075static int __maybe_unused cmos_resume(struct device *dev)
1076{
1077	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1078	unsigned char tmp;
1079
1080	if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1081		if (cmos->wake_off)
1082			cmos->wake_off(dev);
1083		else
1084			disable_irq_wake(cmos->irq);
1085		cmos->enabled_wake = 0;
1086	}
1087
1088	/* The BIOS might have changed the alarm, restore it */
1089	cmos_check_wkalrm(dev);
1090
1091	spin_lock_irq(&rtc_lock);
1092	tmp = cmos->suspend_ctrl;
1093	cmos->suspend_ctrl = 0;
1094	/* re-enable any irqs previously active */
1095	if (tmp & RTC_IRQMASK) {
1096		unsigned char	mask;
1097
1098		if (device_may_wakeup(dev) && use_hpet_alarm())
1099			hpet_rtc_timer_init();
1100
1101		do {
1102			CMOS_WRITE(tmp, RTC_CONTROL);
1103			if (use_hpet_alarm())
1104				hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1105
1106			mask = CMOS_READ(RTC_INTR_FLAGS);
1107			mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1108			if (!use_hpet_alarm() || !is_intr(mask))
1109				break;
1110
1111			/* force one-shot behavior if HPET blocked
1112			 * the wake alarm's irq
1113			 */
1114			rtc_update_irq(cmos->rtc, 1, mask);
1115			tmp &= ~RTC_AIE;
1116			hpet_mask_rtc_irq_bit(RTC_AIE);
1117		} while (mask & RTC_AIE);
1118
1119		if (tmp & RTC_AIE)
1120			cmos_check_acpi_rtc_status(dev, &tmp);
1121	}
1122	spin_unlock_irq(&rtc_lock);
1123
1124	dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1125
1126	return 0;
1127}
1128
1129static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1130
1131/*----------------------------------------------------------------*/
1132
1133/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1134 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1135 * probably list them in similar PNPBIOS tables; so PNP is more common.
1136 *
1137 * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
1138 * predate even PNPBIOS should set up platform_bus devices.
1139 */
1140
1141#ifdef	CONFIG_ACPI
1142
1143#include <linux/acpi.h>
1144
1145static u32 rtc_handler(void *context)
1146{
1147	struct device *dev = context;
1148	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1149	unsigned char rtc_control = 0;
1150	unsigned char rtc_intr;
1151	unsigned long flags;
1152
1153
1154	/*
1155	 * Always update rtc irq when ACPI is used as RTC Alarm.
1156	 * Or else, ACPI SCI is enabled during suspend/resume only,
1157	 * update rtc irq in that case.
1158	 */
1159	if (cmos_use_acpi_alarm())
1160		cmos_interrupt(0, (void *)cmos->rtc);
1161	else {
1162		/* Fix me: can we use cmos_interrupt() here as well? */
1163		spin_lock_irqsave(&rtc_lock, flags);
1164		if (cmos_rtc.suspend_ctrl)
1165			rtc_control = CMOS_READ(RTC_CONTROL);
1166		if (rtc_control & RTC_AIE) {
1167			cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1168			CMOS_WRITE(rtc_control, RTC_CONTROL);
1169			rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1170			rtc_update_irq(cmos->rtc, 1, rtc_intr);
1171		}
1172		spin_unlock_irqrestore(&rtc_lock, flags);
1173	}
 
1174
1175	pm_wakeup_hard_event(dev);
1176	acpi_clear_event(ACPI_EVENT_RTC);
1177	acpi_disable_event(ACPI_EVENT_RTC, 0);
1178	return ACPI_INTERRUPT_HANDLED;
1179}
1180
1181static inline void rtc_wake_setup(struct device *dev)
1182{
1183	acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1184	/*
1185	 * After the RTC handler is installed, the Fixed_RTC event should
1186	 * be disabled. Only when the RTC alarm is set will it be enabled.
1187	 */
1188	acpi_clear_event(ACPI_EVENT_RTC);
1189	acpi_disable_event(ACPI_EVENT_RTC, 0);
1190}
1191
1192static void rtc_wake_on(struct device *dev)
1193{
1194	acpi_clear_event(ACPI_EVENT_RTC);
1195	acpi_enable_event(ACPI_EVENT_RTC, 0);
1196}
1197
1198static void rtc_wake_off(struct device *dev)
1199{
1200	acpi_disable_event(ACPI_EVENT_RTC, 0);
1201}
1202
1203#ifdef CONFIG_X86
1204/* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
1205static void use_acpi_alarm_quirks(void)
1206{
1207	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
1208		return;
1209
1210	if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))
1211		return;
1212
1213	if (!is_hpet_enabled())
1214		return;
1215
1216	if (dmi_get_bios_year() < 2015)
1217		return;
1218
1219	use_acpi_alarm = true;
1220}
1221#else
1222static inline void use_acpi_alarm_quirks(void) { }
1223#endif
1224
1225/* Every ACPI platform has a mc146818 compatible "cmos rtc".  Here we find
1226 * its device node and pass extra config data.  This helps its driver use
1227 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1228 * that this board's RTC is wakeup-capable (per ACPI spec).
1229 */
1230static struct cmos_rtc_board_info acpi_rtc_info;
1231
1232static void cmos_wake_setup(struct device *dev)
1233{
1234	if (acpi_disabled)
1235		return;
1236
1237	use_acpi_alarm_quirks();
1238
1239	rtc_wake_setup(dev);
1240	acpi_rtc_info.wake_on = rtc_wake_on;
1241	acpi_rtc_info.wake_off = rtc_wake_off;
1242
1243	/* workaround bug in some ACPI tables */
1244	if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1245		dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1246			acpi_gbl_FADT.month_alarm);
1247		acpi_gbl_FADT.month_alarm = 0;
1248	}
1249
1250	acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1251	acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1252	acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1253
1254	/* NOTE:  S4_RTC_WAKE is NOT currently useful to Linux */
1255	if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1256		dev_info(dev, "RTC can wake from S4\n");
1257
1258	dev->platform_data = &acpi_rtc_info;
1259
1260	/* RTC always wakes from S1/S2/S3, and often S4/STD */
1261	device_init_wakeup(dev, 1);
1262}
1263
1264static void cmos_check_acpi_rtc_status(struct device *dev,
1265				       unsigned char *rtc_control)
1266{
1267	struct cmos_rtc *cmos = dev_get_drvdata(dev);
1268	acpi_event_status rtc_status;
1269	acpi_status status;
1270
1271	if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1272		return;
1273
1274	status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1275	if (ACPI_FAILURE(status)) {
1276		dev_err(dev, "Could not get RTC status\n");
1277	} else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1278		unsigned char mask;
1279		*rtc_control &= ~RTC_AIE;
1280		CMOS_WRITE(*rtc_control, RTC_CONTROL);
1281		mask = CMOS_READ(RTC_INTR_FLAGS);
1282		rtc_update_irq(cmos->rtc, 1, mask);
1283	}
1284}
1285
1286#else
1287
1288static void cmos_wake_setup(struct device *dev)
1289{
1290}
1291
1292static void cmos_check_acpi_rtc_status(struct device *dev,
1293				       unsigned char *rtc_control)
1294{
1295}
1296
1297#endif
1298
1299#ifdef	CONFIG_PNP
1300
1301#include <linux/pnp.h>
1302
1303static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1304{
1305	cmos_wake_setup(&pnp->dev);
1306
1307	if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1308		unsigned int irq = 0;
1309#ifdef CONFIG_X86
1310		/* Some machines contain a PNP entry for the RTC, but
1311		 * don't define the IRQ. It should always be safe to
1312		 * hardcode it on systems with a legacy PIC.
1313		 */
1314		if (nr_legacy_irqs())
1315			irq = RTC_IRQ;
1316#endif
1317		return cmos_do_probe(&pnp->dev,
1318				pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1319	} else {
1320		return cmos_do_probe(&pnp->dev,
1321				pnp_get_resource(pnp, IORESOURCE_IO, 0),
1322				pnp_irq(pnp, 0));
1323	}
1324}
1325
1326static void cmos_pnp_remove(struct pnp_dev *pnp)
1327{
1328	cmos_do_remove(&pnp->dev);
1329}
1330
1331static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1332{
1333	struct device *dev = &pnp->dev;
1334	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1335
1336	if (system_state == SYSTEM_POWER_OFF) {
1337		int retval = cmos_poweroff(dev);
1338
1339		if (cmos_aie_poweroff(dev) < 0 && !retval)
1340			return;
1341	}
1342
1343	cmos_do_shutdown(cmos->irq);
1344}
1345
1346static const struct pnp_device_id rtc_ids[] = {
1347	{ .id = "PNP0b00", },
1348	{ .id = "PNP0b01", },
1349	{ .id = "PNP0b02", },
1350	{ },
1351};
1352MODULE_DEVICE_TABLE(pnp, rtc_ids);
1353
1354static struct pnp_driver cmos_pnp_driver = {
1355	.name		= driver_name,
1356	.id_table	= rtc_ids,
1357	.probe		= cmos_pnp_probe,
1358	.remove		= cmos_pnp_remove,
1359	.shutdown	= cmos_pnp_shutdown,
1360
1361	/* flag ensures resume() gets called, and stops syslog spam */
1362	.flags		= PNP_DRIVER_RES_DO_NOT_CHANGE,
1363	.driver		= {
1364			.pm = &cmos_pm_ops,
1365	},
1366};
1367
1368#endif	/* CONFIG_PNP */
1369
1370#ifdef CONFIG_OF
1371static const struct of_device_id of_cmos_match[] = {
1372	{
1373		.compatible = "motorola,mc146818",
1374	},
1375	{ },
1376};
1377MODULE_DEVICE_TABLE(of, of_cmos_match);
1378
1379static __init void cmos_of_init(struct platform_device *pdev)
1380{
1381	struct device_node *node = pdev->dev.of_node;
1382	const __be32 *val;
1383
1384	if (!node)
1385		return;
1386
1387	val = of_get_property(node, "ctrl-reg", NULL);
1388	if (val)
1389		CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1390
1391	val = of_get_property(node, "freq-reg", NULL);
1392	if (val)
1393		CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1394}
1395#else
1396static inline void cmos_of_init(struct platform_device *pdev) {}
1397#endif
1398/*----------------------------------------------------------------*/
1399
1400/* Platform setup should have set up an RTC device, when PNP is
1401 * unavailable ... this could happen even on (older) PCs.
1402 */
1403
1404static int __init cmos_platform_probe(struct platform_device *pdev)
1405{
1406	struct resource *resource;
1407	int irq;
1408
1409	cmos_of_init(pdev);
1410	cmos_wake_setup(&pdev->dev);
1411
1412	if (RTC_IOMAPPED)
1413		resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1414	else
1415		resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1416	irq = platform_get_irq(pdev, 0);
1417	if (irq < 0)
1418		irq = -1;
1419
1420	return cmos_do_probe(&pdev->dev, resource, irq);
1421}
1422
1423static int cmos_platform_remove(struct platform_device *pdev)
1424{
1425	cmos_do_remove(&pdev->dev);
1426	return 0;
1427}
1428
1429static void cmos_platform_shutdown(struct platform_device *pdev)
1430{
1431	struct device *dev = &pdev->dev;
1432	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
1433
1434	if (system_state == SYSTEM_POWER_OFF) {
1435		int retval = cmos_poweroff(dev);
1436
1437		if (cmos_aie_poweroff(dev) < 0 && !retval)
1438			return;
1439	}
1440
1441	cmos_do_shutdown(cmos->irq);
1442}
1443
1444/* work with hotplug and coldplug */
1445MODULE_ALIAS("platform:rtc_cmos");
1446
1447static struct platform_driver cmos_platform_driver = {
1448	.remove		= cmos_platform_remove,
1449	.shutdown	= cmos_platform_shutdown,
1450	.driver = {
1451		.name		= driver_name,
1452		.pm		= &cmos_pm_ops,
1453		.of_match_table = of_match_ptr(of_cmos_match),
1454	}
1455};
1456
1457#ifdef CONFIG_PNP
1458static bool pnp_driver_registered;
1459#endif
1460static bool platform_driver_registered;
1461
1462static int __init cmos_init(void)
1463{
1464	int retval = 0;
1465
1466#ifdef	CONFIG_PNP
1467	retval = pnp_register_driver(&cmos_pnp_driver);
1468	if (retval == 0)
1469		pnp_driver_registered = true;
1470#endif
1471
1472	if (!cmos_rtc.dev) {
1473		retval = platform_driver_probe(&cmos_platform_driver,
1474					       cmos_platform_probe);
1475		if (retval == 0)
1476			platform_driver_registered = true;
1477	}
1478
1479	if (retval == 0)
1480		return 0;
1481
1482#ifdef	CONFIG_PNP
1483	if (pnp_driver_registered)
1484		pnp_unregister_driver(&cmos_pnp_driver);
1485#endif
1486	return retval;
1487}
1488module_init(cmos_init);
1489
1490static void __exit cmos_exit(void)
1491{
1492#ifdef	CONFIG_PNP
1493	if (pnp_driver_registered)
1494		pnp_unregister_driver(&cmos_pnp_driver);
1495#endif
1496	if (platform_driver_registered)
1497		platform_driver_unregister(&cmos_platform_driver);
1498}
1499module_exit(cmos_exit);
1500
1501
1502MODULE_AUTHOR("David Brownell");
1503MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1504MODULE_LICENSE("GPL");