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1/*
2 * FPGA Manager Core
3 *
4 * Copyright (C) 2013-2015 Altera Corporation
5 * Copyright (C) 2017 Intel Corporation
6 *
7 * With code from the mailing list:
8 * Copyright (C) 2013 Xilinx, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2, as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22#include <linux/firmware.h>
23#include <linux/fpga/fpga-mgr.h>
24#include <linux/idr.h>
25#include <linux/module.h>
26#include <linux/of.h>
27#include <linux/mutex.h>
28#include <linux/slab.h>
29#include <linux/scatterlist.h>
30#include <linux/highmem.h>
31
32static DEFINE_IDA(fpga_mgr_ida);
33static struct class *fpga_mgr_class;
34
35struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
36{
37 struct fpga_image_info *info;
38
39 get_device(dev);
40
41 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
42 if (!info) {
43 put_device(dev);
44 return NULL;
45 }
46
47 info->dev = dev;
48
49 return info;
50}
51EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
52
53void fpga_image_info_free(struct fpga_image_info *info)
54{
55 struct device *dev;
56
57 if (!info)
58 return;
59
60 dev = info->dev;
61 if (info->firmware_name)
62 devm_kfree(dev, info->firmware_name);
63
64 devm_kfree(dev, info);
65 put_device(dev);
66}
67EXPORT_SYMBOL_GPL(fpga_image_info_free);
68
69/*
70 * Call the low level driver's write_init function. This will do the
71 * device-specific things to get the FPGA into the state where it is ready to
72 * receive an FPGA image. The low level driver only gets to see the first
73 * initial_header_size bytes in the buffer.
74 */
75static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
76 struct fpga_image_info *info,
77 const char *buf, size_t count)
78{
79 int ret;
80
81 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
82 if (!mgr->mops->initial_header_size)
83 ret = mgr->mops->write_init(mgr, info, NULL, 0);
84 else
85 ret = mgr->mops->write_init(
86 mgr, info, buf, min(mgr->mops->initial_header_size, count));
87
88 if (ret) {
89 dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
90 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
91 return ret;
92 }
93
94 return 0;
95}
96
97static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
98 struct fpga_image_info *info,
99 struct sg_table *sgt)
100{
101 struct sg_mapping_iter miter;
102 size_t len;
103 char *buf;
104 int ret;
105
106 if (!mgr->mops->initial_header_size)
107 return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
108
109 /*
110 * First try to use miter to map the first fragment to access the
111 * header, this is the typical path.
112 */
113 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
114 if (sg_miter_next(&miter) &&
115 miter.length >= mgr->mops->initial_header_size) {
116 ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
117 miter.length);
118 sg_miter_stop(&miter);
119 return ret;
120 }
121 sg_miter_stop(&miter);
122
123 /* Otherwise copy the fragments into temporary memory. */
124 buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
125 if (!buf)
126 return -ENOMEM;
127
128 len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
129 mgr->mops->initial_header_size);
130 ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
131
132 kfree(buf);
133
134 return ret;
135}
136
137/*
138 * After all the FPGA image has been written, do the device specific steps to
139 * finish and set the FPGA into operating mode.
140 */
141static int fpga_mgr_write_complete(struct fpga_manager *mgr,
142 struct fpga_image_info *info)
143{
144 int ret;
145
146 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
147 ret = mgr->mops->write_complete(mgr, info);
148 if (ret) {
149 dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
150 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
151 return ret;
152 }
153 mgr->state = FPGA_MGR_STATE_OPERATING;
154
155 return 0;
156}
157
158/**
159 * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
160 * @mgr: fpga manager
161 * @info: fpga image specific information
162 * @sgt: scatterlist table
163 *
164 * Step the low level fpga manager through the device-specific steps of getting
165 * an FPGA ready to be configured, writing the image to it, then doing whatever
166 * post-configuration steps necessary. This code assumes the caller got the
167 * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
168 * not an error code.
169 *
170 * This is the preferred entry point for FPGA programming, it does not require
171 * any contiguous kernel memory.
172 *
173 * Return: 0 on success, negative error code otherwise.
174 */
175static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
176 struct fpga_image_info *info,
177 struct sg_table *sgt)
178{
179 int ret;
180
181 ret = fpga_mgr_write_init_sg(mgr, info, sgt);
182 if (ret)
183 return ret;
184
185 /* Write the FPGA image to the FPGA. */
186 mgr->state = FPGA_MGR_STATE_WRITE;
187 if (mgr->mops->write_sg) {
188 ret = mgr->mops->write_sg(mgr, sgt);
189 } else {
190 struct sg_mapping_iter miter;
191
192 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
193 while (sg_miter_next(&miter)) {
194 ret = mgr->mops->write(mgr, miter.addr, miter.length);
195 if (ret)
196 break;
197 }
198 sg_miter_stop(&miter);
199 }
200
201 if (ret) {
202 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
203 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
204 return ret;
205 }
206
207 return fpga_mgr_write_complete(mgr, info);
208}
209
210static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
211 struct fpga_image_info *info,
212 const char *buf, size_t count)
213{
214 int ret;
215
216 ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
217 if (ret)
218 return ret;
219
220 /*
221 * Write the FPGA image to the FPGA.
222 */
223 mgr->state = FPGA_MGR_STATE_WRITE;
224 ret = mgr->mops->write(mgr, buf, count);
225 if (ret) {
226 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
227 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
228 return ret;
229 }
230
231 return fpga_mgr_write_complete(mgr, info);
232}
233
234/**
235 * fpga_mgr_buf_load - load fpga from image in buffer
236 * @mgr: fpga manager
237 * @flags: flags setting fpga confuration modes
238 * @buf: buffer contain fpga image
239 * @count: byte count of buf
240 *
241 * Step the low level fpga manager through the device-specific steps of getting
242 * an FPGA ready to be configured, writing the image to it, then doing whatever
243 * post-configuration steps necessary. This code assumes the caller got the
244 * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
245 *
246 * Return: 0 on success, negative error code otherwise.
247 */
248static int fpga_mgr_buf_load(struct fpga_manager *mgr,
249 struct fpga_image_info *info,
250 const char *buf, size_t count)
251{
252 struct page **pages;
253 struct sg_table sgt;
254 const void *p;
255 int nr_pages;
256 int index;
257 int rc;
258
259 /*
260 * This is just a fast path if the caller has already created a
261 * contiguous kernel buffer and the driver doesn't require SG, non-SG
262 * drivers will still work on the slow path.
263 */
264 if (mgr->mops->write)
265 return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
266
267 /*
268 * Convert the linear kernel pointer into a sg_table of pages for use
269 * by the driver.
270 */
271 nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
272 (unsigned long)buf / PAGE_SIZE;
273 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
274 if (!pages)
275 return -ENOMEM;
276
277 p = buf - offset_in_page(buf);
278 for (index = 0; index < nr_pages; index++) {
279 if (is_vmalloc_addr(p))
280 pages[index] = vmalloc_to_page(p);
281 else
282 pages[index] = kmap_to_page((void *)p);
283 if (!pages[index]) {
284 kfree(pages);
285 return -EFAULT;
286 }
287 p += PAGE_SIZE;
288 }
289
290 /*
291 * The temporary pages list is used to code share the merging algorithm
292 * in sg_alloc_table_from_pages
293 */
294 rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
295 count, GFP_KERNEL);
296 kfree(pages);
297 if (rc)
298 return rc;
299
300 rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
301 sg_free_table(&sgt);
302
303 return rc;
304}
305
306/**
307 * fpga_mgr_firmware_load - request firmware and load to fpga
308 * @mgr: fpga manager
309 * @info: fpga image specific information
310 * @image_name: name of image file on the firmware search path
311 *
312 * Request an FPGA image using the firmware class, then write out to the FPGA.
313 * Update the state before each step to provide info on what step failed if
314 * there is a failure. This code assumes the caller got the mgr pointer
315 * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
316 * code.
317 *
318 * Return: 0 on success, negative error code otherwise.
319 */
320static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
321 struct fpga_image_info *info,
322 const char *image_name)
323{
324 struct device *dev = &mgr->dev;
325 const struct firmware *fw;
326 int ret;
327
328 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
329
330 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
331
332 ret = request_firmware(&fw, image_name, dev);
333 if (ret) {
334 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
335 dev_err(dev, "Error requesting firmware %s\n", image_name);
336 return ret;
337 }
338
339 ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
340
341 release_firmware(fw);
342
343 return ret;
344}
345
346int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
347{
348 if (info->sgt)
349 return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
350 if (info->buf && info->count)
351 return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
352 if (info->firmware_name)
353 return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
354 return -EINVAL;
355}
356EXPORT_SYMBOL_GPL(fpga_mgr_load);
357
358static const char * const state_str[] = {
359 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
360 [FPGA_MGR_STATE_POWER_OFF] = "power off",
361 [FPGA_MGR_STATE_POWER_UP] = "power up",
362 [FPGA_MGR_STATE_RESET] = "reset",
363
364 /* requesting FPGA image from firmware */
365 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
366 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
367
368 /* Preparing FPGA to receive image */
369 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
370 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
371
372 /* Writing image to FPGA */
373 [FPGA_MGR_STATE_WRITE] = "write",
374 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
375
376 /* Finishing configuration after image has been written */
377 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
378 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
379
380 /* FPGA reports to be in normal operating mode */
381 [FPGA_MGR_STATE_OPERATING] = "operating",
382};
383
384static ssize_t name_show(struct device *dev,
385 struct device_attribute *attr, char *buf)
386{
387 struct fpga_manager *mgr = to_fpga_manager(dev);
388
389 return sprintf(buf, "%s\n", mgr->name);
390}
391
392static ssize_t state_show(struct device *dev,
393 struct device_attribute *attr, char *buf)
394{
395 struct fpga_manager *mgr = to_fpga_manager(dev);
396
397 return sprintf(buf, "%s\n", state_str[mgr->state]);
398}
399
400static DEVICE_ATTR_RO(name);
401static DEVICE_ATTR_RO(state);
402
403static struct attribute *fpga_mgr_attrs[] = {
404 &dev_attr_name.attr,
405 &dev_attr_state.attr,
406 NULL,
407};
408ATTRIBUTE_GROUPS(fpga_mgr);
409
410static struct fpga_manager *__fpga_mgr_get(struct device *dev)
411{
412 struct fpga_manager *mgr;
413
414 mgr = to_fpga_manager(dev);
415
416 if (!try_module_get(dev->parent->driver->owner))
417 goto err_dev;
418
419 return mgr;
420
421err_dev:
422 put_device(dev);
423 return ERR_PTR(-ENODEV);
424}
425
426static int fpga_mgr_dev_match(struct device *dev, const void *data)
427{
428 return dev->parent == data;
429}
430
431/**
432 * fpga_mgr_get - get a reference to a fpga mgr
433 * @dev: parent device that fpga mgr was registered with
434 *
435 * Given a device, get a reference to a fpga mgr.
436 *
437 * Return: fpga manager struct or IS_ERR() condition containing error code.
438 */
439struct fpga_manager *fpga_mgr_get(struct device *dev)
440{
441 struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
442 fpga_mgr_dev_match);
443 if (!mgr_dev)
444 return ERR_PTR(-ENODEV);
445
446 return __fpga_mgr_get(mgr_dev);
447}
448EXPORT_SYMBOL_GPL(fpga_mgr_get);
449
450static int fpga_mgr_of_node_match(struct device *dev, const void *data)
451{
452 return dev->of_node == data;
453}
454
455/**
456 * of_fpga_mgr_get - get a reference to a fpga mgr
457 * @node: device node
458 *
459 * Given a device node, get a reference to a fpga mgr.
460 *
461 * Return: fpga manager struct or IS_ERR() condition containing error code.
462 */
463struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
464{
465 struct device *dev;
466
467 dev = class_find_device(fpga_mgr_class, NULL, node,
468 fpga_mgr_of_node_match);
469 if (!dev)
470 return ERR_PTR(-ENODEV);
471
472 return __fpga_mgr_get(dev);
473}
474EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
475
476/**
477 * fpga_mgr_put - release a reference to a fpga manager
478 * @mgr: fpga manager structure
479 */
480void fpga_mgr_put(struct fpga_manager *mgr)
481{
482 module_put(mgr->dev.parent->driver->owner);
483 put_device(&mgr->dev);
484}
485EXPORT_SYMBOL_GPL(fpga_mgr_put);
486
487/**
488 * fpga_mgr_lock - Lock FPGA manager for exclusive use
489 * @mgr: fpga manager
490 *
491 * Given a pointer to FPGA Manager (from fpga_mgr_get() or
492 * of_fpga_mgr_put()) attempt to get the mutex.
493 *
494 * Return: 0 for success or -EBUSY
495 */
496int fpga_mgr_lock(struct fpga_manager *mgr)
497{
498 if (!mutex_trylock(&mgr->ref_mutex)) {
499 dev_err(&mgr->dev, "FPGA manager is in use.\n");
500 return -EBUSY;
501 }
502
503 return 0;
504}
505EXPORT_SYMBOL_GPL(fpga_mgr_lock);
506
507/**
508 * fpga_mgr_unlock - Unlock FPGA manager
509 * @mgr: fpga manager
510 */
511void fpga_mgr_unlock(struct fpga_manager *mgr)
512{
513 mutex_unlock(&mgr->ref_mutex);
514}
515EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
516
517/**
518 * fpga_mgr_register - register a low level fpga manager driver
519 * @dev: fpga manager device from pdev
520 * @name: fpga manager name
521 * @mops: pointer to structure of fpga manager ops
522 * @priv: fpga manager private data
523 *
524 * Return: 0 on success, negative error code otherwise.
525 */
526int fpga_mgr_register(struct device *dev, const char *name,
527 const struct fpga_manager_ops *mops,
528 void *priv)
529{
530 struct fpga_manager *mgr;
531 int id, ret;
532
533 if (!mops || !mops->write_complete || !mops->state ||
534 !mops->write_init || (!mops->write && !mops->write_sg) ||
535 (mops->write && mops->write_sg)) {
536 dev_err(dev, "Attempt to register without fpga_manager_ops\n");
537 return -EINVAL;
538 }
539
540 if (!name || !strlen(name)) {
541 dev_err(dev, "Attempt to register with no name!\n");
542 return -EINVAL;
543 }
544
545 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
546 if (!mgr)
547 return -ENOMEM;
548
549 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
550 if (id < 0) {
551 ret = id;
552 goto error_kfree;
553 }
554
555 mutex_init(&mgr->ref_mutex);
556
557 mgr->name = name;
558 mgr->mops = mops;
559 mgr->priv = priv;
560
561 /*
562 * Initialize framework state by requesting low level driver read state
563 * from device. FPGA may be in reset mode or may have been programmed
564 * by bootloader or EEPROM.
565 */
566 mgr->state = mgr->mops->state(mgr);
567
568 device_initialize(&mgr->dev);
569 mgr->dev.class = fpga_mgr_class;
570 mgr->dev.groups = mops->groups;
571 mgr->dev.parent = dev;
572 mgr->dev.of_node = dev->of_node;
573 mgr->dev.id = id;
574 dev_set_drvdata(dev, mgr);
575
576 ret = dev_set_name(&mgr->dev, "fpga%d", id);
577 if (ret)
578 goto error_device;
579
580 ret = device_add(&mgr->dev);
581 if (ret)
582 goto error_device;
583
584 dev_info(&mgr->dev, "%s registered\n", mgr->name);
585
586 return 0;
587
588error_device:
589 ida_simple_remove(&fpga_mgr_ida, id);
590error_kfree:
591 kfree(mgr);
592
593 return ret;
594}
595EXPORT_SYMBOL_GPL(fpga_mgr_register);
596
597/**
598 * fpga_mgr_unregister - unregister a low level fpga manager driver
599 * @dev: fpga manager device from pdev
600 */
601void fpga_mgr_unregister(struct device *dev)
602{
603 struct fpga_manager *mgr = dev_get_drvdata(dev);
604
605 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
606
607 /*
608 * If the low level driver provides a method for putting fpga into
609 * a desired state upon unregister, do it.
610 */
611 if (mgr->mops->fpga_remove)
612 mgr->mops->fpga_remove(mgr);
613
614 device_unregister(&mgr->dev);
615}
616EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
617
618static void fpga_mgr_dev_release(struct device *dev)
619{
620 struct fpga_manager *mgr = to_fpga_manager(dev);
621
622 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
623 kfree(mgr);
624}
625
626static int __init fpga_mgr_class_init(void)
627{
628 pr_info("FPGA manager framework\n");
629
630 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
631 if (IS_ERR(fpga_mgr_class))
632 return PTR_ERR(fpga_mgr_class);
633
634 fpga_mgr_class->dev_groups = fpga_mgr_groups;
635 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
636
637 return 0;
638}
639
640static void __exit fpga_mgr_class_exit(void)
641{
642 class_destroy(fpga_mgr_class);
643 ida_destroy(&fpga_mgr_ida);
644}
645
646MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
647MODULE_DESCRIPTION("FPGA manager framework");
648MODULE_LICENSE("GPL v2");
649
650subsys_initcall(fpga_mgr_class_init);
651module_exit(fpga_mgr_class_exit);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * FPGA Manager Core
4 *
5 * Copyright (C) 2013-2015 Altera Corporation
6 * Copyright (C) 2017 Intel Corporation
7 *
8 * With code from the mailing list:
9 * Copyright (C) 2013 Xilinx, Inc.
10 */
11#include <linux/firmware.h>
12#include <linux/fpga/fpga-mgr.h>
13#include <linux/idr.h>
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/mutex.h>
17#include <linux/slab.h>
18#include <linux/scatterlist.h>
19#include <linux/highmem.h>
20
21static DEFINE_IDA(fpga_mgr_ida);
22static struct class *fpga_mgr_class;
23
24struct fpga_mgr_devres {
25 struct fpga_manager *mgr;
26};
27
28/**
29 * fpga_image_info_alloc - Allocate an FPGA image info struct
30 * @dev: owning device
31 *
32 * Return: struct fpga_image_info or NULL
33 */
34struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
35{
36 struct fpga_image_info *info;
37
38 get_device(dev);
39
40 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
41 if (!info) {
42 put_device(dev);
43 return NULL;
44 }
45
46 info->dev = dev;
47
48 return info;
49}
50EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
51
52/**
53 * fpga_image_info_free - Free an FPGA image info struct
54 * @info: FPGA image info struct to free
55 */
56void fpga_image_info_free(struct fpga_image_info *info)
57{
58 struct device *dev;
59
60 if (!info)
61 return;
62
63 dev = info->dev;
64 if (info->firmware_name)
65 devm_kfree(dev, info->firmware_name);
66
67 devm_kfree(dev, info);
68 put_device(dev);
69}
70EXPORT_SYMBOL_GPL(fpga_image_info_free);
71
72/*
73 * Call the low level driver's write_init function. This will do the
74 * device-specific things to get the FPGA into the state where it is ready to
75 * receive an FPGA image. The low level driver only gets to see the first
76 * initial_header_size bytes in the buffer.
77 */
78static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
79 struct fpga_image_info *info,
80 const char *buf, size_t count)
81{
82 int ret;
83
84 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
85 if (!mgr->mops->initial_header_size)
86 ret = mgr->mops->write_init(mgr, info, NULL, 0);
87 else
88 ret = mgr->mops->write_init(
89 mgr, info, buf, min(mgr->mops->initial_header_size, count));
90
91 if (ret) {
92 dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
93 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
94 return ret;
95 }
96
97 return 0;
98}
99
100static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
101 struct fpga_image_info *info,
102 struct sg_table *sgt)
103{
104 struct sg_mapping_iter miter;
105 size_t len;
106 char *buf;
107 int ret;
108
109 if (!mgr->mops->initial_header_size)
110 return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
111
112 /*
113 * First try to use miter to map the first fragment to access the
114 * header, this is the typical path.
115 */
116 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
117 if (sg_miter_next(&miter) &&
118 miter.length >= mgr->mops->initial_header_size) {
119 ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
120 miter.length);
121 sg_miter_stop(&miter);
122 return ret;
123 }
124 sg_miter_stop(&miter);
125
126 /* Otherwise copy the fragments into temporary memory. */
127 buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
128 if (!buf)
129 return -ENOMEM;
130
131 len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
132 mgr->mops->initial_header_size);
133 ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
134
135 kfree(buf);
136
137 return ret;
138}
139
140/*
141 * After all the FPGA image has been written, do the device specific steps to
142 * finish and set the FPGA into operating mode.
143 */
144static int fpga_mgr_write_complete(struct fpga_manager *mgr,
145 struct fpga_image_info *info)
146{
147 int ret;
148
149 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
150 ret = mgr->mops->write_complete(mgr, info);
151 if (ret) {
152 dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
153 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
154 return ret;
155 }
156 mgr->state = FPGA_MGR_STATE_OPERATING;
157
158 return 0;
159}
160
161/**
162 * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
163 * @mgr: fpga manager
164 * @info: fpga image specific information
165 * @sgt: scatterlist table
166 *
167 * Step the low level fpga manager through the device-specific steps of getting
168 * an FPGA ready to be configured, writing the image to it, then doing whatever
169 * post-configuration steps necessary. This code assumes the caller got the
170 * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
171 * not an error code.
172 *
173 * This is the preferred entry point for FPGA programming, it does not require
174 * any contiguous kernel memory.
175 *
176 * Return: 0 on success, negative error code otherwise.
177 */
178static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
179 struct fpga_image_info *info,
180 struct sg_table *sgt)
181{
182 int ret;
183
184 ret = fpga_mgr_write_init_sg(mgr, info, sgt);
185 if (ret)
186 return ret;
187
188 /* Write the FPGA image to the FPGA. */
189 mgr->state = FPGA_MGR_STATE_WRITE;
190 if (mgr->mops->write_sg) {
191 ret = mgr->mops->write_sg(mgr, sgt);
192 } else {
193 struct sg_mapping_iter miter;
194
195 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
196 while (sg_miter_next(&miter)) {
197 ret = mgr->mops->write(mgr, miter.addr, miter.length);
198 if (ret)
199 break;
200 }
201 sg_miter_stop(&miter);
202 }
203
204 if (ret) {
205 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
206 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
207 return ret;
208 }
209
210 return fpga_mgr_write_complete(mgr, info);
211}
212
213static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
214 struct fpga_image_info *info,
215 const char *buf, size_t count)
216{
217 int ret;
218
219 ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
220 if (ret)
221 return ret;
222
223 /*
224 * Write the FPGA image to the FPGA.
225 */
226 mgr->state = FPGA_MGR_STATE_WRITE;
227 ret = mgr->mops->write(mgr, buf, count);
228 if (ret) {
229 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
230 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
231 return ret;
232 }
233
234 return fpga_mgr_write_complete(mgr, info);
235}
236
237/**
238 * fpga_mgr_buf_load - load fpga from image in buffer
239 * @mgr: fpga manager
240 * @info: fpga image info
241 * @buf: buffer contain fpga image
242 * @count: byte count of buf
243 *
244 * Step the low level fpga manager through the device-specific steps of getting
245 * an FPGA ready to be configured, writing the image to it, then doing whatever
246 * post-configuration steps necessary. This code assumes the caller got the
247 * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
248 *
249 * Return: 0 on success, negative error code otherwise.
250 */
251static int fpga_mgr_buf_load(struct fpga_manager *mgr,
252 struct fpga_image_info *info,
253 const char *buf, size_t count)
254{
255 struct page **pages;
256 struct sg_table sgt;
257 const void *p;
258 int nr_pages;
259 int index;
260 int rc;
261
262 /*
263 * This is just a fast path if the caller has already created a
264 * contiguous kernel buffer and the driver doesn't require SG, non-SG
265 * drivers will still work on the slow path.
266 */
267 if (mgr->mops->write)
268 return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
269
270 /*
271 * Convert the linear kernel pointer into a sg_table of pages for use
272 * by the driver.
273 */
274 nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
275 (unsigned long)buf / PAGE_SIZE;
276 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
277 if (!pages)
278 return -ENOMEM;
279
280 p = buf - offset_in_page(buf);
281 for (index = 0; index < nr_pages; index++) {
282 if (is_vmalloc_addr(p))
283 pages[index] = vmalloc_to_page(p);
284 else
285 pages[index] = kmap_to_page((void *)p);
286 if (!pages[index]) {
287 kfree(pages);
288 return -EFAULT;
289 }
290 p += PAGE_SIZE;
291 }
292
293 /*
294 * The temporary pages list is used to code share the merging algorithm
295 * in sg_alloc_table_from_pages
296 */
297 rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
298 count, GFP_KERNEL);
299 kfree(pages);
300 if (rc)
301 return rc;
302
303 rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
304 sg_free_table(&sgt);
305
306 return rc;
307}
308
309/**
310 * fpga_mgr_firmware_load - request firmware and load to fpga
311 * @mgr: fpga manager
312 * @info: fpga image specific information
313 * @image_name: name of image file on the firmware search path
314 *
315 * Request an FPGA image using the firmware class, then write out to the FPGA.
316 * Update the state before each step to provide info on what step failed if
317 * there is a failure. This code assumes the caller got the mgr pointer
318 * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
319 * code.
320 *
321 * Return: 0 on success, negative error code otherwise.
322 */
323static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
324 struct fpga_image_info *info,
325 const char *image_name)
326{
327 struct device *dev = &mgr->dev;
328 const struct firmware *fw;
329 int ret;
330
331 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
332
333 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
334
335 ret = request_firmware(&fw, image_name, dev);
336 if (ret) {
337 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
338 dev_err(dev, "Error requesting firmware %s\n", image_name);
339 return ret;
340 }
341
342 ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
343
344 release_firmware(fw);
345
346 return ret;
347}
348
349/**
350 * fpga_mgr_load - load FPGA from scatter/gather table, buffer, or firmware
351 * @mgr: fpga manager
352 * @info: fpga image information.
353 *
354 * Load the FPGA from an image which is indicated in @info. If successful, the
355 * FPGA ends up in operating mode.
356 *
357 * Return: 0 on success, negative error code otherwise.
358 */
359int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
360{
361 if (info->sgt)
362 return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
363 if (info->buf && info->count)
364 return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
365 if (info->firmware_name)
366 return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
367 return -EINVAL;
368}
369EXPORT_SYMBOL_GPL(fpga_mgr_load);
370
371static const char * const state_str[] = {
372 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
373 [FPGA_MGR_STATE_POWER_OFF] = "power off",
374 [FPGA_MGR_STATE_POWER_UP] = "power up",
375 [FPGA_MGR_STATE_RESET] = "reset",
376
377 /* requesting FPGA image from firmware */
378 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
379 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
380
381 /* Preparing FPGA to receive image */
382 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
383 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
384
385 /* Writing image to FPGA */
386 [FPGA_MGR_STATE_WRITE] = "write",
387 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
388
389 /* Finishing configuration after image has been written */
390 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
391 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
392
393 /* FPGA reports to be in normal operating mode */
394 [FPGA_MGR_STATE_OPERATING] = "operating",
395};
396
397static ssize_t name_show(struct device *dev,
398 struct device_attribute *attr, char *buf)
399{
400 struct fpga_manager *mgr = to_fpga_manager(dev);
401
402 return sprintf(buf, "%s\n", mgr->name);
403}
404
405static ssize_t state_show(struct device *dev,
406 struct device_attribute *attr, char *buf)
407{
408 struct fpga_manager *mgr = to_fpga_manager(dev);
409
410 return sprintf(buf, "%s\n", state_str[mgr->state]);
411}
412
413static ssize_t status_show(struct device *dev,
414 struct device_attribute *attr, char *buf)
415{
416 struct fpga_manager *mgr = to_fpga_manager(dev);
417 u64 status;
418 int len = 0;
419
420 if (!mgr->mops->status)
421 return -ENOENT;
422
423 status = mgr->mops->status(mgr);
424
425 if (status & FPGA_MGR_STATUS_OPERATION_ERR)
426 len += sprintf(buf + len, "reconfig operation error\n");
427 if (status & FPGA_MGR_STATUS_CRC_ERR)
428 len += sprintf(buf + len, "reconfig CRC error\n");
429 if (status & FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR)
430 len += sprintf(buf + len, "reconfig incompatible image\n");
431 if (status & FPGA_MGR_STATUS_IP_PROTOCOL_ERR)
432 len += sprintf(buf + len, "reconfig IP protocol error\n");
433 if (status & FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR)
434 len += sprintf(buf + len, "reconfig fifo overflow error\n");
435
436 return len;
437}
438
439static DEVICE_ATTR_RO(name);
440static DEVICE_ATTR_RO(state);
441static DEVICE_ATTR_RO(status);
442
443static struct attribute *fpga_mgr_attrs[] = {
444 &dev_attr_name.attr,
445 &dev_attr_state.attr,
446 &dev_attr_status.attr,
447 NULL,
448};
449ATTRIBUTE_GROUPS(fpga_mgr);
450
451static struct fpga_manager *__fpga_mgr_get(struct device *dev)
452{
453 struct fpga_manager *mgr;
454
455 mgr = to_fpga_manager(dev);
456
457 if (!try_module_get(dev->parent->driver->owner))
458 goto err_dev;
459
460 return mgr;
461
462err_dev:
463 put_device(dev);
464 return ERR_PTR(-ENODEV);
465}
466
467static int fpga_mgr_dev_match(struct device *dev, const void *data)
468{
469 return dev->parent == data;
470}
471
472/**
473 * fpga_mgr_get - Given a device, get a reference to an fpga mgr.
474 * @dev: parent device that fpga mgr was registered with
475 *
476 * Return: fpga manager struct or IS_ERR() condition containing error code.
477 */
478struct fpga_manager *fpga_mgr_get(struct device *dev)
479{
480 struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
481 fpga_mgr_dev_match);
482 if (!mgr_dev)
483 return ERR_PTR(-ENODEV);
484
485 return __fpga_mgr_get(mgr_dev);
486}
487EXPORT_SYMBOL_GPL(fpga_mgr_get);
488
489/**
490 * of_fpga_mgr_get - Given a device node, get a reference to an fpga mgr.
491 *
492 * @node: device node
493 *
494 * Return: fpga manager struct or IS_ERR() condition containing error code.
495 */
496struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
497{
498 struct device *dev;
499
500 dev = class_find_device_by_of_node(fpga_mgr_class, node);
501 if (!dev)
502 return ERR_PTR(-ENODEV);
503
504 return __fpga_mgr_get(dev);
505}
506EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
507
508/**
509 * fpga_mgr_put - release a reference to an fpga manager
510 * @mgr: fpga manager structure
511 */
512void fpga_mgr_put(struct fpga_manager *mgr)
513{
514 module_put(mgr->dev.parent->driver->owner);
515 put_device(&mgr->dev);
516}
517EXPORT_SYMBOL_GPL(fpga_mgr_put);
518
519/**
520 * fpga_mgr_lock - Lock FPGA manager for exclusive use
521 * @mgr: fpga manager
522 *
523 * Given a pointer to FPGA Manager (from fpga_mgr_get() or
524 * of_fpga_mgr_put()) attempt to get the mutex. The user should call
525 * fpga_mgr_lock() and verify that it returns 0 before attempting to
526 * program the FPGA. Likewise, the user should call fpga_mgr_unlock
527 * when done programming the FPGA.
528 *
529 * Return: 0 for success or -EBUSY
530 */
531int fpga_mgr_lock(struct fpga_manager *mgr)
532{
533 if (!mutex_trylock(&mgr->ref_mutex)) {
534 dev_err(&mgr->dev, "FPGA manager is in use.\n");
535 return -EBUSY;
536 }
537
538 return 0;
539}
540EXPORT_SYMBOL_GPL(fpga_mgr_lock);
541
542/**
543 * fpga_mgr_unlock - Unlock FPGA manager after done programming
544 * @mgr: fpga manager
545 */
546void fpga_mgr_unlock(struct fpga_manager *mgr)
547{
548 mutex_unlock(&mgr->ref_mutex);
549}
550EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
551
552/**
553 * fpga_mgr_create - create and initialize an FPGA manager struct
554 * @parent: fpga manager device from pdev
555 * @name: fpga manager name
556 * @mops: pointer to structure of fpga manager ops
557 * @priv: fpga manager private data
558 *
559 * The caller of this function is responsible for freeing the struct with
560 * fpga_mgr_free(). Using devm_fpga_mgr_create() instead is recommended.
561 *
562 * Return: pointer to struct fpga_manager or NULL
563 */
564struct fpga_manager *fpga_mgr_create(struct device *parent, const char *name,
565 const struct fpga_manager_ops *mops,
566 void *priv)
567{
568 struct fpga_manager *mgr;
569 int id, ret;
570
571 if (!mops || !mops->write_complete || !mops->state ||
572 !mops->write_init || (!mops->write && !mops->write_sg) ||
573 (mops->write && mops->write_sg)) {
574 dev_err(parent, "Attempt to register without fpga_manager_ops\n");
575 return NULL;
576 }
577
578 if (!name || !strlen(name)) {
579 dev_err(parent, "Attempt to register with no name!\n");
580 return NULL;
581 }
582
583 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
584 if (!mgr)
585 return NULL;
586
587 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
588 if (id < 0)
589 goto error_kfree;
590
591 mutex_init(&mgr->ref_mutex);
592
593 mgr->name = name;
594 mgr->mops = mops;
595 mgr->priv = priv;
596
597 device_initialize(&mgr->dev);
598 mgr->dev.class = fpga_mgr_class;
599 mgr->dev.groups = mops->groups;
600 mgr->dev.parent = parent;
601 mgr->dev.of_node = parent->of_node;
602 mgr->dev.id = id;
603
604 ret = dev_set_name(&mgr->dev, "fpga%d", id);
605 if (ret)
606 goto error_device;
607
608 return mgr;
609
610error_device:
611 ida_simple_remove(&fpga_mgr_ida, id);
612error_kfree:
613 kfree(mgr);
614
615 return NULL;
616}
617EXPORT_SYMBOL_GPL(fpga_mgr_create);
618
619/**
620 * fpga_mgr_free - free an FPGA manager created with fpga_mgr_create()
621 * @mgr: fpga manager struct
622 */
623void fpga_mgr_free(struct fpga_manager *mgr)
624{
625 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
626 kfree(mgr);
627}
628EXPORT_SYMBOL_GPL(fpga_mgr_free);
629
630static void devm_fpga_mgr_release(struct device *dev, void *res)
631{
632 struct fpga_mgr_devres *dr = res;
633
634 fpga_mgr_free(dr->mgr);
635}
636
637/**
638 * devm_fpga_mgr_create - create and initialize a managed FPGA manager struct
639 * @parent: fpga manager device from pdev
640 * @name: fpga manager name
641 * @mops: pointer to structure of fpga manager ops
642 * @priv: fpga manager private data
643 *
644 * This function is intended for use in an FPGA manager driver's probe function.
645 * After the manager driver creates the manager struct with
646 * devm_fpga_mgr_create(), it should register it with fpga_mgr_register(). The
647 * manager driver's remove function should call fpga_mgr_unregister(). The
648 * manager struct allocated with this function will be freed automatically on
649 * driver detach. This includes the case of a probe function returning error
650 * before calling fpga_mgr_register(), the struct will still get cleaned up.
651 *
652 * Return: pointer to struct fpga_manager or NULL
653 */
654struct fpga_manager *devm_fpga_mgr_create(struct device *parent, const char *name,
655 const struct fpga_manager_ops *mops,
656 void *priv)
657{
658 struct fpga_mgr_devres *dr;
659
660 dr = devres_alloc(devm_fpga_mgr_release, sizeof(*dr), GFP_KERNEL);
661 if (!dr)
662 return NULL;
663
664 dr->mgr = fpga_mgr_create(parent, name, mops, priv);
665 if (!dr->mgr) {
666 devres_free(dr);
667 return NULL;
668 }
669
670 devres_add(parent, dr);
671
672 return dr->mgr;
673}
674EXPORT_SYMBOL_GPL(devm_fpga_mgr_create);
675
676/**
677 * fpga_mgr_register - register an FPGA manager
678 * @mgr: fpga manager struct
679 *
680 * Return: 0 on success, negative error code otherwise.
681 */
682int fpga_mgr_register(struct fpga_manager *mgr)
683{
684 int ret;
685
686 /*
687 * Initialize framework state by requesting low level driver read state
688 * from device. FPGA may be in reset mode or may have been programmed
689 * by bootloader or EEPROM.
690 */
691 mgr->state = mgr->mops->state(mgr);
692
693 ret = device_add(&mgr->dev);
694 if (ret)
695 goto error_device;
696
697 dev_info(&mgr->dev, "%s registered\n", mgr->name);
698
699 return 0;
700
701error_device:
702 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
703
704 return ret;
705}
706EXPORT_SYMBOL_GPL(fpga_mgr_register);
707
708/**
709 * fpga_mgr_unregister - unregister an FPGA manager
710 * @mgr: fpga manager struct
711 *
712 * This function is intended for use in an FPGA manager driver's remove function.
713 */
714void fpga_mgr_unregister(struct fpga_manager *mgr)
715{
716 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
717
718 /*
719 * If the low level driver provides a method for putting fpga into
720 * a desired state upon unregister, do it.
721 */
722 if (mgr->mops->fpga_remove)
723 mgr->mops->fpga_remove(mgr);
724
725 device_unregister(&mgr->dev);
726}
727EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
728
729static int fpga_mgr_devres_match(struct device *dev, void *res,
730 void *match_data)
731{
732 struct fpga_mgr_devres *dr = res;
733
734 return match_data == dr->mgr;
735}
736
737static void devm_fpga_mgr_unregister(struct device *dev, void *res)
738{
739 struct fpga_mgr_devres *dr = res;
740
741 fpga_mgr_unregister(dr->mgr);
742}
743
744/**
745 * devm_fpga_mgr_register - resource managed variant of fpga_mgr_register()
746 * @dev: managing device for this FPGA manager
747 * @mgr: fpga manager struct
748 *
749 * This is the devres variant of fpga_mgr_register() for which the unregister
750 * function will be called automatically when the managing device is detached.
751 */
752int devm_fpga_mgr_register(struct device *dev, struct fpga_manager *mgr)
753{
754 struct fpga_mgr_devres *dr;
755 int ret;
756
757 /*
758 * Make sure that the struct fpga_manager * that is passed in is
759 * managed itself.
760 */
761 if (WARN_ON(!devres_find(dev, devm_fpga_mgr_release,
762 fpga_mgr_devres_match, mgr)))
763 return -EINVAL;
764
765 dr = devres_alloc(devm_fpga_mgr_unregister, sizeof(*dr), GFP_KERNEL);
766 if (!dr)
767 return -ENOMEM;
768
769 ret = fpga_mgr_register(mgr);
770 if (ret) {
771 devres_free(dr);
772 return ret;
773 }
774
775 dr->mgr = mgr;
776 devres_add(dev, dr);
777
778 return 0;
779}
780EXPORT_SYMBOL_GPL(devm_fpga_mgr_register);
781
782static void fpga_mgr_dev_release(struct device *dev)
783{
784}
785
786static int __init fpga_mgr_class_init(void)
787{
788 pr_info("FPGA manager framework\n");
789
790 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
791 if (IS_ERR(fpga_mgr_class))
792 return PTR_ERR(fpga_mgr_class);
793
794 fpga_mgr_class->dev_groups = fpga_mgr_groups;
795 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
796
797 return 0;
798}
799
800static void __exit fpga_mgr_class_exit(void)
801{
802 class_destroy(fpga_mgr_class);
803 ida_destroy(&fpga_mgr_ida);
804}
805
806MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
807MODULE_DESCRIPTION("FPGA manager framework");
808MODULE_LICENSE("GPL v2");
809
810subsys_initcall(fpga_mgr_class_init);
811module_exit(fpga_mgr_class_exit);