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  1// SPDX-License-Identifier:     GPL-2.0
  2/*
  3 * Copyright (C) 2019, Intel Corporation
  4 */
  5#include "socfpga_agilex.dtsi"
  6
  7/ {
  8	model = "SoCFPGA Agilex SoCDK";
  9
 10	aliases {
 11		serial0 = &uart0;
 12		ethernet0 = &gmac0;
 13		ethernet1 = &gmac1;
 14		ethernet2 = &gmac2;
 15	};
 16
 17	chosen {
 18		stdout-path = "serial0:115200n8";
 19	};
 20
 21	leds {
 22		compatible = "gpio-leds";
 23		hps0 {
 24			label = "hps_led0";
 25			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
 26		};
 27
 28		hps1 {
 29			label = "hps_led1";
 30			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
 31		};
 32
 33		hps2 {
 34			label = "hps_led2";
 35			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
 36		};
 37	};
 38
 39	memory {
 40		device_type = "memory";
 41		/* We expect the bootloader to fill in the reg */
 42		reg = <0 0 0 0>;
 43	};
 44};
 45
 46&gpio1 {
 47	status = "okay";
 48};
 49
 50&gmac0 {
 51	status = "okay";
 52	phy-mode = "rgmii";
 53	phy-handle = <&phy0>;
 54
 55	max-frame-size = <9000>;
 56
 57	mdio0 {
 58		#address-cells = <1>;
 59		#size-cells = <0>;
 60		compatible = "snps,dwmac-mdio";
 61		phy0: ethernet-phy@0 {
 62			reg = <4>;
 63
 64			txd0-skew-ps = <0>; /* -420ps */
 65			txd1-skew-ps = <0>; /* -420ps */
 66			txd2-skew-ps = <0>; /* -420ps */
 67			txd3-skew-ps = <0>; /* -420ps */
 68			rxd0-skew-ps = <420>; /* 0ps */
 69			rxd1-skew-ps = <420>; /* 0ps */
 70			rxd2-skew-ps = <420>; /* 0ps */
 71			rxd3-skew-ps = <420>; /* 0ps */
 72			txen-skew-ps = <0>; /* -420ps */
 73			txc-skew-ps = <900>; /* 0ps */
 74			rxdv-skew-ps = <420>; /* 0ps */
 75			rxc-skew-ps = <1680>; /* 780ps */
 76		};
 77	};
 78};
 79
 80&mmc {
 81	status = "okay";
 82	cap-sd-highspeed;
 83	broken-cd;
 84	bus-width = <4>;
 85};
 86
 87&osc1 {
 88	clock-frequency = <25000000>;
 89};
 90
 91&uart0 {
 92	status = "okay";
 93};
 94
 95&usb0 {
 96	status = "okay";
 97	disable-over-current;
 98};
 99
100&watchdog0 {
101	status = "okay";
102};
103
104&qspi {
105	status = "okay";
106	flash@0 {
107		#address-cells = <1>;
108		#size-cells = <1>;
109		compatible = "micron,mt25qu02g", "jedec,spi-nor";
110		reg = <0>;
111		spi-max-frequency = <100000000>;
112
113		m25p,fast-read;
114		cdns,page-size = <256>;
115		cdns,block-size = <16>;
116		cdns,read-delay = <2>;
117		cdns,tshsl-ns = <50>;
118		cdns,tsd2d-ns = <50>;
119		cdns,tchsh-ns = <4>;
120		cdns,tslch-ns = <4>;
121
122		partitions {
123			compatible = "fixed-partitions";
124			#address-cells = <1>;
125			#size-cells = <1>;
126
127			qspi_boot: partition@0 {
128				label = "Boot and fpga data";
129				reg = <0x0 0x03FE0000>;
130			};
131
132			qspi_rootfs: partition@3FE0000 {
133				label = "Root Filesystem - JFFS2";
134				reg = <0x03FE0000 0x0C020000>;
135			};
136		};
137	};
138};