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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Procfs interface for the PCI bus
4 *
5 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
6 */
7
8#include <linux/init.h>
9#include <linux/pci.h>
10#include <linux/slab.h>
11#include <linux/module.h>
12#include <linux/proc_fs.h>
13#include <linux/seq_file.h>
14#include <linux/capability.h>
15#include <linux/uaccess.h>
16#include <asm/byteorder.h>
17#include "pci.h"
18
19static int proc_initialized; /* = 0 */
20
21static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
22{
23 struct pci_dev *dev = PDE_DATA(file_inode(file));
24 return fixed_size_llseek(file, off, whence, dev->cfg_size);
25}
26
27static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
28 size_t nbytes, loff_t *ppos)
29{
30 struct pci_dev *dev = PDE_DATA(file_inode(file));
31 unsigned int pos = *ppos;
32 unsigned int cnt, size;
33
34 /*
35 * Normal users can read only the standardized portion of the
36 * configuration space as several chips lock up when trying to read
37 * undefined locations (think of Intel PIIX4 as a typical example).
38 */
39
40 if (capable(CAP_SYS_ADMIN))
41 size = dev->cfg_size;
42 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
43 size = 128;
44 else
45 size = 64;
46
47 if (pos >= size)
48 return 0;
49 if (nbytes >= size)
50 nbytes = size;
51 if (pos + nbytes > size)
52 nbytes = size - pos;
53 cnt = nbytes;
54
55 if (!access_ok(VERIFY_WRITE, buf, cnt))
56 return -EINVAL;
57
58 pci_config_pm_runtime_get(dev);
59
60 if ((pos & 1) && cnt) {
61 unsigned char val;
62 pci_user_read_config_byte(dev, pos, &val);
63 __put_user(val, buf);
64 buf++;
65 pos++;
66 cnt--;
67 }
68
69 if ((pos & 3) && cnt > 2) {
70 unsigned short val;
71 pci_user_read_config_word(dev, pos, &val);
72 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
73 buf += 2;
74 pos += 2;
75 cnt -= 2;
76 }
77
78 while (cnt >= 4) {
79 unsigned int val;
80 pci_user_read_config_dword(dev, pos, &val);
81 __put_user(cpu_to_le32(val), (__le32 __user *) buf);
82 buf += 4;
83 pos += 4;
84 cnt -= 4;
85 }
86
87 if (cnt >= 2) {
88 unsigned short val;
89 pci_user_read_config_word(dev, pos, &val);
90 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
91 buf += 2;
92 pos += 2;
93 cnt -= 2;
94 }
95
96 if (cnt) {
97 unsigned char val;
98 pci_user_read_config_byte(dev, pos, &val);
99 __put_user(val, buf);
100 buf++;
101 pos++;
102 cnt--;
103 }
104
105 pci_config_pm_runtime_put(dev);
106
107 *ppos = pos;
108 return nbytes;
109}
110
111static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
112 size_t nbytes, loff_t *ppos)
113{
114 struct inode *ino = file_inode(file);
115 struct pci_dev *dev = PDE_DATA(ino);
116 int pos = *ppos;
117 int size = dev->cfg_size;
118 int cnt;
119
120 if (pos >= size)
121 return 0;
122 if (nbytes >= size)
123 nbytes = size;
124 if (pos + nbytes > size)
125 nbytes = size - pos;
126 cnt = nbytes;
127
128 if (!access_ok(VERIFY_READ, buf, cnt))
129 return -EINVAL;
130
131 pci_config_pm_runtime_get(dev);
132
133 if ((pos & 1) && cnt) {
134 unsigned char val;
135 __get_user(val, buf);
136 pci_user_write_config_byte(dev, pos, val);
137 buf++;
138 pos++;
139 cnt--;
140 }
141
142 if ((pos & 3) && cnt > 2) {
143 __le16 val;
144 __get_user(val, (__le16 __user *) buf);
145 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
146 buf += 2;
147 pos += 2;
148 cnt -= 2;
149 }
150
151 while (cnt >= 4) {
152 __le32 val;
153 __get_user(val, (__le32 __user *) buf);
154 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
155 buf += 4;
156 pos += 4;
157 cnt -= 4;
158 }
159
160 if (cnt >= 2) {
161 __le16 val;
162 __get_user(val, (__le16 __user *) buf);
163 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
164 buf += 2;
165 pos += 2;
166 cnt -= 2;
167 }
168
169 if (cnt) {
170 unsigned char val;
171 __get_user(val, buf);
172 pci_user_write_config_byte(dev, pos, val);
173 buf++;
174 pos++;
175 cnt--;
176 }
177
178 pci_config_pm_runtime_put(dev);
179
180 *ppos = pos;
181 i_size_write(ino, dev->cfg_size);
182 return nbytes;
183}
184
185struct pci_filp_private {
186 enum pci_mmap_state mmap_state;
187 int write_combine;
188};
189
190static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
191 unsigned long arg)
192{
193 struct pci_dev *dev = PDE_DATA(file_inode(file));
194#ifdef HAVE_PCI_MMAP
195 struct pci_filp_private *fpriv = file->private_data;
196#endif /* HAVE_PCI_MMAP */
197 int ret = 0;
198
199 switch (cmd) {
200 case PCIIOC_CONTROLLER:
201 ret = pci_domain_nr(dev->bus);
202 break;
203
204#ifdef HAVE_PCI_MMAP
205 case PCIIOC_MMAP_IS_IO:
206 if (!arch_can_pci_mmap_io())
207 return -EINVAL;
208 fpriv->mmap_state = pci_mmap_io;
209 break;
210
211 case PCIIOC_MMAP_IS_MEM:
212 fpriv->mmap_state = pci_mmap_mem;
213 break;
214
215 case PCIIOC_WRITE_COMBINE:
216 if (arch_can_pci_mmap_wc()) {
217 if (arg)
218 fpriv->write_combine = 1;
219 else
220 fpriv->write_combine = 0;
221 break;
222 }
223 /* If arch decided it can't, fall through... */
224#endif /* HAVE_PCI_MMAP */
225 default:
226 ret = -EINVAL;
227 break;
228 }
229
230 return ret;
231}
232
233#ifdef HAVE_PCI_MMAP
234static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
235{
236 struct pci_dev *dev = PDE_DATA(file_inode(file));
237 struct pci_filp_private *fpriv = file->private_data;
238 int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
239
240 if (!capable(CAP_SYS_RAWIO))
241 return -EPERM;
242
243 if (fpriv->mmap_state == pci_mmap_io) {
244 if (!arch_can_pci_mmap_io())
245 return -EINVAL;
246 res_bit = IORESOURCE_IO;
247 }
248
249 /* Make sure the caller is mapping a real resource for this device */
250 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
251 if (dev->resource[i].flags & res_bit &&
252 pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
253 break;
254 }
255
256 if (i >= PCI_ROM_RESOURCE)
257 return -ENODEV;
258
259 if (fpriv->mmap_state == pci_mmap_mem &&
260 fpriv->write_combine) {
261 if (dev->resource[i].flags & IORESOURCE_PREFETCH)
262 write_combine = 1;
263 else
264 return -EINVAL;
265 }
266 ret = pci_mmap_page_range(dev, i, vma,
267 fpriv->mmap_state, write_combine);
268 if (ret < 0)
269 return ret;
270
271 return 0;
272}
273
274static int proc_bus_pci_open(struct inode *inode, struct file *file)
275{
276 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
277
278 if (!fpriv)
279 return -ENOMEM;
280
281 fpriv->mmap_state = pci_mmap_io;
282 fpriv->write_combine = 0;
283
284 file->private_data = fpriv;
285
286 return 0;
287}
288
289static int proc_bus_pci_release(struct inode *inode, struct file *file)
290{
291 kfree(file->private_data);
292 file->private_data = NULL;
293
294 return 0;
295}
296#endif /* HAVE_PCI_MMAP */
297
298static const struct file_operations proc_bus_pci_operations = {
299 .owner = THIS_MODULE,
300 .llseek = proc_bus_pci_lseek,
301 .read = proc_bus_pci_read,
302 .write = proc_bus_pci_write,
303 .unlocked_ioctl = proc_bus_pci_ioctl,
304 .compat_ioctl = proc_bus_pci_ioctl,
305#ifdef HAVE_PCI_MMAP
306 .open = proc_bus_pci_open,
307 .release = proc_bus_pci_release,
308 .mmap = proc_bus_pci_mmap,
309#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
310 .get_unmapped_area = get_pci_unmapped_area,
311#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
312#endif /* HAVE_PCI_MMAP */
313};
314
315/* iterator */
316static void *pci_seq_start(struct seq_file *m, loff_t *pos)
317{
318 struct pci_dev *dev = NULL;
319 loff_t n = *pos;
320
321 for_each_pci_dev(dev) {
322 if (!n--)
323 break;
324 }
325 return dev;
326}
327
328static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
329{
330 struct pci_dev *dev = v;
331
332 (*pos)++;
333 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
334 return dev;
335}
336
337static void pci_seq_stop(struct seq_file *m, void *v)
338{
339 if (v) {
340 struct pci_dev *dev = v;
341 pci_dev_put(dev);
342 }
343}
344
345static int show_device(struct seq_file *m, void *v)
346{
347 const struct pci_dev *dev = v;
348 const struct pci_driver *drv;
349 int i;
350
351 if (dev == NULL)
352 return 0;
353
354 drv = pci_dev_driver(dev);
355 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
356 dev->bus->number,
357 dev->devfn,
358 dev->vendor,
359 dev->device,
360 dev->irq);
361
362 /* only print standard and ROM resources to preserve compatibility */
363 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
364 resource_size_t start, end;
365 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
366 seq_printf(m, "\t%16llx",
367 (unsigned long long)(start |
368 (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
369 }
370 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
371 resource_size_t start, end;
372 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
373 seq_printf(m, "\t%16llx",
374 dev->resource[i].start < dev->resource[i].end ?
375 (unsigned long long)(end - start) + 1 : 0);
376 }
377 seq_putc(m, '\t');
378 if (drv)
379 seq_printf(m, "%s", drv->name);
380 seq_putc(m, '\n');
381 return 0;
382}
383
384static const struct seq_operations proc_bus_pci_devices_op = {
385 .start = pci_seq_start,
386 .next = pci_seq_next,
387 .stop = pci_seq_stop,
388 .show = show_device
389};
390
391static struct proc_dir_entry *proc_bus_pci_dir;
392
393int pci_proc_attach_device(struct pci_dev *dev)
394{
395 struct pci_bus *bus = dev->bus;
396 struct proc_dir_entry *e;
397 char name[16];
398
399 if (!proc_initialized)
400 return -EACCES;
401
402 if (!bus->procdir) {
403 if (pci_proc_domain(bus)) {
404 sprintf(name, "%04x:%02x", pci_domain_nr(bus),
405 bus->number);
406 } else {
407 sprintf(name, "%02x", bus->number);
408 }
409 bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
410 if (!bus->procdir)
411 return -ENOMEM;
412 }
413
414 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
415 e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
416 &proc_bus_pci_operations, dev);
417 if (!e)
418 return -ENOMEM;
419 proc_set_size(e, dev->cfg_size);
420 dev->procent = e;
421
422 return 0;
423}
424
425int pci_proc_detach_device(struct pci_dev *dev)
426{
427 proc_remove(dev->procent);
428 dev->procent = NULL;
429 return 0;
430}
431
432int pci_proc_detach_bus(struct pci_bus *bus)
433{
434 proc_remove(bus->procdir);
435 return 0;
436}
437
438static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
439{
440 return seq_open(file, &proc_bus_pci_devices_op);
441}
442
443static const struct file_operations proc_bus_pci_dev_operations = {
444 .owner = THIS_MODULE,
445 .open = proc_bus_pci_dev_open,
446 .read = seq_read,
447 .llseek = seq_lseek,
448 .release = seq_release,
449};
450
451static int __init pci_proc_init(void)
452{
453 struct pci_dev *dev = NULL;
454 proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
455 proc_create("devices", 0, proc_bus_pci_dir,
456 &proc_bus_pci_dev_operations);
457 proc_initialized = 1;
458 for_each_pci_dev(dev)
459 pci_proc_attach_device(dev);
460
461 return 0;
462}
463device_initcall(pci_proc_init);
1/*
2 * Procfs interface for the PCI bus.
3 *
4 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
5 */
6
7#include <linux/init.h>
8#include <linux/pci.h>
9#include <linux/slab.h>
10#include <linux/module.h>
11#include <linux/proc_fs.h>
12#include <linux/seq_file.h>
13#include <linux/capability.h>
14#include <asm/uaccess.h>
15#include <asm/byteorder.h>
16#include "pci.h"
17
18static int proc_initialized; /* = 0 */
19
20static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
21{
22 struct pci_dev *dev = PDE_DATA(file_inode(file));
23 return fixed_size_llseek(file, off, whence, dev->cfg_size);
24}
25
26static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
27 size_t nbytes, loff_t *ppos)
28{
29 struct pci_dev *dev = PDE_DATA(file_inode(file));
30 unsigned int pos = *ppos;
31 unsigned int cnt, size;
32
33 /*
34 * Normal users can read only the standardized portion of the
35 * configuration space as several chips lock up when trying to read
36 * undefined locations (think of Intel PIIX4 as a typical example).
37 */
38
39 if (capable(CAP_SYS_ADMIN))
40 size = dev->cfg_size;
41 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
42 size = 128;
43 else
44 size = 64;
45
46 if (pos >= size)
47 return 0;
48 if (nbytes >= size)
49 nbytes = size;
50 if (pos + nbytes > size)
51 nbytes = size - pos;
52 cnt = nbytes;
53
54 if (!access_ok(VERIFY_WRITE, buf, cnt))
55 return -EINVAL;
56
57 pci_config_pm_runtime_get(dev);
58
59 if ((pos & 1) && cnt) {
60 unsigned char val;
61 pci_user_read_config_byte(dev, pos, &val);
62 __put_user(val, buf);
63 buf++;
64 pos++;
65 cnt--;
66 }
67
68 if ((pos & 3) && cnt > 2) {
69 unsigned short val;
70 pci_user_read_config_word(dev, pos, &val);
71 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
72 buf += 2;
73 pos += 2;
74 cnt -= 2;
75 }
76
77 while (cnt >= 4) {
78 unsigned int val;
79 pci_user_read_config_dword(dev, pos, &val);
80 __put_user(cpu_to_le32(val), (__le32 __user *) buf);
81 buf += 4;
82 pos += 4;
83 cnt -= 4;
84 }
85
86 if (cnt >= 2) {
87 unsigned short val;
88 pci_user_read_config_word(dev, pos, &val);
89 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
90 buf += 2;
91 pos += 2;
92 cnt -= 2;
93 }
94
95 if (cnt) {
96 unsigned char val;
97 pci_user_read_config_byte(dev, pos, &val);
98 __put_user(val, buf);
99 buf++;
100 pos++;
101 cnt--;
102 }
103
104 pci_config_pm_runtime_put(dev);
105
106 *ppos = pos;
107 return nbytes;
108}
109
110static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
111 size_t nbytes, loff_t *ppos)
112{
113 struct inode *ino = file_inode(file);
114 struct pci_dev *dev = PDE_DATA(ino);
115 int pos = *ppos;
116 int size = dev->cfg_size;
117 int cnt;
118
119 if (pos >= size)
120 return 0;
121 if (nbytes >= size)
122 nbytes = size;
123 if (pos + nbytes > size)
124 nbytes = size - pos;
125 cnt = nbytes;
126
127 if (!access_ok(VERIFY_READ, buf, cnt))
128 return -EINVAL;
129
130 pci_config_pm_runtime_get(dev);
131
132 if ((pos & 1) && cnt) {
133 unsigned char val;
134 __get_user(val, buf);
135 pci_user_write_config_byte(dev, pos, val);
136 buf++;
137 pos++;
138 cnt--;
139 }
140
141 if ((pos & 3) && cnt > 2) {
142 __le16 val;
143 __get_user(val, (__le16 __user *) buf);
144 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
145 buf += 2;
146 pos += 2;
147 cnt -= 2;
148 }
149
150 while (cnt >= 4) {
151 __le32 val;
152 __get_user(val, (__le32 __user *) buf);
153 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
154 buf += 4;
155 pos += 4;
156 cnt -= 4;
157 }
158
159 if (cnt >= 2) {
160 __le16 val;
161 __get_user(val, (__le16 __user *) buf);
162 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
163 buf += 2;
164 pos += 2;
165 cnt -= 2;
166 }
167
168 if (cnt) {
169 unsigned char val;
170 __get_user(val, buf);
171 pci_user_write_config_byte(dev, pos, val);
172 buf++;
173 pos++;
174 cnt--;
175 }
176
177 pci_config_pm_runtime_put(dev);
178
179 *ppos = pos;
180 i_size_write(ino, dev->cfg_size);
181 return nbytes;
182}
183
184struct pci_filp_private {
185 enum pci_mmap_state mmap_state;
186 int write_combine;
187};
188
189static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
190 unsigned long arg)
191{
192 struct pci_dev *dev = PDE_DATA(file_inode(file));
193#ifdef HAVE_PCI_MMAP
194 struct pci_filp_private *fpriv = file->private_data;
195#endif /* HAVE_PCI_MMAP */
196 int ret = 0;
197
198 switch (cmd) {
199 case PCIIOC_CONTROLLER:
200 ret = pci_domain_nr(dev->bus);
201 break;
202
203#ifdef HAVE_PCI_MMAP
204 case PCIIOC_MMAP_IS_IO:
205 fpriv->mmap_state = pci_mmap_io;
206 break;
207
208 case PCIIOC_MMAP_IS_MEM:
209 fpriv->mmap_state = pci_mmap_mem;
210 break;
211
212 case PCIIOC_WRITE_COMBINE:
213 if (arg)
214 fpriv->write_combine = 1;
215 else
216 fpriv->write_combine = 0;
217 break;
218
219#endif /* HAVE_PCI_MMAP */
220
221 default:
222 ret = -EINVAL;
223 break;
224 }
225
226 return ret;
227}
228
229#ifdef HAVE_PCI_MMAP
230static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
231{
232 struct pci_dev *dev = PDE_DATA(file_inode(file));
233 struct pci_filp_private *fpriv = file->private_data;
234 int i, ret;
235
236 if (!capable(CAP_SYS_RAWIO))
237 return -EPERM;
238
239 /* Make sure the caller is mapping a real resource for this device */
240 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
241 if (pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
242 break;
243 }
244
245 if (i >= PCI_ROM_RESOURCE)
246 return -ENODEV;
247
248 ret = pci_mmap_page_range(dev, vma,
249 fpriv->mmap_state,
250 fpriv->write_combine);
251 if (ret < 0)
252 return ret;
253
254 return 0;
255}
256
257static int proc_bus_pci_open(struct inode *inode, struct file *file)
258{
259 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
260
261 if (!fpriv)
262 return -ENOMEM;
263
264 fpriv->mmap_state = pci_mmap_io;
265 fpriv->write_combine = 0;
266
267 file->private_data = fpriv;
268
269 return 0;
270}
271
272static int proc_bus_pci_release(struct inode *inode, struct file *file)
273{
274 kfree(file->private_data);
275 file->private_data = NULL;
276
277 return 0;
278}
279#endif /* HAVE_PCI_MMAP */
280
281static const struct file_operations proc_bus_pci_operations = {
282 .owner = THIS_MODULE,
283 .llseek = proc_bus_pci_lseek,
284 .read = proc_bus_pci_read,
285 .write = proc_bus_pci_write,
286 .unlocked_ioctl = proc_bus_pci_ioctl,
287 .compat_ioctl = proc_bus_pci_ioctl,
288#ifdef HAVE_PCI_MMAP
289 .open = proc_bus_pci_open,
290 .release = proc_bus_pci_release,
291 .mmap = proc_bus_pci_mmap,
292#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
293 .get_unmapped_area = get_pci_unmapped_area,
294#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
295#endif /* HAVE_PCI_MMAP */
296};
297
298/* iterator */
299static void *pci_seq_start(struct seq_file *m, loff_t *pos)
300{
301 struct pci_dev *dev = NULL;
302 loff_t n = *pos;
303
304 for_each_pci_dev(dev) {
305 if (!n--)
306 break;
307 }
308 return dev;
309}
310
311static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
312{
313 struct pci_dev *dev = v;
314
315 (*pos)++;
316 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
317 return dev;
318}
319
320static void pci_seq_stop(struct seq_file *m, void *v)
321{
322 if (v) {
323 struct pci_dev *dev = v;
324 pci_dev_put(dev);
325 }
326}
327
328static int show_device(struct seq_file *m, void *v)
329{
330 const struct pci_dev *dev = v;
331 const struct pci_driver *drv;
332 int i;
333
334 if (dev == NULL)
335 return 0;
336
337 drv = pci_dev_driver(dev);
338 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
339 dev->bus->number,
340 dev->devfn,
341 dev->vendor,
342 dev->device,
343 dev->irq);
344
345 /* only print standard and ROM resources to preserve compatibility */
346 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
347 resource_size_t start, end;
348 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
349 seq_printf(m, "\t%16llx",
350 (unsigned long long)(start |
351 (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
352 }
353 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
354 resource_size_t start, end;
355 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
356 seq_printf(m, "\t%16llx",
357 dev->resource[i].start < dev->resource[i].end ?
358 (unsigned long long)(end - start) + 1 : 0);
359 }
360 seq_putc(m, '\t');
361 if (drv)
362 seq_printf(m, "%s", drv->name);
363 seq_putc(m, '\n');
364 return 0;
365}
366
367static const struct seq_operations proc_bus_pci_devices_op = {
368 .start = pci_seq_start,
369 .next = pci_seq_next,
370 .stop = pci_seq_stop,
371 .show = show_device
372};
373
374static struct proc_dir_entry *proc_bus_pci_dir;
375
376int pci_proc_attach_device(struct pci_dev *dev)
377{
378 struct pci_bus *bus = dev->bus;
379 struct proc_dir_entry *e;
380 char name[16];
381
382 if (!proc_initialized)
383 return -EACCES;
384
385 if (!bus->procdir) {
386 if (pci_proc_domain(bus)) {
387 sprintf(name, "%04x:%02x", pci_domain_nr(bus),
388 bus->number);
389 } else {
390 sprintf(name, "%02x", bus->number);
391 }
392 bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
393 if (!bus->procdir)
394 return -ENOMEM;
395 }
396
397 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
398 e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
399 &proc_bus_pci_operations, dev);
400 if (!e)
401 return -ENOMEM;
402 proc_set_size(e, dev->cfg_size);
403 dev->procent = e;
404
405 return 0;
406}
407
408int pci_proc_detach_device(struct pci_dev *dev)
409{
410 proc_remove(dev->procent);
411 dev->procent = NULL;
412 return 0;
413}
414
415int pci_proc_detach_bus(struct pci_bus *bus)
416{
417 proc_remove(bus->procdir);
418 return 0;
419}
420
421static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
422{
423 return seq_open(file, &proc_bus_pci_devices_op);
424}
425
426static const struct file_operations proc_bus_pci_dev_operations = {
427 .owner = THIS_MODULE,
428 .open = proc_bus_pci_dev_open,
429 .read = seq_read,
430 .llseek = seq_lseek,
431 .release = seq_release,
432};
433
434static int __init pci_proc_init(void)
435{
436 struct pci_dev *dev = NULL;
437 proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
438 proc_create("devices", 0, proc_bus_pci_dir,
439 &proc_bus_pci_dev_operations);
440 proc_initialized = 1;
441 for_each_pci_dev(dev)
442 pci_proc_attach_device(dev);
443
444 return 0;
445}
446device_initcall(pci_proc_init);