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1/****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/socket.h>
12#include <linux/in.h>
13#include <linux/slab.h>
14#include <linux/ip.h>
15#include <linux/ipv6.h>
16#include <linux/tcp.h>
17#include <linux/udp.h>
18#include <linux/prefetch.h>
19#include <linux/moduleparam.h>
20#include <linux/iommu.h>
21#include <net/ip.h>
22#include <net/checksum.h>
23#include "net_driver.h"
24#include "efx.h"
25#include "filter.h"
26#include "nic.h"
27#include "selftest.h"
28#include "workarounds.h"
29
30/* Preferred number of descriptors to fill at once */
31#define EFX_RX_PREFERRED_BATCH 8U
32
33/* Number of RX buffers to recycle pages for. When creating the RX page recycle
34 * ring, this number is divided by the number of buffers per page to calculate
35 * the number of pages to store in the RX page recycle ring.
36 */
37#define EFX_RECYCLE_RING_SIZE_IOMMU 4096
38#define EFX_RECYCLE_RING_SIZE_NOIOMMU (2 * EFX_RX_PREFERRED_BATCH)
39
40/* Size of buffer allocated for skb header area. */
41#define EFX_SKB_HEADERS 128u
42
43/* This is the percentage fill level below which new RX descriptors
44 * will be added to the RX descriptor ring.
45 */
46static unsigned int rx_refill_threshold;
47
48/* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
49#define EFX_RX_MAX_FRAGS DIV_ROUND_UP(EFX_MAX_FRAME_LEN(EFX_MAX_MTU), \
50 EFX_RX_USR_BUF_SIZE)
51
52/*
53 * RX maximum head room required.
54 *
55 * This must be at least 1 to prevent overflow, plus one packet-worth
56 * to allow pipelined receives.
57 */
58#define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
59
60static inline u8 *efx_rx_buf_va(struct efx_rx_buffer *buf)
61{
62 return page_address(buf->page) + buf->page_offset;
63}
64
65static inline u32 efx_rx_buf_hash(struct efx_nic *efx, const u8 *eh)
66{
67#if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
68 return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
69#else
70 const u8 *data = eh + efx->rx_packet_hash_offset;
71 return (u32)data[0] |
72 (u32)data[1] << 8 |
73 (u32)data[2] << 16 |
74 (u32)data[3] << 24;
75#endif
76}
77
78static inline struct efx_rx_buffer *
79efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf)
80{
81 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
82 return efx_rx_buffer(rx_queue, 0);
83 else
84 return rx_buf + 1;
85}
86
87static inline void efx_sync_rx_buffer(struct efx_nic *efx,
88 struct efx_rx_buffer *rx_buf,
89 unsigned int len)
90{
91 dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
92 DMA_FROM_DEVICE);
93}
94
95void efx_rx_config_page_split(struct efx_nic *efx)
96{
97 efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
98 EFX_RX_BUF_ALIGNMENT);
99 efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
100 ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
101 efx->rx_page_buf_step);
102 efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
103 efx->rx_bufs_per_page;
104 efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
105 efx->rx_bufs_per_page);
106}
107
108/* Check the RX page recycle ring for a page that can be reused. */
109static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
110{
111 struct efx_nic *efx = rx_queue->efx;
112 struct page *page;
113 struct efx_rx_page_state *state;
114 unsigned index;
115
116 index = rx_queue->page_remove & rx_queue->page_ptr_mask;
117 page = rx_queue->page_ring[index];
118 if (page == NULL)
119 return NULL;
120
121 rx_queue->page_ring[index] = NULL;
122 /* page_remove cannot exceed page_add. */
123 if (rx_queue->page_remove != rx_queue->page_add)
124 ++rx_queue->page_remove;
125
126 /* If page_count is 1 then we hold the only reference to this page. */
127 if (page_count(page) == 1) {
128 ++rx_queue->page_recycle_count;
129 return page;
130 } else {
131 state = page_address(page);
132 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
133 PAGE_SIZE << efx->rx_buffer_order,
134 DMA_FROM_DEVICE);
135 put_page(page);
136 ++rx_queue->page_recycle_failed;
137 }
138
139 return NULL;
140}
141
142/**
143 * efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
144 *
145 * @rx_queue: Efx RX queue
146 *
147 * This allocates a batch of pages, maps them for DMA, and populates
148 * struct efx_rx_buffers for each one. Return a negative error code or
149 * 0 on success. If a single page can be used for multiple buffers,
150 * then the page will either be inserted fully, or not at all.
151 */
152static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
153{
154 struct efx_nic *efx = rx_queue->efx;
155 struct efx_rx_buffer *rx_buf;
156 struct page *page;
157 unsigned int page_offset;
158 struct efx_rx_page_state *state;
159 dma_addr_t dma_addr;
160 unsigned index, count;
161
162 count = 0;
163 do {
164 page = efx_reuse_page(rx_queue);
165 if (page == NULL) {
166 page = alloc_pages(__GFP_COMP |
167 (atomic ? GFP_ATOMIC : GFP_KERNEL),
168 efx->rx_buffer_order);
169 if (unlikely(page == NULL))
170 return -ENOMEM;
171 dma_addr =
172 dma_map_page(&efx->pci_dev->dev, page, 0,
173 PAGE_SIZE << efx->rx_buffer_order,
174 DMA_FROM_DEVICE);
175 if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
176 dma_addr))) {
177 __free_pages(page, efx->rx_buffer_order);
178 return -EIO;
179 }
180 state = page_address(page);
181 state->dma_addr = dma_addr;
182 } else {
183 state = page_address(page);
184 dma_addr = state->dma_addr;
185 }
186
187 dma_addr += sizeof(struct efx_rx_page_state);
188 page_offset = sizeof(struct efx_rx_page_state);
189
190 do {
191 index = rx_queue->added_count & rx_queue->ptr_mask;
192 rx_buf = efx_rx_buffer(rx_queue, index);
193 rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
194 rx_buf->page = page;
195 rx_buf->page_offset = page_offset + efx->rx_ip_align;
196 rx_buf->len = efx->rx_dma_len;
197 rx_buf->flags = 0;
198 ++rx_queue->added_count;
199 get_page(page);
200 dma_addr += efx->rx_page_buf_step;
201 page_offset += efx->rx_page_buf_step;
202 } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
203
204 rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
205 } while (++count < efx->rx_pages_per_batch);
206
207 return 0;
208}
209
210/* Unmap a DMA-mapped page. This function is only called for the final RX
211 * buffer in a page.
212 */
213static void efx_unmap_rx_buffer(struct efx_nic *efx,
214 struct efx_rx_buffer *rx_buf)
215{
216 struct page *page = rx_buf->page;
217
218 if (page) {
219 struct efx_rx_page_state *state = page_address(page);
220 dma_unmap_page(&efx->pci_dev->dev,
221 state->dma_addr,
222 PAGE_SIZE << efx->rx_buffer_order,
223 DMA_FROM_DEVICE);
224 }
225}
226
227static void efx_free_rx_buffers(struct efx_rx_queue *rx_queue,
228 struct efx_rx_buffer *rx_buf,
229 unsigned int num_bufs)
230{
231 do {
232 if (rx_buf->page) {
233 put_page(rx_buf->page);
234 rx_buf->page = NULL;
235 }
236 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
237 } while (--num_bufs);
238}
239
240/* Attempt to recycle the page if there is an RX recycle ring; the page can
241 * only be added if this is the final RX buffer, to prevent pages being used in
242 * the descriptor ring and appearing in the recycle ring simultaneously.
243 */
244static void efx_recycle_rx_page(struct efx_channel *channel,
245 struct efx_rx_buffer *rx_buf)
246{
247 struct page *page = rx_buf->page;
248 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
249 struct efx_nic *efx = rx_queue->efx;
250 unsigned index;
251
252 /* Only recycle the page after processing the final buffer. */
253 if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
254 return;
255
256 index = rx_queue->page_add & rx_queue->page_ptr_mask;
257 if (rx_queue->page_ring[index] == NULL) {
258 unsigned read_index = rx_queue->page_remove &
259 rx_queue->page_ptr_mask;
260
261 /* The next slot in the recycle ring is available, but
262 * increment page_remove if the read pointer currently
263 * points here.
264 */
265 if (read_index == index)
266 ++rx_queue->page_remove;
267 rx_queue->page_ring[index] = page;
268 ++rx_queue->page_add;
269 return;
270 }
271 ++rx_queue->page_recycle_full;
272 efx_unmap_rx_buffer(efx, rx_buf);
273 put_page(rx_buf->page);
274}
275
276static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
277 struct efx_rx_buffer *rx_buf)
278{
279 /* Release the page reference we hold for the buffer. */
280 if (rx_buf->page)
281 put_page(rx_buf->page);
282
283 /* If this is the last buffer in a page, unmap and free it. */
284 if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
285 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
286 efx_free_rx_buffers(rx_queue, rx_buf, 1);
287 }
288 rx_buf->page = NULL;
289}
290
291/* Recycle the pages that are used by buffers that have just been received. */
292static void efx_recycle_rx_pages(struct efx_channel *channel,
293 struct efx_rx_buffer *rx_buf,
294 unsigned int n_frags)
295{
296 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
297
298 do {
299 efx_recycle_rx_page(channel, rx_buf);
300 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
301 } while (--n_frags);
302}
303
304static void efx_discard_rx_packet(struct efx_channel *channel,
305 struct efx_rx_buffer *rx_buf,
306 unsigned int n_frags)
307{
308 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
309
310 efx_recycle_rx_pages(channel, rx_buf, n_frags);
311
312 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
313}
314
315/**
316 * efx_fast_push_rx_descriptors - push new RX descriptors quickly
317 * @rx_queue: RX descriptor queue
318 *
319 * This will aim to fill the RX descriptor queue up to
320 * @rx_queue->@max_fill. If there is insufficient atomic
321 * memory to do so, a slow fill will be scheduled.
322 *
323 * The caller must provide serialisation (none is used here). In practise,
324 * this means this function must run from the NAPI handler, or be called
325 * when NAPI is disabled.
326 */
327void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic)
328{
329 struct efx_nic *efx = rx_queue->efx;
330 unsigned int fill_level, batch_size;
331 int space, rc = 0;
332
333 if (!rx_queue->refill_enabled)
334 return;
335
336 /* Calculate current fill level, and exit if we don't need to fill */
337 fill_level = (rx_queue->added_count - rx_queue->removed_count);
338 EFX_WARN_ON_ONCE_PARANOID(fill_level > rx_queue->efx->rxq_entries);
339 if (fill_level >= rx_queue->fast_fill_trigger)
340 goto out;
341
342 /* Record minimum fill level */
343 if (unlikely(fill_level < rx_queue->min_fill)) {
344 if (fill_level)
345 rx_queue->min_fill = fill_level;
346 }
347
348 batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
349 space = rx_queue->max_fill - fill_level;
350 EFX_WARN_ON_ONCE_PARANOID(space < batch_size);
351
352 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
353 "RX queue %d fast-filling descriptor ring from"
354 " level %d to level %d\n",
355 efx_rx_queue_index(rx_queue), fill_level,
356 rx_queue->max_fill);
357
358
359 do {
360 rc = efx_init_rx_buffers(rx_queue, atomic);
361 if (unlikely(rc)) {
362 /* Ensure that we don't leave the rx queue empty */
363 if (rx_queue->added_count == rx_queue->removed_count)
364 efx_schedule_slow_fill(rx_queue);
365 goto out;
366 }
367 } while ((space -= batch_size) >= batch_size);
368
369 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
370 "RX queue %d fast-filled descriptor ring "
371 "to level %d\n", efx_rx_queue_index(rx_queue),
372 rx_queue->added_count - rx_queue->removed_count);
373
374 out:
375 if (rx_queue->notified_count != rx_queue->added_count)
376 efx_nic_notify_rx_desc(rx_queue);
377}
378
379void efx_rx_slow_fill(struct timer_list *t)
380{
381 struct efx_rx_queue *rx_queue = from_timer(rx_queue, t, slow_fill);
382
383 /* Post an event to cause NAPI to run and refill the queue */
384 efx_nic_generate_fill_event(rx_queue);
385 ++rx_queue->slow_fill_count;
386}
387
388static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
389 struct efx_rx_buffer *rx_buf,
390 int len)
391{
392 struct efx_nic *efx = rx_queue->efx;
393 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
394
395 if (likely(len <= max_len))
396 return;
397
398 /* The packet must be discarded, but this is only a fatal error
399 * if the caller indicated it was
400 */
401 rx_buf->flags |= EFX_RX_PKT_DISCARD;
402
403 if (net_ratelimit())
404 netif_err(efx, rx_err, efx->net_dev,
405 "RX queue %d overlength RX event (%#x > %#x)\n",
406 efx_rx_queue_index(rx_queue), len, max_len);
407
408 efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
409}
410
411/* Pass a received packet up through GRO. GRO can handle pages
412 * regardless of checksum state and skbs with a good checksum.
413 */
414static void
415efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
416 unsigned int n_frags, u8 *eh)
417{
418 struct napi_struct *napi = &channel->napi_str;
419 gro_result_t gro_result;
420 struct efx_nic *efx = channel->efx;
421 struct sk_buff *skb;
422
423 skb = napi_get_frags(napi);
424 if (unlikely(!skb)) {
425 struct efx_rx_queue *rx_queue;
426
427 rx_queue = efx_channel_get_rx_queue(channel);
428 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
429 return;
430 }
431
432 if (efx->net_dev->features & NETIF_F_RXHASH)
433 skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
434 PKT_HASH_TYPE_L3);
435 skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
436 CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
437 skb->csum_level = !!(rx_buf->flags & EFX_RX_PKT_CSUM_LEVEL);
438
439 for (;;) {
440 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
441 rx_buf->page, rx_buf->page_offset,
442 rx_buf->len);
443 rx_buf->page = NULL;
444 skb->len += rx_buf->len;
445 if (skb_shinfo(skb)->nr_frags == n_frags)
446 break;
447
448 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
449 }
450
451 skb->data_len = skb->len;
452 skb->truesize += n_frags * efx->rx_buffer_truesize;
453
454 skb_record_rx_queue(skb, channel->rx_queue.core_index);
455
456 gro_result = napi_gro_frags(napi);
457 if (gro_result != GRO_DROP)
458 channel->irq_mod_score += 2;
459}
460
461/* Allocate and construct an SKB around page fragments */
462static struct sk_buff *efx_rx_mk_skb(struct efx_channel *channel,
463 struct efx_rx_buffer *rx_buf,
464 unsigned int n_frags,
465 u8 *eh, int hdr_len)
466{
467 struct efx_nic *efx = channel->efx;
468 struct sk_buff *skb;
469
470 /* Allocate an SKB to store the headers */
471 skb = netdev_alloc_skb(efx->net_dev,
472 efx->rx_ip_align + efx->rx_prefix_size +
473 hdr_len);
474 if (unlikely(skb == NULL)) {
475 atomic_inc(&efx->n_rx_noskb_drops);
476 return NULL;
477 }
478
479 EFX_WARN_ON_ONCE_PARANOID(rx_buf->len < hdr_len);
480
481 memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
482 efx->rx_prefix_size + hdr_len);
483 skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
484 __skb_put(skb, hdr_len);
485
486 /* Append the remaining page(s) onto the frag list */
487 if (rx_buf->len > hdr_len) {
488 rx_buf->page_offset += hdr_len;
489 rx_buf->len -= hdr_len;
490
491 for (;;) {
492 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
493 rx_buf->page, rx_buf->page_offset,
494 rx_buf->len);
495 rx_buf->page = NULL;
496 skb->len += rx_buf->len;
497 skb->data_len += rx_buf->len;
498 if (skb_shinfo(skb)->nr_frags == n_frags)
499 break;
500
501 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
502 }
503 } else {
504 __free_pages(rx_buf->page, efx->rx_buffer_order);
505 rx_buf->page = NULL;
506 n_frags = 0;
507 }
508
509 skb->truesize += n_frags * efx->rx_buffer_truesize;
510
511 /* Move past the ethernet header */
512 skb->protocol = eth_type_trans(skb, efx->net_dev);
513
514 skb_mark_napi_id(skb, &channel->napi_str);
515
516 return skb;
517}
518
519void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
520 unsigned int n_frags, unsigned int len, u16 flags)
521{
522 struct efx_nic *efx = rx_queue->efx;
523 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
524 struct efx_rx_buffer *rx_buf;
525
526 rx_queue->rx_packets++;
527
528 rx_buf = efx_rx_buffer(rx_queue, index);
529 rx_buf->flags |= flags;
530
531 /* Validate the number of fragments and completed length */
532 if (n_frags == 1) {
533 if (!(flags & EFX_RX_PKT_PREFIX_LEN))
534 efx_rx_packet__check_len(rx_queue, rx_buf, len);
535 } else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) ||
536 unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
537 unlikely(len > n_frags * efx->rx_dma_len) ||
538 unlikely(!efx->rx_scatter)) {
539 /* If this isn't an explicit discard request, either
540 * the hardware or the driver is broken.
541 */
542 WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD));
543 rx_buf->flags |= EFX_RX_PKT_DISCARD;
544 }
545
546 netif_vdbg(efx, rx_status, efx->net_dev,
547 "RX queue %d received ids %x-%x len %d %s%s\n",
548 efx_rx_queue_index(rx_queue), index,
549 (index + n_frags - 1) & rx_queue->ptr_mask, len,
550 (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
551 (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
552
553 /* Discard packet, if instructed to do so. Process the
554 * previous receive first.
555 */
556 if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
557 efx_rx_flush_packet(channel);
558 efx_discard_rx_packet(channel, rx_buf, n_frags);
559 return;
560 }
561
562 if (n_frags == 1 && !(flags & EFX_RX_PKT_PREFIX_LEN))
563 rx_buf->len = len;
564
565 /* Release and/or sync the DMA mapping - assumes all RX buffers
566 * consumed in-order per RX queue.
567 */
568 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
569
570 /* Prefetch nice and early so data will (hopefully) be in cache by
571 * the time we look at it.
572 */
573 prefetch(efx_rx_buf_va(rx_buf));
574
575 rx_buf->page_offset += efx->rx_prefix_size;
576 rx_buf->len -= efx->rx_prefix_size;
577
578 if (n_frags > 1) {
579 /* Release/sync DMA mapping for additional fragments.
580 * Fix length for last fragment.
581 */
582 unsigned int tail_frags = n_frags - 1;
583
584 for (;;) {
585 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
586 if (--tail_frags == 0)
587 break;
588 efx_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
589 }
590 rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
591 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
592 }
593
594 /* All fragments have been DMA-synced, so recycle pages. */
595 rx_buf = efx_rx_buffer(rx_queue, index);
596 efx_recycle_rx_pages(channel, rx_buf, n_frags);
597
598 /* Pipeline receives so that we give time for packet headers to be
599 * prefetched into cache.
600 */
601 efx_rx_flush_packet(channel);
602 channel->rx_pkt_n_frags = n_frags;
603 channel->rx_pkt_index = index;
604}
605
606static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
607 struct efx_rx_buffer *rx_buf,
608 unsigned int n_frags)
609{
610 struct sk_buff *skb;
611 u16 hdr_len = min_t(u16, rx_buf->len, EFX_SKB_HEADERS);
612
613 skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
614 if (unlikely(skb == NULL)) {
615 struct efx_rx_queue *rx_queue;
616
617 rx_queue = efx_channel_get_rx_queue(channel);
618 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
619 return;
620 }
621 skb_record_rx_queue(skb, channel->rx_queue.core_index);
622
623 /* Set the SKB flags */
624 skb_checksum_none_assert(skb);
625 if (likely(rx_buf->flags & EFX_RX_PKT_CSUMMED)) {
626 skb->ip_summed = CHECKSUM_UNNECESSARY;
627 skb->csum_level = !!(rx_buf->flags & EFX_RX_PKT_CSUM_LEVEL);
628 }
629
630 efx_rx_skb_attach_timestamp(channel, skb);
631
632 if (channel->type->receive_skb)
633 if (channel->type->receive_skb(channel, skb))
634 return;
635
636 /* Pass the packet up */
637 netif_receive_skb(skb);
638}
639
640/* Handle a received packet. Second half: Touches packet payload. */
641void __efx_rx_packet(struct efx_channel *channel)
642{
643 struct efx_nic *efx = channel->efx;
644 struct efx_rx_buffer *rx_buf =
645 efx_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
646 u8 *eh = efx_rx_buf_va(rx_buf);
647
648 /* Read length from the prefix if necessary. This already
649 * excludes the length of the prefix itself.
650 */
651 if (rx_buf->flags & EFX_RX_PKT_PREFIX_LEN)
652 rx_buf->len = le16_to_cpup((__le16 *)
653 (eh + efx->rx_packet_len_offset));
654
655 /* If we're in loopback test, then pass the packet directly to the
656 * loopback layer, and free the rx_buf here
657 */
658 if (unlikely(efx->loopback_selftest)) {
659 struct efx_rx_queue *rx_queue;
660
661 efx_loopback_rx_packet(efx, eh, rx_buf->len);
662 rx_queue = efx_channel_get_rx_queue(channel);
663 efx_free_rx_buffers(rx_queue, rx_buf,
664 channel->rx_pkt_n_frags);
665 goto out;
666 }
667
668 if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
669 rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
670
671 if ((rx_buf->flags & EFX_RX_PKT_TCP) && !channel->type->receive_skb)
672 efx_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
673 else
674 efx_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
675out:
676 channel->rx_pkt_n_frags = 0;
677}
678
679int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
680{
681 struct efx_nic *efx = rx_queue->efx;
682 unsigned int entries;
683 int rc;
684
685 /* Create the smallest power-of-two aligned ring */
686 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
687 EFX_WARN_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
688 rx_queue->ptr_mask = entries - 1;
689
690 netif_dbg(efx, probe, efx->net_dev,
691 "creating RX queue %d size %#x mask %#x\n",
692 efx_rx_queue_index(rx_queue), efx->rxq_entries,
693 rx_queue->ptr_mask);
694
695 /* Allocate RX buffers */
696 rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
697 GFP_KERNEL);
698 if (!rx_queue->buffer)
699 return -ENOMEM;
700
701 rc = efx_nic_probe_rx(rx_queue);
702 if (rc) {
703 kfree(rx_queue->buffer);
704 rx_queue->buffer = NULL;
705 }
706
707 return rc;
708}
709
710static void efx_init_rx_recycle_ring(struct efx_nic *efx,
711 struct efx_rx_queue *rx_queue)
712{
713 unsigned int bufs_in_recycle_ring, page_ring_size;
714
715 /* Set the RX recycle ring size */
716#ifdef CONFIG_PPC64
717 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
718#else
719 if (iommu_present(&pci_bus_type))
720 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
721 else
722 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_NOIOMMU;
723#endif /* CONFIG_PPC64 */
724
725 page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
726 efx->rx_bufs_per_page);
727 rx_queue->page_ring = kcalloc(page_ring_size,
728 sizeof(*rx_queue->page_ring), GFP_KERNEL);
729 rx_queue->page_ptr_mask = page_ring_size - 1;
730}
731
732void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
733{
734 struct efx_nic *efx = rx_queue->efx;
735 unsigned int max_fill, trigger, max_trigger;
736
737 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
738 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
739
740 /* Initialise ptr fields */
741 rx_queue->added_count = 0;
742 rx_queue->notified_count = 0;
743 rx_queue->removed_count = 0;
744 rx_queue->min_fill = -1U;
745 efx_init_rx_recycle_ring(efx, rx_queue);
746
747 rx_queue->page_remove = 0;
748 rx_queue->page_add = rx_queue->page_ptr_mask + 1;
749 rx_queue->page_recycle_count = 0;
750 rx_queue->page_recycle_failed = 0;
751 rx_queue->page_recycle_full = 0;
752
753 /* Initialise limit fields */
754 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
755 max_trigger =
756 max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
757 if (rx_refill_threshold != 0) {
758 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
759 if (trigger > max_trigger)
760 trigger = max_trigger;
761 } else {
762 trigger = max_trigger;
763 }
764
765 rx_queue->max_fill = max_fill;
766 rx_queue->fast_fill_trigger = trigger;
767 rx_queue->refill_enabled = true;
768
769 /* Set up RX descriptor ring */
770 efx_nic_init_rx(rx_queue);
771}
772
773void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
774{
775 int i;
776 struct efx_nic *efx = rx_queue->efx;
777 struct efx_rx_buffer *rx_buf;
778
779 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
780 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
781
782 del_timer_sync(&rx_queue->slow_fill);
783
784 /* Release RX buffers from the current read ptr to the write ptr */
785 if (rx_queue->buffer) {
786 for (i = rx_queue->removed_count; i < rx_queue->added_count;
787 i++) {
788 unsigned index = i & rx_queue->ptr_mask;
789 rx_buf = efx_rx_buffer(rx_queue, index);
790 efx_fini_rx_buffer(rx_queue, rx_buf);
791 }
792 }
793
794 /* Unmap and release the pages in the recycle ring. Remove the ring. */
795 for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
796 struct page *page = rx_queue->page_ring[i];
797 struct efx_rx_page_state *state;
798
799 if (page == NULL)
800 continue;
801
802 state = page_address(page);
803 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
804 PAGE_SIZE << efx->rx_buffer_order,
805 DMA_FROM_DEVICE);
806 put_page(page);
807 }
808 kfree(rx_queue->page_ring);
809 rx_queue->page_ring = NULL;
810}
811
812void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
813{
814 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
815 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
816
817 efx_nic_remove_rx(rx_queue);
818
819 kfree(rx_queue->buffer);
820 rx_queue->buffer = NULL;
821}
822
823
824module_param(rx_refill_threshold, uint, 0444);
825MODULE_PARM_DESC(rx_refill_threshold,
826 "RX descriptor ring refill threshold (%)");
827
828#ifdef CONFIG_RFS_ACCEL
829
830static void efx_filter_rfs_work(struct work_struct *data)
831{
832 struct efx_async_filter_insertion *req = container_of(data, struct efx_async_filter_insertion,
833 work);
834 struct efx_nic *efx = netdev_priv(req->net_dev);
835 struct efx_channel *channel = efx_get_channel(efx, req->rxq_index);
836 int slot_idx = req - efx->rps_slot;
837 struct efx_arfs_rule *rule;
838 u16 arfs_id = 0;
839 int rc;
840
841 rc = efx->type->filter_insert(efx, &req->spec, true);
842 if (rc >= 0)
843 rc %= efx->type->max_rx_ip_filters;
844 if (efx->rps_hash_table) {
845 spin_lock_bh(&efx->rps_hash_lock);
846 rule = efx_rps_hash_find(efx, &req->spec);
847 /* The rule might have already gone, if someone else's request
848 * for the same spec was already worked and then expired before
849 * we got around to our work. In that case we have nothing
850 * tying us to an arfs_id, meaning that as soon as the filter
851 * is considered for expiry it will be removed.
852 */
853 if (rule) {
854 if (rc < 0)
855 rule->filter_id = EFX_ARFS_FILTER_ID_ERROR;
856 else
857 rule->filter_id = rc;
858 arfs_id = rule->arfs_id;
859 }
860 spin_unlock_bh(&efx->rps_hash_lock);
861 }
862 if (rc >= 0) {
863 /* Remember this so we can check whether to expire the filter
864 * later.
865 */
866 mutex_lock(&efx->rps_mutex);
867 channel->rps_flow_id[rc] = req->flow_id;
868 ++channel->rfs_filters_added;
869 mutex_unlock(&efx->rps_mutex);
870
871 if (req->spec.ether_type == htons(ETH_P_IP))
872 netif_info(efx, rx_status, efx->net_dev,
873 "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d id %u]\n",
874 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
875 req->spec.rem_host, ntohs(req->spec.rem_port),
876 req->spec.loc_host, ntohs(req->spec.loc_port),
877 req->rxq_index, req->flow_id, rc, arfs_id);
878 else
879 netif_info(efx, rx_status, efx->net_dev,
880 "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d id %u]\n",
881 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
882 req->spec.rem_host, ntohs(req->spec.rem_port),
883 req->spec.loc_host, ntohs(req->spec.loc_port),
884 req->rxq_index, req->flow_id, rc, arfs_id);
885 }
886
887 /* Release references */
888 clear_bit(slot_idx, &efx->rps_slot_map);
889 dev_put(req->net_dev);
890}
891
892int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
893 u16 rxq_index, u32 flow_id)
894{
895 struct efx_nic *efx = netdev_priv(net_dev);
896 struct efx_async_filter_insertion *req;
897 struct efx_arfs_rule *rule;
898 struct flow_keys fk;
899 int slot_idx;
900 bool new;
901 int rc;
902
903 /* find a free slot */
904 for (slot_idx = 0; slot_idx < EFX_RPS_MAX_IN_FLIGHT; slot_idx++)
905 if (!test_and_set_bit(slot_idx, &efx->rps_slot_map))
906 break;
907 if (slot_idx >= EFX_RPS_MAX_IN_FLIGHT)
908 return -EBUSY;
909
910 if (flow_id == RPS_FLOW_ID_INVALID) {
911 rc = -EINVAL;
912 goto out_clear;
913 }
914
915 if (!skb_flow_dissect_flow_keys(skb, &fk, 0)) {
916 rc = -EPROTONOSUPPORT;
917 goto out_clear;
918 }
919
920 if (fk.basic.n_proto != htons(ETH_P_IP) && fk.basic.n_proto != htons(ETH_P_IPV6)) {
921 rc = -EPROTONOSUPPORT;
922 goto out_clear;
923 }
924 if (fk.control.flags & FLOW_DIS_IS_FRAGMENT) {
925 rc = -EPROTONOSUPPORT;
926 goto out_clear;
927 }
928
929 req = efx->rps_slot + slot_idx;
930 efx_filter_init_rx(&req->spec, EFX_FILTER_PRI_HINT,
931 efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
932 rxq_index);
933 req->spec.match_flags =
934 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
935 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
936 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
937 req->spec.ether_type = fk.basic.n_proto;
938 req->spec.ip_proto = fk.basic.ip_proto;
939
940 if (fk.basic.n_proto == htons(ETH_P_IP)) {
941 req->spec.rem_host[0] = fk.addrs.v4addrs.src;
942 req->spec.loc_host[0] = fk.addrs.v4addrs.dst;
943 } else {
944 memcpy(req->spec.rem_host, &fk.addrs.v6addrs.src,
945 sizeof(struct in6_addr));
946 memcpy(req->spec.loc_host, &fk.addrs.v6addrs.dst,
947 sizeof(struct in6_addr));
948 }
949
950 req->spec.rem_port = fk.ports.src;
951 req->spec.loc_port = fk.ports.dst;
952
953 if (efx->rps_hash_table) {
954 /* Add it to ARFS hash table */
955 spin_lock(&efx->rps_hash_lock);
956 rule = efx_rps_hash_add(efx, &req->spec, &new);
957 if (!rule) {
958 rc = -ENOMEM;
959 goto out_unlock;
960 }
961 if (new)
962 rule->arfs_id = efx->rps_next_id++ % RPS_NO_FILTER;
963 rc = rule->arfs_id;
964 /* Skip if existing or pending filter already does the right thing */
965 if (!new && rule->rxq_index == rxq_index &&
966 rule->filter_id >= EFX_ARFS_FILTER_ID_PENDING)
967 goto out_unlock;
968 rule->rxq_index = rxq_index;
969 rule->filter_id = EFX_ARFS_FILTER_ID_PENDING;
970 spin_unlock(&efx->rps_hash_lock);
971 } else {
972 /* Without an ARFS hash table, we just use arfs_id 0 for all
973 * filters. This means if multiple flows hash to the same
974 * flow_id, all but the most recently touched will be eligible
975 * for expiry.
976 */
977 rc = 0;
978 }
979
980 /* Queue the request */
981 dev_hold(req->net_dev = net_dev);
982 INIT_WORK(&req->work, efx_filter_rfs_work);
983 req->rxq_index = rxq_index;
984 req->flow_id = flow_id;
985 schedule_work(&req->work);
986 return rc;
987out_unlock:
988 spin_unlock(&efx->rps_hash_lock);
989out_clear:
990 clear_bit(slot_idx, &efx->rps_slot_map);
991 return rc;
992}
993
994bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned int quota)
995{
996 bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
997 unsigned int channel_idx, index, size;
998 u32 flow_id;
999
1000 if (!mutex_trylock(&efx->rps_mutex))
1001 return false;
1002 expire_one = efx->type->filter_rfs_expire_one;
1003 channel_idx = efx->rps_expire_channel;
1004 index = efx->rps_expire_index;
1005 size = efx->type->max_rx_ip_filters;
1006 while (quota--) {
1007 struct efx_channel *channel = efx_get_channel(efx, channel_idx);
1008 flow_id = channel->rps_flow_id[index];
1009
1010 if (flow_id != RPS_FLOW_ID_INVALID &&
1011 expire_one(efx, flow_id, index)) {
1012 netif_info(efx, rx_status, efx->net_dev,
1013 "expired filter %d [queue %u flow %u]\n",
1014 index, channel_idx, flow_id);
1015 channel->rps_flow_id[index] = RPS_FLOW_ID_INVALID;
1016 }
1017 if (++index == size) {
1018 if (++channel_idx == efx->n_channels)
1019 channel_idx = 0;
1020 index = 0;
1021 }
1022 }
1023 efx->rps_expire_channel = channel_idx;
1024 efx->rps_expire_index = index;
1025
1026 mutex_unlock(&efx->rps_mutex);
1027 return true;
1028}
1029
1030#endif /* CONFIG_RFS_ACCEL */
1031
1032/**
1033 * efx_filter_is_mc_recipient - test whether spec is a multicast recipient
1034 * @spec: Specification to test
1035 *
1036 * Return: %true if the specification is a non-drop RX filter that
1037 * matches a local MAC address I/G bit value of 1 or matches a local
1038 * IPv4 or IPv6 address value in the respective multicast address
1039 * range. Otherwise %false.
1040 */
1041bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec)
1042{
1043 if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
1044 spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
1045 return false;
1046
1047 if (spec->match_flags &
1048 (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
1049 is_multicast_ether_addr(spec->loc_mac))
1050 return true;
1051
1052 if ((spec->match_flags &
1053 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
1054 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
1055 if (spec->ether_type == htons(ETH_P_IP) &&
1056 ipv4_is_multicast(spec->loc_host[0]))
1057 return true;
1058 if (spec->ether_type == htons(ETH_P_IPV6) &&
1059 ((const u8 *)spec->loc_host)[0] == 0xff)
1060 return true;
1061 }
1062
1063 return false;
1064}
1/****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/socket.h>
12#include <linux/in.h>
13#include <linux/slab.h>
14#include <linux/ip.h>
15#include <linux/ipv6.h>
16#include <linux/tcp.h>
17#include <linux/udp.h>
18#include <linux/prefetch.h>
19#include <linux/moduleparam.h>
20#include <linux/iommu.h>
21#include <net/ip.h>
22#include <net/checksum.h>
23#include "net_driver.h"
24#include "efx.h"
25#include "filter.h"
26#include "nic.h"
27#include "selftest.h"
28#include "workarounds.h"
29
30/* Preferred number of descriptors to fill at once */
31#define EFX_RX_PREFERRED_BATCH 8U
32
33/* Number of RX buffers to recycle pages for. When creating the RX page recycle
34 * ring, this number is divided by the number of buffers per page to calculate
35 * the number of pages to store in the RX page recycle ring.
36 */
37#define EFX_RECYCLE_RING_SIZE_IOMMU 4096
38#define EFX_RECYCLE_RING_SIZE_NOIOMMU (2 * EFX_RX_PREFERRED_BATCH)
39
40/* Size of buffer allocated for skb header area. */
41#define EFX_SKB_HEADERS 128u
42
43/* This is the percentage fill level below which new RX descriptors
44 * will be added to the RX descriptor ring.
45 */
46static unsigned int rx_refill_threshold;
47
48/* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
49#define EFX_RX_MAX_FRAGS DIV_ROUND_UP(EFX_MAX_FRAME_LEN(EFX_MAX_MTU), \
50 EFX_RX_USR_BUF_SIZE)
51
52/*
53 * RX maximum head room required.
54 *
55 * This must be at least 1 to prevent overflow, plus one packet-worth
56 * to allow pipelined receives.
57 */
58#define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
59
60static inline u8 *efx_rx_buf_va(struct efx_rx_buffer *buf)
61{
62 return page_address(buf->page) + buf->page_offset;
63}
64
65static inline u32 efx_rx_buf_hash(struct efx_nic *efx, const u8 *eh)
66{
67#if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
68 return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
69#else
70 const u8 *data = eh + efx->rx_packet_hash_offset;
71 return (u32)data[0] |
72 (u32)data[1] << 8 |
73 (u32)data[2] << 16 |
74 (u32)data[3] << 24;
75#endif
76}
77
78static inline struct efx_rx_buffer *
79efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf)
80{
81 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
82 return efx_rx_buffer(rx_queue, 0);
83 else
84 return rx_buf + 1;
85}
86
87static inline void efx_sync_rx_buffer(struct efx_nic *efx,
88 struct efx_rx_buffer *rx_buf,
89 unsigned int len)
90{
91 dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
92 DMA_FROM_DEVICE);
93}
94
95void efx_rx_config_page_split(struct efx_nic *efx)
96{
97 efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
98 EFX_RX_BUF_ALIGNMENT);
99 efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
100 ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
101 efx->rx_page_buf_step);
102 efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
103 efx->rx_bufs_per_page;
104 efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
105 efx->rx_bufs_per_page);
106}
107
108/* Check the RX page recycle ring for a page that can be reused. */
109static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
110{
111 struct efx_nic *efx = rx_queue->efx;
112 struct page *page;
113 struct efx_rx_page_state *state;
114 unsigned index;
115
116 index = rx_queue->page_remove & rx_queue->page_ptr_mask;
117 page = rx_queue->page_ring[index];
118 if (page == NULL)
119 return NULL;
120
121 rx_queue->page_ring[index] = NULL;
122 /* page_remove cannot exceed page_add. */
123 if (rx_queue->page_remove != rx_queue->page_add)
124 ++rx_queue->page_remove;
125
126 /* If page_count is 1 then we hold the only reference to this page. */
127 if (page_count(page) == 1) {
128 ++rx_queue->page_recycle_count;
129 return page;
130 } else {
131 state = page_address(page);
132 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
133 PAGE_SIZE << efx->rx_buffer_order,
134 DMA_FROM_DEVICE);
135 put_page(page);
136 ++rx_queue->page_recycle_failed;
137 }
138
139 return NULL;
140}
141
142/**
143 * efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
144 *
145 * @rx_queue: Efx RX queue
146 *
147 * This allocates a batch of pages, maps them for DMA, and populates
148 * struct efx_rx_buffers for each one. Return a negative error code or
149 * 0 on success. If a single page can be used for multiple buffers,
150 * then the page will either be inserted fully, or not at all.
151 */
152static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
153{
154 struct efx_nic *efx = rx_queue->efx;
155 struct efx_rx_buffer *rx_buf;
156 struct page *page;
157 unsigned int page_offset;
158 struct efx_rx_page_state *state;
159 dma_addr_t dma_addr;
160 unsigned index, count;
161
162 count = 0;
163 do {
164 page = efx_reuse_page(rx_queue);
165 if (page == NULL) {
166 page = alloc_pages(__GFP_COLD | __GFP_COMP |
167 (atomic ? GFP_ATOMIC : GFP_KERNEL),
168 efx->rx_buffer_order);
169 if (unlikely(page == NULL))
170 return -ENOMEM;
171 dma_addr =
172 dma_map_page(&efx->pci_dev->dev, page, 0,
173 PAGE_SIZE << efx->rx_buffer_order,
174 DMA_FROM_DEVICE);
175 if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
176 dma_addr))) {
177 __free_pages(page, efx->rx_buffer_order);
178 return -EIO;
179 }
180 state = page_address(page);
181 state->dma_addr = dma_addr;
182 } else {
183 state = page_address(page);
184 dma_addr = state->dma_addr;
185 }
186
187 dma_addr += sizeof(struct efx_rx_page_state);
188 page_offset = sizeof(struct efx_rx_page_state);
189
190 do {
191 index = rx_queue->added_count & rx_queue->ptr_mask;
192 rx_buf = efx_rx_buffer(rx_queue, index);
193 rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
194 rx_buf->page = page;
195 rx_buf->page_offset = page_offset + efx->rx_ip_align;
196 rx_buf->len = efx->rx_dma_len;
197 rx_buf->flags = 0;
198 ++rx_queue->added_count;
199 get_page(page);
200 dma_addr += efx->rx_page_buf_step;
201 page_offset += efx->rx_page_buf_step;
202 } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
203
204 rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
205 } while (++count < efx->rx_pages_per_batch);
206
207 return 0;
208}
209
210/* Unmap a DMA-mapped page. This function is only called for the final RX
211 * buffer in a page.
212 */
213static void efx_unmap_rx_buffer(struct efx_nic *efx,
214 struct efx_rx_buffer *rx_buf)
215{
216 struct page *page = rx_buf->page;
217
218 if (page) {
219 struct efx_rx_page_state *state = page_address(page);
220 dma_unmap_page(&efx->pci_dev->dev,
221 state->dma_addr,
222 PAGE_SIZE << efx->rx_buffer_order,
223 DMA_FROM_DEVICE);
224 }
225}
226
227static void efx_free_rx_buffers(struct efx_rx_queue *rx_queue,
228 struct efx_rx_buffer *rx_buf,
229 unsigned int num_bufs)
230{
231 do {
232 if (rx_buf->page) {
233 put_page(rx_buf->page);
234 rx_buf->page = NULL;
235 }
236 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
237 } while (--num_bufs);
238}
239
240/* Attempt to recycle the page if there is an RX recycle ring; the page can
241 * only be added if this is the final RX buffer, to prevent pages being used in
242 * the descriptor ring and appearing in the recycle ring simultaneously.
243 */
244static void efx_recycle_rx_page(struct efx_channel *channel,
245 struct efx_rx_buffer *rx_buf)
246{
247 struct page *page = rx_buf->page;
248 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
249 struct efx_nic *efx = rx_queue->efx;
250 unsigned index;
251
252 /* Only recycle the page after processing the final buffer. */
253 if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
254 return;
255
256 index = rx_queue->page_add & rx_queue->page_ptr_mask;
257 if (rx_queue->page_ring[index] == NULL) {
258 unsigned read_index = rx_queue->page_remove &
259 rx_queue->page_ptr_mask;
260
261 /* The next slot in the recycle ring is available, but
262 * increment page_remove if the read pointer currently
263 * points here.
264 */
265 if (read_index == index)
266 ++rx_queue->page_remove;
267 rx_queue->page_ring[index] = page;
268 ++rx_queue->page_add;
269 return;
270 }
271 ++rx_queue->page_recycle_full;
272 efx_unmap_rx_buffer(efx, rx_buf);
273 put_page(rx_buf->page);
274}
275
276static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
277 struct efx_rx_buffer *rx_buf)
278{
279 /* Release the page reference we hold for the buffer. */
280 if (rx_buf->page)
281 put_page(rx_buf->page);
282
283 /* If this is the last buffer in a page, unmap and free it. */
284 if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
285 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
286 efx_free_rx_buffers(rx_queue, rx_buf, 1);
287 }
288 rx_buf->page = NULL;
289}
290
291/* Recycle the pages that are used by buffers that have just been received. */
292static void efx_recycle_rx_pages(struct efx_channel *channel,
293 struct efx_rx_buffer *rx_buf,
294 unsigned int n_frags)
295{
296 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
297
298 do {
299 efx_recycle_rx_page(channel, rx_buf);
300 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
301 } while (--n_frags);
302}
303
304static void efx_discard_rx_packet(struct efx_channel *channel,
305 struct efx_rx_buffer *rx_buf,
306 unsigned int n_frags)
307{
308 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
309
310 efx_recycle_rx_pages(channel, rx_buf, n_frags);
311
312 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
313}
314
315/**
316 * efx_fast_push_rx_descriptors - push new RX descriptors quickly
317 * @rx_queue: RX descriptor queue
318 *
319 * This will aim to fill the RX descriptor queue up to
320 * @rx_queue->@max_fill. If there is insufficient atomic
321 * memory to do so, a slow fill will be scheduled.
322 *
323 * The caller must provide serialisation (none is used here). In practise,
324 * this means this function must run from the NAPI handler, or be called
325 * when NAPI is disabled.
326 */
327void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic)
328{
329 struct efx_nic *efx = rx_queue->efx;
330 unsigned int fill_level, batch_size;
331 int space, rc = 0;
332
333 if (!rx_queue->refill_enabled)
334 return;
335
336 /* Calculate current fill level, and exit if we don't need to fill */
337 fill_level = (rx_queue->added_count - rx_queue->removed_count);
338 EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
339 if (fill_level >= rx_queue->fast_fill_trigger)
340 goto out;
341
342 /* Record minimum fill level */
343 if (unlikely(fill_level < rx_queue->min_fill)) {
344 if (fill_level)
345 rx_queue->min_fill = fill_level;
346 }
347
348 batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
349 space = rx_queue->max_fill - fill_level;
350 EFX_BUG_ON_PARANOID(space < batch_size);
351
352 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
353 "RX queue %d fast-filling descriptor ring from"
354 " level %d to level %d\n",
355 efx_rx_queue_index(rx_queue), fill_level,
356 rx_queue->max_fill);
357
358
359 do {
360 rc = efx_init_rx_buffers(rx_queue, atomic);
361 if (unlikely(rc)) {
362 /* Ensure that we don't leave the rx queue empty */
363 if (rx_queue->added_count == rx_queue->removed_count)
364 efx_schedule_slow_fill(rx_queue);
365 goto out;
366 }
367 } while ((space -= batch_size) >= batch_size);
368
369 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
370 "RX queue %d fast-filled descriptor ring "
371 "to level %d\n", efx_rx_queue_index(rx_queue),
372 rx_queue->added_count - rx_queue->removed_count);
373
374 out:
375 if (rx_queue->notified_count != rx_queue->added_count)
376 efx_nic_notify_rx_desc(rx_queue);
377}
378
379void efx_rx_slow_fill(unsigned long context)
380{
381 struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
382
383 /* Post an event to cause NAPI to run and refill the queue */
384 efx_nic_generate_fill_event(rx_queue);
385 ++rx_queue->slow_fill_count;
386}
387
388static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
389 struct efx_rx_buffer *rx_buf,
390 int len)
391{
392 struct efx_nic *efx = rx_queue->efx;
393 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
394
395 if (likely(len <= max_len))
396 return;
397
398 /* The packet must be discarded, but this is only a fatal error
399 * if the caller indicated it was
400 */
401 rx_buf->flags |= EFX_RX_PKT_DISCARD;
402
403 if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
404 if (net_ratelimit())
405 netif_err(efx, rx_err, efx->net_dev,
406 " RX queue %d seriously overlength "
407 "RX event (0x%x > 0x%x+0x%x). Leaking\n",
408 efx_rx_queue_index(rx_queue), len, max_len,
409 efx->type->rx_buffer_padding);
410 efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
411 } else {
412 if (net_ratelimit())
413 netif_err(efx, rx_err, efx->net_dev,
414 " RX queue %d overlength RX event "
415 "(0x%x > 0x%x)\n",
416 efx_rx_queue_index(rx_queue), len, max_len);
417 }
418
419 efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
420}
421
422/* Pass a received packet up through GRO. GRO can handle pages
423 * regardless of checksum state and skbs with a good checksum.
424 */
425static void
426efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
427 unsigned int n_frags, u8 *eh)
428{
429 struct napi_struct *napi = &channel->napi_str;
430 gro_result_t gro_result;
431 struct efx_nic *efx = channel->efx;
432 struct sk_buff *skb;
433
434 skb = napi_get_frags(napi);
435 if (unlikely(!skb)) {
436 struct efx_rx_queue *rx_queue;
437
438 rx_queue = efx_channel_get_rx_queue(channel);
439 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
440 return;
441 }
442
443 if (efx->net_dev->features & NETIF_F_RXHASH)
444 skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
445 PKT_HASH_TYPE_L3);
446 skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
447 CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
448
449 for (;;) {
450 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
451 rx_buf->page, rx_buf->page_offset,
452 rx_buf->len);
453 rx_buf->page = NULL;
454 skb->len += rx_buf->len;
455 if (skb_shinfo(skb)->nr_frags == n_frags)
456 break;
457
458 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
459 }
460
461 skb->data_len = skb->len;
462 skb->truesize += n_frags * efx->rx_buffer_truesize;
463
464 skb_record_rx_queue(skb, channel->rx_queue.core_index);
465
466 gro_result = napi_gro_frags(napi);
467 if (gro_result != GRO_DROP)
468 channel->irq_mod_score += 2;
469}
470
471/* Allocate and construct an SKB around page fragments */
472static struct sk_buff *efx_rx_mk_skb(struct efx_channel *channel,
473 struct efx_rx_buffer *rx_buf,
474 unsigned int n_frags,
475 u8 *eh, int hdr_len)
476{
477 struct efx_nic *efx = channel->efx;
478 struct sk_buff *skb;
479
480 /* Allocate an SKB to store the headers */
481 skb = netdev_alloc_skb(efx->net_dev,
482 efx->rx_ip_align + efx->rx_prefix_size +
483 hdr_len);
484 if (unlikely(skb == NULL)) {
485 atomic_inc(&efx->n_rx_noskb_drops);
486 return NULL;
487 }
488
489 EFX_BUG_ON_PARANOID(rx_buf->len < hdr_len);
490
491 memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
492 efx->rx_prefix_size + hdr_len);
493 skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
494 __skb_put(skb, hdr_len);
495
496 /* Append the remaining page(s) onto the frag list */
497 if (rx_buf->len > hdr_len) {
498 rx_buf->page_offset += hdr_len;
499 rx_buf->len -= hdr_len;
500
501 for (;;) {
502 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
503 rx_buf->page, rx_buf->page_offset,
504 rx_buf->len);
505 rx_buf->page = NULL;
506 skb->len += rx_buf->len;
507 skb->data_len += rx_buf->len;
508 if (skb_shinfo(skb)->nr_frags == n_frags)
509 break;
510
511 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
512 }
513 } else {
514 __free_pages(rx_buf->page, efx->rx_buffer_order);
515 rx_buf->page = NULL;
516 n_frags = 0;
517 }
518
519 skb->truesize += n_frags * efx->rx_buffer_truesize;
520
521 /* Move past the ethernet header */
522 skb->protocol = eth_type_trans(skb, efx->net_dev);
523
524 skb_mark_napi_id(skb, &channel->napi_str);
525
526 return skb;
527}
528
529void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
530 unsigned int n_frags, unsigned int len, u16 flags)
531{
532 struct efx_nic *efx = rx_queue->efx;
533 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
534 struct efx_rx_buffer *rx_buf;
535
536 rx_queue->rx_packets++;
537
538 rx_buf = efx_rx_buffer(rx_queue, index);
539 rx_buf->flags |= flags;
540
541 /* Validate the number of fragments and completed length */
542 if (n_frags == 1) {
543 if (!(flags & EFX_RX_PKT_PREFIX_LEN))
544 efx_rx_packet__check_len(rx_queue, rx_buf, len);
545 } else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) ||
546 unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
547 unlikely(len > n_frags * efx->rx_dma_len) ||
548 unlikely(!efx->rx_scatter)) {
549 /* If this isn't an explicit discard request, either
550 * the hardware or the driver is broken.
551 */
552 WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD));
553 rx_buf->flags |= EFX_RX_PKT_DISCARD;
554 }
555
556 netif_vdbg(efx, rx_status, efx->net_dev,
557 "RX queue %d received ids %x-%x len %d %s%s\n",
558 efx_rx_queue_index(rx_queue), index,
559 (index + n_frags - 1) & rx_queue->ptr_mask, len,
560 (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
561 (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
562
563 /* Discard packet, if instructed to do so. Process the
564 * previous receive first.
565 */
566 if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
567 efx_rx_flush_packet(channel);
568 efx_discard_rx_packet(channel, rx_buf, n_frags);
569 return;
570 }
571
572 if (n_frags == 1 && !(flags & EFX_RX_PKT_PREFIX_LEN))
573 rx_buf->len = len;
574
575 /* Release and/or sync the DMA mapping - assumes all RX buffers
576 * consumed in-order per RX queue.
577 */
578 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
579
580 /* Prefetch nice and early so data will (hopefully) be in cache by
581 * the time we look at it.
582 */
583 prefetch(efx_rx_buf_va(rx_buf));
584
585 rx_buf->page_offset += efx->rx_prefix_size;
586 rx_buf->len -= efx->rx_prefix_size;
587
588 if (n_frags > 1) {
589 /* Release/sync DMA mapping for additional fragments.
590 * Fix length for last fragment.
591 */
592 unsigned int tail_frags = n_frags - 1;
593
594 for (;;) {
595 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
596 if (--tail_frags == 0)
597 break;
598 efx_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
599 }
600 rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
601 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
602 }
603
604 /* All fragments have been DMA-synced, so recycle pages. */
605 rx_buf = efx_rx_buffer(rx_queue, index);
606 efx_recycle_rx_pages(channel, rx_buf, n_frags);
607
608 /* Pipeline receives so that we give time for packet headers to be
609 * prefetched into cache.
610 */
611 efx_rx_flush_packet(channel);
612 channel->rx_pkt_n_frags = n_frags;
613 channel->rx_pkt_index = index;
614}
615
616static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
617 struct efx_rx_buffer *rx_buf,
618 unsigned int n_frags)
619{
620 struct sk_buff *skb;
621 u16 hdr_len = min_t(u16, rx_buf->len, EFX_SKB_HEADERS);
622
623 skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
624 if (unlikely(skb == NULL)) {
625 struct efx_rx_queue *rx_queue;
626
627 rx_queue = efx_channel_get_rx_queue(channel);
628 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
629 return;
630 }
631 skb_record_rx_queue(skb, channel->rx_queue.core_index);
632
633 /* Set the SKB flags */
634 skb_checksum_none_assert(skb);
635 if (likely(rx_buf->flags & EFX_RX_PKT_CSUMMED))
636 skb->ip_summed = CHECKSUM_UNNECESSARY;
637
638 efx_rx_skb_attach_timestamp(channel, skb);
639
640 if (channel->type->receive_skb)
641 if (channel->type->receive_skb(channel, skb))
642 return;
643
644 /* Pass the packet up */
645 netif_receive_skb(skb);
646}
647
648/* Handle a received packet. Second half: Touches packet payload. */
649void __efx_rx_packet(struct efx_channel *channel)
650{
651 struct efx_nic *efx = channel->efx;
652 struct efx_rx_buffer *rx_buf =
653 efx_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
654 u8 *eh = efx_rx_buf_va(rx_buf);
655
656 /* Read length from the prefix if necessary. This already
657 * excludes the length of the prefix itself.
658 */
659 if (rx_buf->flags & EFX_RX_PKT_PREFIX_LEN)
660 rx_buf->len = le16_to_cpup((__le16 *)
661 (eh + efx->rx_packet_len_offset));
662
663 /* If we're in loopback test, then pass the packet directly to the
664 * loopback layer, and free the rx_buf here
665 */
666 if (unlikely(efx->loopback_selftest)) {
667 struct efx_rx_queue *rx_queue;
668
669 efx_loopback_rx_packet(efx, eh, rx_buf->len);
670 rx_queue = efx_channel_get_rx_queue(channel);
671 efx_free_rx_buffers(rx_queue, rx_buf,
672 channel->rx_pkt_n_frags);
673 goto out;
674 }
675
676 if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
677 rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
678
679 if ((rx_buf->flags & EFX_RX_PKT_TCP) && !channel->type->receive_skb &&
680 !efx_channel_busy_polling(channel))
681 efx_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
682 else
683 efx_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
684out:
685 channel->rx_pkt_n_frags = 0;
686}
687
688int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
689{
690 struct efx_nic *efx = rx_queue->efx;
691 unsigned int entries;
692 int rc;
693
694 /* Create the smallest power-of-two aligned ring */
695 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
696 EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
697 rx_queue->ptr_mask = entries - 1;
698
699 netif_dbg(efx, probe, efx->net_dev,
700 "creating RX queue %d size %#x mask %#x\n",
701 efx_rx_queue_index(rx_queue), efx->rxq_entries,
702 rx_queue->ptr_mask);
703
704 /* Allocate RX buffers */
705 rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
706 GFP_KERNEL);
707 if (!rx_queue->buffer)
708 return -ENOMEM;
709
710 rc = efx_nic_probe_rx(rx_queue);
711 if (rc) {
712 kfree(rx_queue->buffer);
713 rx_queue->buffer = NULL;
714 }
715
716 return rc;
717}
718
719static void efx_init_rx_recycle_ring(struct efx_nic *efx,
720 struct efx_rx_queue *rx_queue)
721{
722 unsigned int bufs_in_recycle_ring, page_ring_size;
723
724 /* Set the RX recycle ring size */
725#ifdef CONFIG_PPC64
726 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
727#else
728 if (iommu_present(&pci_bus_type))
729 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
730 else
731 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_NOIOMMU;
732#endif /* CONFIG_PPC64 */
733
734 page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
735 efx->rx_bufs_per_page);
736 rx_queue->page_ring = kcalloc(page_ring_size,
737 sizeof(*rx_queue->page_ring), GFP_KERNEL);
738 rx_queue->page_ptr_mask = page_ring_size - 1;
739}
740
741void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
742{
743 struct efx_nic *efx = rx_queue->efx;
744 unsigned int max_fill, trigger, max_trigger;
745
746 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
747 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
748
749 /* Initialise ptr fields */
750 rx_queue->added_count = 0;
751 rx_queue->notified_count = 0;
752 rx_queue->removed_count = 0;
753 rx_queue->min_fill = -1U;
754 efx_init_rx_recycle_ring(efx, rx_queue);
755
756 rx_queue->page_remove = 0;
757 rx_queue->page_add = rx_queue->page_ptr_mask + 1;
758 rx_queue->page_recycle_count = 0;
759 rx_queue->page_recycle_failed = 0;
760 rx_queue->page_recycle_full = 0;
761
762 /* Initialise limit fields */
763 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
764 max_trigger =
765 max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
766 if (rx_refill_threshold != 0) {
767 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
768 if (trigger > max_trigger)
769 trigger = max_trigger;
770 } else {
771 trigger = max_trigger;
772 }
773
774 rx_queue->max_fill = max_fill;
775 rx_queue->fast_fill_trigger = trigger;
776 rx_queue->refill_enabled = true;
777
778 /* Set up RX descriptor ring */
779 efx_nic_init_rx(rx_queue);
780}
781
782void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
783{
784 int i;
785 struct efx_nic *efx = rx_queue->efx;
786 struct efx_rx_buffer *rx_buf;
787
788 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
789 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
790
791 del_timer_sync(&rx_queue->slow_fill);
792
793 /* Release RX buffers from the current read ptr to the write ptr */
794 if (rx_queue->buffer) {
795 for (i = rx_queue->removed_count; i < rx_queue->added_count;
796 i++) {
797 unsigned index = i & rx_queue->ptr_mask;
798 rx_buf = efx_rx_buffer(rx_queue, index);
799 efx_fini_rx_buffer(rx_queue, rx_buf);
800 }
801 }
802
803 /* Unmap and release the pages in the recycle ring. Remove the ring. */
804 for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
805 struct page *page = rx_queue->page_ring[i];
806 struct efx_rx_page_state *state;
807
808 if (page == NULL)
809 continue;
810
811 state = page_address(page);
812 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
813 PAGE_SIZE << efx->rx_buffer_order,
814 DMA_FROM_DEVICE);
815 put_page(page);
816 }
817 kfree(rx_queue->page_ring);
818 rx_queue->page_ring = NULL;
819}
820
821void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
822{
823 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
824 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
825
826 efx_nic_remove_rx(rx_queue);
827
828 kfree(rx_queue->buffer);
829 rx_queue->buffer = NULL;
830}
831
832
833module_param(rx_refill_threshold, uint, 0444);
834MODULE_PARM_DESC(rx_refill_threshold,
835 "RX descriptor ring refill threshold (%)");
836
837#ifdef CONFIG_RFS_ACCEL
838
839int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
840 u16 rxq_index, u32 flow_id)
841{
842 struct efx_nic *efx = netdev_priv(net_dev);
843 struct efx_channel *channel;
844 struct efx_filter_spec spec;
845 const __be16 *ports;
846 __be16 ether_type;
847 int nhoff;
848 int rc;
849
850 /* The core RPS/RFS code has already parsed and validated
851 * VLAN, IP and transport headers. We assume they are in the
852 * header area.
853 */
854
855 if (skb->protocol == htons(ETH_P_8021Q)) {
856 const struct vlan_hdr *vh =
857 (const struct vlan_hdr *)skb->data;
858
859 /* We can't filter on the IP 5-tuple and the vlan
860 * together, so just strip the vlan header and filter
861 * on the IP part.
862 */
863 EFX_BUG_ON_PARANOID(skb_headlen(skb) < sizeof(*vh));
864 ether_type = vh->h_vlan_encapsulated_proto;
865 nhoff = sizeof(struct vlan_hdr);
866 } else {
867 ether_type = skb->protocol;
868 nhoff = 0;
869 }
870
871 if (ether_type != htons(ETH_P_IP) && ether_type != htons(ETH_P_IPV6))
872 return -EPROTONOSUPPORT;
873
874 efx_filter_init_rx(&spec, EFX_FILTER_PRI_HINT,
875 efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
876 rxq_index);
877 spec.match_flags =
878 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
879 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
880 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
881 spec.ether_type = ether_type;
882
883 if (ether_type == htons(ETH_P_IP)) {
884 const struct iphdr *ip =
885 (const struct iphdr *)(skb->data + nhoff);
886
887 EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + sizeof(*ip));
888 if (ip_is_fragment(ip))
889 return -EPROTONOSUPPORT;
890 spec.ip_proto = ip->protocol;
891 spec.rem_host[0] = ip->saddr;
892 spec.loc_host[0] = ip->daddr;
893 EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + 4 * ip->ihl + 4);
894 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
895 } else {
896 const struct ipv6hdr *ip6 =
897 (const struct ipv6hdr *)(skb->data + nhoff);
898
899 EFX_BUG_ON_PARANOID(skb_headlen(skb) <
900 nhoff + sizeof(*ip6) + 4);
901 spec.ip_proto = ip6->nexthdr;
902 memcpy(spec.rem_host, &ip6->saddr, sizeof(ip6->saddr));
903 memcpy(spec.loc_host, &ip6->daddr, sizeof(ip6->daddr));
904 ports = (const __be16 *)(ip6 + 1);
905 }
906
907 spec.rem_port = ports[0];
908 spec.loc_port = ports[1];
909
910 rc = efx->type->filter_rfs_insert(efx, &spec);
911 if (rc < 0)
912 return rc;
913
914 /* Remember this so we can check whether to expire the filter later */
915 efx->rps_flow_id[rc] = flow_id;
916 channel = efx_get_channel(efx, skb_get_rx_queue(skb));
917 ++channel->rfs_filters_added;
918
919 if (ether_type == htons(ETH_P_IP))
920 netif_info(efx, rx_status, efx->net_dev,
921 "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d]\n",
922 (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
923 spec.rem_host, ntohs(ports[0]), spec.loc_host,
924 ntohs(ports[1]), rxq_index, flow_id, rc);
925 else
926 netif_info(efx, rx_status, efx->net_dev,
927 "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d]\n",
928 (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
929 spec.rem_host, ntohs(ports[0]), spec.loc_host,
930 ntohs(ports[1]), rxq_index, flow_id, rc);
931
932 return rc;
933}
934
935bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned int quota)
936{
937 bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
938 unsigned int index, size;
939 u32 flow_id;
940
941 if (!spin_trylock_bh(&efx->filter_lock))
942 return false;
943
944 expire_one = efx->type->filter_rfs_expire_one;
945 index = efx->rps_expire_index;
946 size = efx->type->max_rx_ip_filters;
947 while (quota--) {
948 flow_id = efx->rps_flow_id[index];
949 if (expire_one(efx, flow_id, index))
950 netif_info(efx, rx_status, efx->net_dev,
951 "expired filter %d [flow %u]\n",
952 index, flow_id);
953 if (++index == size)
954 index = 0;
955 }
956 efx->rps_expire_index = index;
957
958 spin_unlock_bh(&efx->filter_lock);
959 return true;
960}
961
962#endif /* CONFIG_RFS_ACCEL */
963
964/**
965 * efx_filter_is_mc_recipient - test whether spec is a multicast recipient
966 * @spec: Specification to test
967 *
968 * Return: %true if the specification is a non-drop RX filter that
969 * matches a local MAC address I/G bit value of 1 or matches a local
970 * IPv4 or IPv6 address value in the respective multicast address
971 * range. Otherwise %false.
972 */
973bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec)
974{
975 if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
976 spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
977 return false;
978
979 if (spec->match_flags &
980 (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
981 is_multicast_ether_addr(spec->loc_mac))
982 return true;
983
984 if ((spec->match_flags &
985 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
986 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
987 if (spec->ether_type == htons(ETH_P_IP) &&
988 ipv4_is_multicast(spec->loc_host[0]))
989 return true;
990 if (spec->ether_type == htons(ETH_P_IPV6) &&
991 ((const u8 *)spec->loc_host)[0] == 0xff)
992 return true;
993 }
994
995 return false;
996}