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1/*
2 * Driver for 93xx46 EEPROMs
3 *
4 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/device.h>
13#include <linux/gpio/consumer.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/of_gpio.h>
20#include <linux/slab.h>
21#include <linux/spi/spi.h>
22#include <linux/nvmem-provider.h>
23#include <linux/eeprom_93xx46.h>
24
25#define OP_START 0x4
26#define OP_WRITE (OP_START | 0x1)
27#define OP_READ (OP_START | 0x2)
28#define ADDR_EWDS 0x00
29#define ADDR_ERAL 0x20
30#define ADDR_EWEN 0x30
31
32struct eeprom_93xx46_devtype_data {
33 unsigned int quirks;
34};
35
36static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
37 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
38 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
39};
40
41struct eeprom_93xx46_dev {
42 struct spi_device *spi;
43 struct eeprom_93xx46_platform_data *pdata;
44 struct mutex lock;
45 struct nvmem_config nvmem_config;
46 struct nvmem_device *nvmem;
47 int addrlen;
48 int size;
49};
50
51static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
52{
53 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
54}
55
56static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
57{
58 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
59}
60
61static int eeprom_93xx46_read(void *priv, unsigned int off,
62 void *val, size_t count)
63{
64 struct eeprom_93xx46_dev *edev = priv;
65 char *buf = val;
66 int err = 0;
67
68 if (unlikely(off >= edev->size))
69 return 0;
70 if ((off + count) > edev->size)
71 count = edev->size - off;
72 if (unlikely(!count))
73 return count;
74
75 mutex_lock(&edev->lock);
76
77 if (edev->pdata->prepare)
78 edev->pdata->prepare(edev);
79
80 while (count) {
81 struct spi_message m;
82 struct spi_transfer t[2] = { { 0 } };
83 u16 cmd_addr = OP_READ << edev->addrlen;
84 size_t nbytes = count;
85 int bits;
86
87 if (edev->addrlen == 7) {
88 cmd_addr |= off & 0x7f;
89 bits = 10;
90 if (has_quirk_single_word_read(edev))
91 nbytes = 1;
92 } else {
93 cmd_addr |= (off >> 1) & 0x3f;
94 bits = 9;
95 if (has_quirk_single_word_read(edev))
96 nbytes = 2;
97 }
98
99 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
100 cmd_addr, edev->spi->max_speed_hz);
101
102 spi_message_init(&m);
103
104 t[0].tx_buf = (char *)&cmd_addr;
105 t[0].len = 2;
106 t[0].bits_per_word = bits;
107 spi_message_add_tail(&t[0], &m);
108
109 t[1].rx_buf = buf;
110 t[1].len = count;
111 t[1].bits_per_word = 8;
112 spi_message_add_tail(&t[1], &m);
113
114 err = spi_sync(edev->spi, &m);
115 /* have to wait at least Tcsl ns */
116 ndelay(250);
117
118 if (err) {
119 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
120 nbytes, (int)off, err);
121 break;
122 }
123
124 buf += nbytes;
125 off += nbytes;
126 count -= nbytes;
127 }
128
129 if (edev->pdata->finish)
130 edev->pdata->finish(edev);
131
132 mutex_unlock(&edev->lock);
133
134 return err;
135}
136
137static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
138{
139 struct spi_message m;
140 struct spi_transfer t;
141 int bits, ret;
142 u16 cmd_addr;
143
144 cmd_addr = OP_START << edev->addrlen;
145 if (edev->addrlen == 7) {
146 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
147 bits = 10;
148 } else {
149 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
150 bits = 9;
151 }
152
153 if (has_quirk_instruction_length(edev)) {
154 cmd_addr <<= 2;
155 bits += 2;
156 }
157
158 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
159 is_on ? "en" : "ds", cmd_addr, bits);
160
161 spi_message_init(&m);
162 memset(&t, 0, sizeof(t));
163
164 t.tx_buf = &cmd_addr;
165 t.len = 2;
166 t.bits_per_word = bits;
167 spi_message_add_tail(&t, &m);
168
169 mutex_lock(&edev->lock);
170
171 if (edev->pdata->prepare)
172 edev->pdata->prepare(edev);
173
174 ret = spi_sync(edev->spi, &m);
175 /* have to wait at least Tcsl ns */
176 ndelay(250);
177 if (ret)
178 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
179 is_on ? "en" : "dis", ret);
180
181 if (edev->pdata->finish)
182 edev->pdata->finish(edev);
183
184 mutex_unlock(&edev->lock);
185 return ret;
186}
187
188static ssize_t
189eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
190 const char *buf, unsigned off)
191{
192 struct spi_message m;
193 struct spi_transfer t[2];
194 int bits, data_len, ret;
195 u16 cmd_addr;
196
197 cmd_addr = OP_WRITE << edev->addrlen;
198
199 if (edev->addrlen == 7) {
200 cmd_addr |= off & 0x7f;
201 bits = 10;
202 data_len = 1;
203 } else {
204 cmd_addr |= (off >> 1) & 0x3f;
205 bits = 9;
206 data_len = 2;
207 }
208
209 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
210
211 spi_message_init(&m);
212 memset(t, 0, sizeof(t));
213
214 t[0].tx_buf = (char *)&cmd_addr;
215 t[0].len = 2;
216 t[0].bits_per_word = bits;
217 spi_message_add_tail(&t[0], &m);
218
219 t[1].tx_buf = buf;
220 t[1].len = data_len;
221 t[1].bits_per_word = 8;
222 spi_message_add_tail(&t[1], &m);
223
224 ret = spi_sync(edev->spi, &m);
225 /* have to wait program cycle time Twc ms */
226 mdelay(6);
227 return ret;
228}
229
230static int eeprom_93xx46_write(void *priv, unsigned int off,
231 void *val, size_t count)
232{
233 struct eeprom_93xx46_dev *edev = priv;
234 char *buf = val;
235 int i, ret, step = 1;
236
237 if (unlikely(off >= edev->size))
238 return -EFBIG;
239 if ((off + count) > edev->size)
240 count = edev->size - off;
241 if (unlikely(!count))
242 return count;
243
244 /* only write even number of bytes on 16-bit devices */
245 if (edev->addrlen == 6) {
246 step = 2;
247 count &= ~1;
248 }
249
250 /* erase/write enable */
251 ret = eeprom_93xx46_ew(edev, 1);
252 if (ret)
253 return ret;
254
255 mutex_lock(&edev->lock);
256
257 if (edev->pdata->prepare)
258 edev->pdata->prepare(edev);
259
260 for (i = 0; i < count; i += step) {
261 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
262 if (ret) {
263 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
264 (int)off + i, ret);
265 break;
266 }
267 }
268
269 if (edev->pdata->finish)
270 edev->pdata->finish(edev);
271
272 mutex_unlock(&edev->lock);
273
274 /* erase/write disable */
275 eeprom_93xx46_ew(edev, 0);
276 return ret;
277}
278
279static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
280{
281 struct eeprom_93xx46_platform_data *pd = edev->pdata;
282 struct spi_message m;
283 struct spi_transfer t;
284 int bits, ret;
285 u16 cmd_addr;
286
287 cmd_addr = OP_START << edev->addrlen;
288 if (edev->addrlen == 7) {
289 cmd_addr |= ADDR_ERAL << 1;
290 bits = 10;
291 } else {
292 cmd_addr |= ADDR_ERAL;
293 bits = 9;
294 }
295
296 if (has_quirk_instruction_length(edev)) {
297 cmd_addr <<= 2;
298 bits += 2;
299 }
300
301 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
302
303 spi_message_init(&m);
304 memset(&t, 0, sizeof(t));
305
306 t.tx_buf = &cmd_addr;
307 t.len = 2;
308 t.bits_per_word = bits;
309 spi_message_add_tail(&t, &m);
310
311 mutex_lock(&edev->lock);
312
313 if (edev->pdata->prepare)
314 edev->pdata->prepare(edev);
315
316 ret = spi_sync(edev->spi, &m);
317 if (ret)
318 dev_err(&edev->spi->dev, "erase error %d\n", ret);
319 /* have to wait erase cycle time Tec ms */
320 mdelay(6);
321
322 if (pd->finish)
323 pd->finish(edev);
324
325 mutex_unlock(&edev->lock);
326 return ret;
327}
328
329static ssize_t eeprom_93xx46_store_erase(struct device *dev,
330 struct device_attribute *attr,
331 const char *buf, size_t count)
332{
333 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
334 int erase = 0, ret;
335
336 sscanf(buf, "%d", &erase);
337 if (erase) {
338 ret = eeprom_93xx46_ew(edev, 1);
339 if (ret)
340 return ret;
341 ret = eeprom_93xx46_eral(edev);
342 if (ret)
343 return ret;
344 ret = eeprom_93xx46_ew(edev, 0);
345 if (ret)
346 return ret;
347 }
348 return count;
349}
350static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
351
352static void select_assert(void *context)
353{
354 struct eeprom_93xx46_dev *edev = context;
355
356 gpiod_set_value_cansleep(edev->pdata->select, 1);
357}
358
359static void select_deassert(void *context)
360{
361 struct eeprom_93xx46_dev *edev = context;
362
363 gpiod_set_value_cansleep(edev->pdata->select, 0);
364}
365
366static const struct of_device_id eeprom_93xx46_of_table[] = {
367 { .compatible = "eeprom-93xx46", },
368 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
369 {}
370};
371MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
372
373static int eeprom_93xx46_probe_dt(struct spi_device *spi)
374{
375 const struct of_device_id *of_id =
376 of_match_device(eeprom_93xx46_of_table, &spi->dev);
377 struct device_node *np = spi->dev.of_node;
378 struct eeprom_93xx46_platform_data *pd;
379 u32 tmp;
380 int ret;
381
382 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
383 if (!pd)
384 return -ENOMEM;
385
386 ret = of_property_read_u32(np, "data-size", &tmp);
387 if (ret < 0) {
388 dev_err(&spi->dev, "data-size property not found\n");
389 return ret;
390 }
391
392 if (tmp == 8) {
393 pd->flags |= EE_ADDR8;
394 } else if (tmp == 16) {
395 pd->flags |= EE_ADDR16;
396 } else {
397 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
398 return -EINVAL;
399 }
400
401 if (of_property_read_bool(np, "read-only"))
402 pd->flags |= EE_READONLY;
403
404 pd->select = devm_gpiod_get_optional(&spi->dev, "select",
405 GPIOD_OUT_LOW);
406 if (IS_ERR(pd->select))
407 return PTR_ERR(pd->select);
408
409 pd->prepare = select_assert;
410 pd->finish = select_deassert;
411 gpiod_direction_output(pd->select, 0);
412
413 if (of_id->data) {
414 const struct eeprom_93xx46_devtype_data *data = of_id->data;
415
416 pd->quirks = data->quirks;
417 }
418
419 spi->dev.platform_data = pd;
420
421 return 0;
422}
423
424static int eeprom_93xx46_probe(struct spi_device *spi)
425{
426 struct eeprom_93xx46_platform_data *pd;
427 struct eeprom_93xx46_dev *edev;
428 int err;
429
430 if (spi->dev.of_node) {
431 err = eeprom_93xx46_probe_dt(spi);
432 if (err < 0)
433 return err;
434 }
435
436 pd = spi->dev.platform_data;
437 if (!pd) {
438 dev_err(&spi->dev, "missing platform data\n");
439 return -ENODEV;
440 }
441
442 edev = kzalloc(sizeof(*edev), GFP_KERNEL);
443 if (!edev)
444 return -ENOMEM;
445
446 if (pd->flags & EE_ADDR8)
447 edev->addrlen = 7;
448 else if (pd->flags & EE_ADDR16)
449 edev->addrlen = 6;
450 else {
451 dev_err(&spi->dev, "unspecified address type\n");
452 err = -EINVAL;
453 goto fail;
454 }
455
456 mutex_init(&edev->lock);
457
458 edev->spi = spi;
459 edev->pdata = pd;
460
461 edev->size = 128;
462 edev->nvmem_config.name = dev_name(&spi->dev);
463 edev->nvmem_config.dev = &spi->dev;
464 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
465 edev->nvmem_config.root_only = true;
466 edev->nvmem_config.owner = THIS_MODULE;
467 edev->nvmem_config.compat = true;
468 edev->nvmem_config.base_dev = &spi->dev;
469 edev->nvmem_config.reg_read = eeprom_93xx46_read;
470 edev->nvmem_config.reg_write = eeprom_93xx46_write;
471 edev->nvmem_config.priv = edev;
472 edev->nvmem_config.stride = 4;
473 edev->nvmem_config.word_size = 1;
474 edev->nvmem_config.size = edev->size;
475
476 edev->nvmem = nvmem_register(&edev->nvmem_config);
477 if (IS_ERR(edev->nvmem)) {
478 err = PTR_ERR(edev->nvmem);
479 goto fail;
480 }
481
482 dev_info(&spi->dev, "%d-bit eeprom %s\n",
483 (pd->flags & EE_ADDR8) ? 8 : 16,
484 (pd->flags & EE_READONLY) ? "(readonly)" : "");
485
486 if (!(pd->flags & EE_READONLY)) {
487 if (device_create_file(&spi->dev, &dev_attr_erase))
488 dev_err(&spi->dev, "can't create erase interface\n");
489 }
490
491 spi_set_drvdata(spi, edev);
492 return 0;
493fail:
494 kfree(edev);
495 return err;
496}
497
498static int eeprom_93xx46_remove(struct spi_device *spi)
499{
500 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
501
502 nvmem_unregister(edev->nvmem);
503
504 if (!(edev->pdata->flags & EE_READONLY))
505 device_remove_file(&spi->dev, &dev_attr_erase);
506
507 kfree(edev);
508 return 0;
509}
510
511static struct spi_driver eeprom_93xx46_driver = {
512 .driver = {
513 .name = "93xx46",
514 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
515 },
516 .probe = eeprom_93xx46_probe,
517 .remove = eeprom_93xx46_remove,
518};
519
520module_spi_driver(eeprom_93xx46_driver);
521
522MODULE_LICENSE("GPL");
523MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
524MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
525MODULE_ALIAS("spi:93xx46");
1/*
2 * Driver for 93xx46 EEPROMs
3 *
4 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/device.h>
13#include <linux/gpio/consumer.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/of_gpio.h>
20#include <linux/slab.h>
21#include <linux/spi/spi.h>
22#include <linux/nvmem-provider.h>
23#include <linux/regmap.h>
24#include <linux/eeprom_93xx46.h>
25
26#define OP_START 0x4
27#define OP_WRITE (OP_START | 0x1)
28#define OP_READ (OP_START | 0x2)
29#define ADDR_EWDS 0x00
30#define ADDR_ERAL 0x20
31#define ADDR_EWEN 0x30
32
33struct eeprom_93xx46_devtype_data {
34 unsigned int quirks;
35};
36
37static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
38 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
39 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
40};
41
42struct eeprom_93xx46_dev {
43 struct spi_device *spi;
44 struct eeprom_93xx46_platform_data *pdata;
45 struct mutex lock;
46 struct regmap_config regmap_config;
47 struct nvmem_config nvmem_config;
48 struct nvmem_device *nvmem;
49 int addrlen;
50 int size;
51};
52
53static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
54{
55 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
56}
57
58static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
59{
60 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
61}
62
63static ssize_t
64eeprom_93xx46_read(struct eeprom_93xx46_dev *edev, char *buf,
65 unsigned off, size_t count)
66{
67 ssize_t ret = 0;
68
69 if (unlikely(off >= edev->size))
70 return 0;
71 if ((off + count) > edev->size)
72 count = edev->size - off;
73 if (unlikely(!count))
74 return count;
75
76 mutex_lock(&edev->lock);
77
78 if (edev->pdata->prepare)
79 edev->pdata->prepare(edev);
80
81 while (count) {
82 struct spi_message m;
83 struct spi_transfer t[2] = { { 0 } };
84 u16 cmd_addr = OP_READ << edev->addrlen;
85 size_t nbytes = count;
86 int bits;
87 int err;
88
89 if (edev->addrlen == 7) {
90 cmd_addr |= off & 0x7f;
91 bits = 10;
92 if (has_quirk_single_word_read(edev))
93 nbytes = 1;
94 } else {
95 cmd_addr |= (off >> 1) & 0x3f;
96 bits = 9;
97 if (has_quirk_single_word_read(edev))
98 nbytes = 2;
99 }
100
101 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
102 cmd_addr, edev->spi->max_speed_hz);
103
104 spi_message_init(&m);
105
106 t[0].tx_buf = (char *)&cmd_addr;
107 t[0].len = 2;
108 t[0].bits_per_word = bits;
109 spi_message_add_tail(&t[0], &m);
110
111 t[1].rx_buf = buf;
112 t[1].len = count;
113 t[1].bits_per_word = 8;
114 spi_message_add_tail(&t[1], &m);
115
116 err = spi_sync(edev->spi, &m);
117 /* have to wait at least Tcsl ns */
118 ndelay(250);
119
120 if (err) {
121 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
122 nbytes, (int)off, err);
123 ret = err;
124 break;
125 }
126
127 buf += nbytes;
128 off += nbytes;
129 count -= nbytes;
130 ret += nbytes;
131 }
132
133 if (edev->pdata->finish)
134 edev->pdata->finish(edev);
135
136 mutex_unlock(&edev->lock);
137 return ret;
138}
139
140static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
141{
142 struct spi_message m;
143 struct spi_transfer t;
144 int bits, ret;
145 u16 cmd_addr;
146
147 cmd_addr = OP_START << edev->addrlen;
148 if (edev->addrlen == 7) {
149 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
150 bits = 10;
151 } else {
152 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
153 bits = 9;
154 }
155
156 if (has_quirk_instruction_length(edev)) {
157 cmd_addr <<= 2;
158 bits += 2;
159 }
160
161 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
162 is_on ? "en" : "ds", cmd_addr, bits);
163
164 spi_message_init(&m);
165 memset(&t, 0, sizeof(t));
166
167 t.tx_buf = &cmd_addr;
168 t.len = 2;
169 t.bits_per_word = bits;
170 spi_message_add_tail(&t, &m);
171
172 mutex_lock(&edev->lock);
173
174 if (edev->pdata->prepare)
175 edev->pdata->prepare(edev);
176
177 ret = spi_sync(edev->spi, &m);
178 /* have to wait at least Tcsl ns */
179 ndelay(250);
180 if (ret)
181 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
182 is_on ? "en" : "dis", ret);
183
184 if (edev->pdata->finish)
185 edev->pdata->finish(edev);
186
187 mutex_unlock(&edev->lock);
188 return ret;
189}
190
191static ssize_t
192eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
193 const char *buf, unsigned off)
194{
195 struct spi_message m;
196 struct spi_transfer t[2];
197 int bits, data_len, ret;
198 u16 cmd_addr;
199
200 cmd_addr = OP_WRITE << edev->addrlen;
201
202 if (edev->addrlen == 7) {
203 cmd_addr |= off & 0x7f;
204 bits = 10;
205 data_len = 1;
206 } else {
207 cmd_addr |= (off >> 1) & 0x3f;
208 bits = 9;
209 data_len = 2;
210 }
211
212 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
213
214 spi_message_init(&m);
215 memset(t, 0, sizeof(t));
216
217 t[0].tx_buf = (char *)&cmd_addr;
218 t[0].len = 2;
219 t[0].bits_per_word = bits;
220 spi_message_add_tail(&t[0], &m);
221
222 t[1].tx_buf = buf;
223 t[1].len = data_len;
224 t[1].bits_per_word = 8;
225 spi_message_add_tail(&t[1], &m);
226
227 ret = spi_sync(edev->spi, &m);
228 /* have to wait program cycle time Twc ms */
229 mdelay(6);
230 return ret;
231}
232
233static ssize_t
234eeprom_93xx46_write(struct eeprom_93xx46_dev *edev, const char *buf,
235 loff_t off, size_t count)
236{
237 int i, ret, step = 1;
238
239 if (unlikely(off >= edev->size))
240 return -EFBIG;
241 if ((off + count) > edev->size)
242 count = edev->size - off;
243 if (unlikely(!count))
244 return count;
245
246 /* only write even number of bytes on 16-bit devices */
247 if (edev->addrlen == 6) {
248 step = 2;
249 count &= ~1;
250 }
251
252 /* erase/write enable */
253 ret = eeprom_93xx46_ew(edev, 1);
254 if (ret)
255 return ret;
256
257 mutex_lock(&edev->lock);
258
259 if (edev->pdata->prepare)
260 edev->pdata->prepare(edev);
261
262 for (i = 0; i < count; i += step) {
263 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
264 if (ret) {
265 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
266 (int)off + i, ret);
267 break;
268 }
269 }
270
271 if (edev->pdata->finish)
272 edev->pdata->finish(edev);
273
274 mutex_unlock(&edev->lock);
275
276 /* erase/write disable */
277 eeprom_93xx46_ew(edev, 0);
278 return ret ? : count;
279}
280
281/*
282 * Provide a regmap interface, which is registered with the NVMEM
283 * framework
284*/
285static int eeprom_93xx46_regmap_read(void *context, const void *reg,
286 size_t reg_size, void *val,
287 size_t val_size)
288{
289 struct eeprom_93xx46_dev *eeprom_93xx46 = context;
290 off_t offset = *(u32 *)reg;
291 int err;
292
293 err = eeprom_93xx46_read(eeprom_93xx46, val, offset, val_size);
294 if (err)
295 return err;
296 return 0;
297}
298
299static int eeprom_93xx46_regmap_write(void *context, const void *data,
300 size_t count)
301{
302 struct eeprom_93xx46_dev *eeprom_93xx46 = context;
303 const char *buf;
304 u32 offset;
305 size_t len;
306 int err;
307
308 memcpy(&offset, data, sizeof(offset));
309 buf = (const char *)data + sizeof(offset);
310 len = count - sizeof(offset);
311
312 err = eeprom_93xx46_write(eeprom_93xx46, buf, offset, len);
313 if (err)
314 return err;
315 return 0;
316}
317
318static const struct regmap_bus eeprom_93xx46_regmap_bus = {
319 .read = eeprom_93xx46_regmap_read,
320 .write = eeprom_93xx46_regmap_write,
321 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
322};
323
324static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
325{
326 struct eeprom_93xx46_platform_data *pd = edev->pdata;
327 struct spi_message m;
328 struct spi_transfer t;
329 int bits, ret;
330 u16 cmd_addr;
331
332 cmd_addr = OP_START << edev->addrlen;
333 if (edev->addrlen == 7) {
334 cmd_addr |= ADDR_ERAL << 1;
335 bits = 10;
336 } else {
337 cmd_addr |= ADDR_ERAL;
338 bits = 9;
339 }
340
341 if (has_quirk_instruction_length(edev)) {
342 cmd_addr <<= 2;
343 bits += 2;
344 }
345
346 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
347
348 spi_message_init(&m);
349 memset(&t, 0, sizeof(t));
350
351 t.tx_buf = &cmd_addr;
352 t.len = 2;
353 t.bits_per_word = bits;
354 spi_message_add_tail(&t, &m);
355
356 mutex_lock(&edev->lock);
357
358 if (edev->pdata->prepare)
359 edev->pdata->prepare(edev);
360
361 ret = spi_sync(edev->spi, &m);
362 if (ret)
363 dev_err(&edev->spi->dev, "erase error %d\n", ret);
364 /* have to wait erase cycle time Tec ms */
365 mdelay(6);
366
367 if (pd->finish)
368 pd->finish(edev);
369
370 mutex_unlock(&edev->lock);
371 return ret;
372}
373
374static ssize_t eeprom_93xx46_store_erase(struct device *dev,
375 struct device_attribute *attr,
376 const char *buf, size_t count)
377{
378 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
379 int erase = 0, ret;
380
381 sscanf(buf, "%d", &erase);
382 if (erase) {
383 ret = eeprom_93xx46_ew(edev, 1);
384 if (ret)
385 return ret;
386 ret = eeprom_93xx46_eral(edev);
387 if (ret)
388 return ret;
389 ret = eeprom_93xx46_ew(edev, 0);
390 if (ret)
391 return ret;
392 }
393 return count;
394}
395static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
396
397static void select_assert(void *context)
398{
399 struct eeprom_93xx46_dev *edev = context;
400
401 gpiod_set_value_cansleep(edev->pdata->select, 1);
402}
403
404static void select_deassert(void *context)
405{
406 struct eeprom_93xx46_dev *edev = context;
407
408 gpiod_set_value_cansleep(edev->pdata->select, 0);
409}
410
411static const struct of_device_id eeprom_93xx46_of_table[] = {
412 { .compatible = "eeprom-93xx46", },
413 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
414 {}
415};
416MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
417
418static int eeprom_93xx46_probe_dt(struct spi_device *spi)
419{
420 const struct of_device_id *of_id =
421 of_match_device(eeprom_93xx46_of_table, &spi->dev);
422 struct device_node *np = spi->dev.of_node;
423 struct eeprom_93xx46_platform_data *pd;
424 u32 tmp;
425 int gpio;
426 enum of_gpio_flags of_flags;
427 int ret;
428
429 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
430 if (!pd)
431 return -ENOMEM;
432
433 ret = of_property_read_u32(np, "data-size", &tmp);
434 if (ret < 0) {
435 dev_err(&spi->dev, "data-size property not found\n");
436 return ret;
437 }
438
439 if (tmp == 8) {
440 pd->flags |= EE_ADDR8;
441 } else if (tmp == 16) {
442 pd->flags |= EE_ADDR16;
443 } else {
444 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
445 return -EINVAL;
446 }
447
448 if (of_property_read_bool(np, "read-only"))
449 pd->flags |= EE_READONLY;
450
451 gpio = of_get_named_gpio_flags(np, "select-gpios", 0, &of_flags);
452 if (gpio_is_valid(gpio)) {
453 unsigned long flags =
454 of_flags == OF_GPIO_ACTIVE_LOW ? GPIOF_ACTIVE_LOW : 0;
455
456 ret = devm_gpio_request_one(&spi->dev, gpio, flags,
457 "eeprom_93xx46_select");
458 if (ret)
459 return ret;
460
461 pd->select = gpio_to_desc(gpio);
462 pd->prepare = select_assert;
463 pd->finish = select_deassert;
464
465 gpiod_direction_output(pd->select, 0);
466 }
467
468 if (of_id->data) {
469 const struct eeprom_93xx46_devtype_data *data = of_id->data;
470
471 pd->quirks = data->quirks;
472 }
473
474 spi->dev.platform_data = pd;
475
476 return 0;
477}
478
479static int eeprom_93xx46_probe(struct spi_device *spi)
480{
481 struct eeprom_93xx46_platform_data *pd;
482 struct eeprom_93xx46_dev *edev;
483 struct regmap *regmap;
484 int err;
485
486 if (spi->dev.of_node) {
487 err = eeprom_93xx46_probe_dt(spi);
488 if (err < 0)
489 return err;
490 }
491
492 pd = spi->dev.platform_data;
493 if (!pd) {
494 dev_err(&spi->dev, "missing platform data\n");
495 return -ENODEV;
496 }
497
498 edev = kzalloc(sizeof(*edev), GFP_KERNEL);
499 if (!edev)
500 return -ENOMEM;
501
502 if (pd->flags & EE_ADDR8)
503 edev->addrlen = 7;
504 else if (pd->flags & EE_ADDR16)
505 edev->addrlen = 6;
506 else {
507 dev_err(&spi->dev, "unspecified address type\n");
508 err = -EINVAL;
509 goto fail;
510 }
511
512 mutex_init(&edev->lock);
513
514 edev->spi = spi_dev_get(spi);
515 edev->pdata = pd;
516
517 edev->size = 128;
518
519 edev->regmap_config.reg_bits = 32;
520 edev->regmap_config.val_bits = 8;
521 edev->regmap_config.reg_stride = 1;
522 edev->regmap_config.max_register = edev->size - 1;
523
524 regmap = devm_regmap_init(&spi->dev, &eeprom_93xx46_regmap_bus, edev,
525 &edev->regmap_config);
526 if (IS_ERR(regmap)) {
527 dev_err(&spi->dev, "regmap init failed\n");
528 err = PTR_ERR(regmap);
529 goto fail;
530 }
531
532 edev->nvmem_config.name = dev_name(&spi->dev);
533 edev->nvmem_config.dev = &spi->dev;
534 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
535 edev->nvmem_config.root_only = true;
536 edev->nvmem_config.owner = THIS_MODULE;
537 edev->nvmem_config.compat = true;
538 edev->nvmem_config.base_dev = &spi->dev;
539
540 edev->nvmem = nvmem_register(&edev->nvmem_config);
541 if (IS_ERR(edev->nvmem)) {
542 err = PTR_ERR(edev->nvmem);
543 goto fail;
544 }
545
546 dev_info(&spi->dev, "%d-bit eeprom %s\n",
547 (pd->flags & EE_ADDR8) ? 8 : 16,
548 (pd->flags & EE_READONLY) ? "(readonly)" : "");
549
550 if (!(pd->flags & EE_READONLY)) {
551 if (device_create_file(&spi->dev, &dev_attr_erase))
552 dev_err(&spi->dev, "can't create erase interface\n");
553 }
554
555 spi_set_drvdata(spi, edev);
556 return 0;
557fail:
558 kfree(edev);
559 return err;
560}
561
562static int eeprom_93xx46_remove(struct spi_device *spi)
563{
564 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
565
566 nvmem_unregister(edev->nvmem);
567
568 if (!(edev->pdata->flags & EE_READONLY))
569 device_remove_file(&spi->dev, &dev_attr_erase);
570
571 kfree(edev);
572 return 0;
573}
574
575static struct spi_driver eeprom_93xx46_driver = {
576 .driver = {
577 .name = "93xx46",
578 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
579 },
580 .probe = eeprom_93xx46_probe,
581 .remove = eeprom_93xx46_remove,
582};
583
584module_spi_driver(eeprom_93xx46_driver);
585
586MODULE_LICENSE("GPL");
587MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
588MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
589MODULE_ALIAS("spi:93xx46");