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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
11#include <linux/mm_types.h>
12#include <linux/mmzone.h>
13#ifdef CONFIG_32BIT
14#include <asm/pgtable-32.h>
15#endif
16#ifdef CONFIG_64BIT
17#include <asm/pgtable-64.h>
18#endif
19
20#include <asm/io.h>
21#include <asm/pgtable-bits.h>
22
23struct mm_struct;
24struct vm_area_struct;
25
26#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_NO_READ | \
27 _page_cachable_default)
28#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \
29 _page_cachable_default)
30#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_NO_EXEC | \
31 _page_cachable_default)
32#define PAGE_READONLY __pgprot(_PAGE_PRESENT | \
33 _page_cachable_default)
34#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
35 _PAGE_GLOBAL | _page_cachable_default)
36#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
37 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
38#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \
39 _page_cachable_default)
40#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
41 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
42
43/*
44 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
45 * execute, and consider it to be the same as read. Also, write
46 * permissions imply read permissions. This is the closest we can get
47 * by reasonable means..
48 */
49
50/*
51 * Dummy values to fill the table in mmap.c
52 * The real values will be generated at runtime
53 */
54#define __P000 __pgprot(0)
55#define __P001 __pgprot(0)
56#define __P010 __pgprot(0)
57#define __P011 __pgprot(0)
58#define __P100 __pgprot(0)
59#define __P101 __pgprot(0)
60#define __P110 __pgprot(0)
61#define __P111 __pgprot(0)
62
63#define __S000 __pgprot(0)
64#define __S001 __pgprot(0)
65#define __S010 __pgprot(0)
66#define __S011 __pgprot(0)
67#define __S100 __pgprot(0)
68#define __S101 __pgprot(0)
69#define __S110 __pgprot(0)
70#define __S111 __pgprot(0)
71
72extern unsigned long _page_cachable_default;
73
74/*
75 * ZERO_PAGE is a global shared page that is always zero; used
76 * for zero-mapped memory areas etc..
77 */
78
79extern unsigned long empty_zero_page;
80extern unsigned long zero_page_mask;
81
82#define ZERO_PAGE(vaddr) \
83 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
84#define __HAVE_COLOR_ZERO_PAGE
85
86extern void paging_init(void);
87
88/*
89 * Conversion functions: convert a page and protection to a page entry,
90 * and a page entry and page directory to the page they refer to.
91 */
92#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
93
94#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
95#ifndef CONFIG_TRANSPARENT_HUGEPAGE
96#define pmd_page(pmd) __pmd_page(pmd)
97#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
98
99#define pmd_page_vaddr(pmd) pmd_val(pmd)
100
101#define htw_stop() \
102do { \
103 unsigned long flags; \
104 \
105 if (cpu_has_htw) { \
106 local_irq_save(flags); \
107 if(!raw_current_cpu_data.htw_seq++) { \
108 write_c0_pwctl(read_c0_pwctl() & \
109 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
110 back_to_back_c0_hazard(); \
111 } \
112 local_irq_restore(flags); \
113 } \
114} while(0)
115
116#define htw_start() \
117do { \
118 unsigned long flags; \
119 \
120 if (cpu_has_htw) { \
121 local_irq_save(flags); \
122 if (!--raw_current_cpu_data.htw_seq) { \
123 write_c0_pwctl(read_c0_pwctl() | \
124 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
125 back_to_back_c0_hazard(); \
126 } \
127 local_irq_restore(flags); \
128 } \
129} while(0)
130
131static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
132 pte_t *ptep, pte_t pteval);
133
134#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
135
136#ifdef CONFIG_XPA
137# define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
138#else
139# define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
140#endif
141
142#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
143#define pte_no_exec(pte) ((pte).pte_low & _PAGE_NO_EXEC)
144
145static inline void set_pte(pte_t *ptep, pte_t pte)
146{
147 ptep->pte_high = pte.pte_high;
148 smp_wmb();
149 ptep->pte_low = pte.pte_low;
150
151#ifdef CONFIG_XPA
152 if (pte.pte_high & _PAGE_GLOBAL) {
153#else
154 if (pte.pte_low & _PAGE_GLOBAL) {
155#endif
156 pte_t *buddy = ptep_buddy(ptep);
157 /*
158 * Make sure the buddy is global too (if it's !none,
159 * it better already be global)
160 */
161 if (pte_none(*buddy)) {
162 if (!IS_ENABLED(CONFIG_XPA))
163 buddy->pte_low |= _PAGE_GLOBAL;
164 buddy->pte_high |= _PAGE_GLOBAL;
165 }
166 }
167}
168
169static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
170{
171 pte_t null = __pte(0);
172
173 htw_stop();
174 /* Preserve global status for the pair */
175 if (IS_ENABLED(CONFIG_XPA)) {
176 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
177 null.pte_high = _PAGE_GLOBAL;
178 } else {
179 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
180 null.pte_low = null.pte_high = _PAGE_GLOBAL;
181 }
182
183 set_pte_at(mm, addr, ptep, null);
184 htw_start();
185}
186#else
187
188#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
189#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
190#define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC)
191
192/*
193 * Certain architectures need to do special things when pte's
194 * within a page table are directly modified. Thus, the following
195 * hook is made available.
196 */
197static inline void set_pte(pte_t *ptep, pte_t pteval)
198{
199 *ptep = pteval;
200#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
201 if (pte_val(pteval) & _PAGE_GLOBAL) {
202 pte_t *buddy = ptep_buddy(ptep);
203 /*
204 * Make sure the buddy is global too (if it's !none,
205 * it better already be global)
206 */
207#ifdef CONFIG_SMP
208 /*
209 * For SMP, multiple CPUs can race, so we need to do
210 * this atomically.
211 */
212 unsigned long page_global = _PAGE_GLOBAL;
213 unsigned long tmp;
214
215 if (kernel_uses_llsc && R10000_LLSC_WAR) {
216 __asm__ __volatile__ (
217 " .set arch=r4000 \n"
218 " .set push \n"
219 " .set noreorder \n"
220 "1:" __LL "%[tmp], %[buddy] \n"
221 " bnez %[tmp], 2f \n"
222 " or %[tmp], %[tmp], %[global] \n"
223 __SC "%[tmp], %[buddy] \n"
224 " beqzl %[tmp], 1b \n"
225 " nop \n"
226 "2: \n"
227 " .set pop \n"
228 " .set mips0 \n"
229 : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
230 : [global] "r" (page_global));
231 } else if (kernel_uses_llsc) {
232 __asm__ __volatile__ (
233 " .set "MIPS_ISA_ARCH_LEVEL" \n"
234 " .set push \n"
235 " .set noreorder \n"
236 "1:" __LL "%[tmp], %[buddy] \n"
237 " bnez %[tmp], 2f \n"
238 " or %[tmp], %[tmp], %[global] \n"
239 __SC "%[tmp], %[buddy] \n"
240 " beqz %[tmp], 1b \n"
241 " nop \n"
242 "2: \n"
243 " .set pop \n"
244 " .set mips0 \n"
245 : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
246 : [global] "r" (page_global));
247 }
248#else /* !CONFIG_SMP */
249 if (pte_none(*buddy))
250 pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
251#endif /* CONFIG_SMP */
252 }
253#endif
254}
255
256static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
257{
258 htw_stop();
259#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
260 /* Preserve global status for the pair */
261 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
262 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
263 else
264#endif
265 set_pte_at(mm, addr, ptep, __pte(0));
266 htw_start();
267}
268#endif
269
270static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
271 pte_t *ptep, pte_t pteval)
272{
273 extern void __update_cache(unsigned long address, pte_t pte);
274
275 if (!pte_present(pteval))
276 goto cache_sync_done;
277
278 if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))
279 goto cache_sync_done;
280
281 __update_cache(addr, pteval);
282cache_sync_done:
283 set_pte(ptep, pteval);
284}
285
286/*
287 * (pmds are folded into puds so this doesn't get actually called,
288 * but the define is needed for a generic inline function.)
289 */
290#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
291
292#ifndef __PAGETABLE_PMD_FOLDED
293/*
294 * (puds are folded into pgds so this doesn't get actually called,
295 * but the define is needed for a generic inline function.)
296 */
297#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
298#endif
299
300#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
301#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
302#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
303
304/*
305 * We used to declare this array with size but gcc 3.3 and older are not able
306 * to find that this expression is a constant, so the size is dropped.
307 */
308extern pgd_t swapper_pg_dir[];
309
310/*
311 * The following only work if pte_present() is true.
312 * Undefined behaviour if not..
313 */
314#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
315static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
316static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
317static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
318
319static inline pte_t pte_wrprotect(pte_t pte)
320{
321 pte.pte_low &= ~_PAGE_WRITE;
322 if (!IS_ENABLED(CONFIG_XPA))
323 pte.pte_low &= ~_PAGE_SILENT_WRITE;
324 pte.pte_high &= ~_PAGE_SILENT_WRITE;
325 return pte;
326}
327
328static inline pte_t pte_mkclean(pte_t pte)
329{
330 pte.pte_low &= ~_PAGE_MODIFIED;
331 if (!IS_ENABLED(CONFIG_XPA))
332 pte.pte_low &= ~_PAGE_SILENT_WRITE;
333 pte.pte_high &= ~_PAGE_SILENT_WRITE;
334 return pte;
335}
336
337static inline pte_t pte_mkold(pte_t pte)
338{
339 pte.pte_low &= ~_PAGE_ACCESSED;
340 if (!IS_ENABLED(CONFIG_XPA))
341 pte.pte_low &= ~_PAGE_SILENT_READ;
342 pte.pte_high &= ~_PAGE_SILENT_READ;
343 return pte;
344}
345
346static inline pte_t pte_mkwrite(pte_t pte)
347{
348 pte.pte_low |= _PAGE_WRITE;
349 if (pte.pte_low & _PAGE_MODIFIED) {
350 if (!IS_ENABLED(CONFIG_XPA))
351 pte.pte_low |= _PAGE_SILENT_WRITE;
352 pte.pte_high |= _PAGE_SILENT_WRITE;
353 }
354 return pte;
355}
356
357static inline pte_t pte_mkdirty(pte_t pte)
358{
359 pte.pte_low |= _PAGE_MODIFIED;
360 if (pte.pte_low & _PAGE_WRITE) {
361 if (!IS_ENABLED(CONFIG_XPA))
362 pte.pte_low |= _PAGE_SILENT_WRITE;
363 pte.pte_high |= _PAGE_SILENT_WRITE;
364 }
365 return pte;
366}
367
368static inline pte_t pte_mkyoung(pte_t pte)
369{
370 pte.pte_low |= _PAGE_ACCESSED;
371 if (!(pte.pte_low & _PAGE_NO_READ)) {
372 if (!IS_ENABLED(CONFIG_XPA))
373 pte.pte_low |= _PAGE_SILENT_READ;
374 pte.pte_high |= _PAGE_SILENT_READ;
375 }
376 return pte;
377}
378#else
379static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
380static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
381static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
382
383static inline pte_t pte_wrprotect(pte_t pte)
384{
385 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
386 return pte;
387}
388
389static inline pte_t pte_mkclean(pte_t pte)
390{
391 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
392 return pte;
393}
394
395static inline pte_t pte_mkold(pte_t pte)
396{
397 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
398 return pte;
399}
400
401static inline pte_t pte_mkwrite(pte_t pte)
402{
403 pte_val(pte) |= _PAGE_WRITE;
404 if (pte_val(pte) & _PAGE_MODIFIED)
405 pte_val(pte) |= _PAGE_SILENT_WRITE;
406 return pte;
407}
408
409static inline pte_t pte_mkdirty(pte_t pte)
410{
411 pte_val(pte) |= _PAGE_MODIFIED;
412 if (pte_val(pte) & _PAGE_WRITE)
413 pte_val(pte) |= _PAGE_SILENT_WRITE;
414 return pte;
415}
416
417static inline pte_t pte_mkyoung(pte_t pte)
418{
419 pte_val(pte) |= _PAGE_ACCESSED;
420 if (!(pte_val(pte) & _PAGE_NO_READ))
421 pte_val(pte) |= _PAGE_SILENT_READ;
422 return pte;
423}
424
425#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
426static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
427
428static inline pte_t pte_mkhuge(pte_t pte)
429{
430 pte_val(pte) |= _PAGE_HUGE;
431 return pte;
432}
433#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
434#endif
435static inline int pte_special(pte_t pte) { return 0; }
436static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
437
438/*
439 * Macro to make mark a page protection value as "uncacheable". Note
440 * that "protection" is really a misnomer here as the protection value
441 * contains the memory attribute bits, dirty bits, and various other
442 * bits as well.
443 */
444#define pgprot_noncached pgprot_noncached
445
446static inline pgprot_t pgprot_noncached(pgprot_t _prot)
447{
448 unsigned long prot = pgprot_val(_prot);
449
450 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
451
452 return __pgprot(prot);
453}
454
455#define pgprot_writecombine pgprot_writecombine
456
457static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
458{
459 unsigned long prot = pgprot_val(_prot);
460
461 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
462 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
463
464 return __pgprot(prot);
465}
466
467/*
468 * Conversion functions: convert a page and protection to a page entry,
469 * and a page entry and page directory to the page they refer to.
470 */
471#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
472
473#if defined(CONFIG_XPA)
474static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
475{
476 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
477 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
478 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
479 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
480 return pte;
481}
482#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
483static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
484{
485 pte.pte_low &= _PAGE_CHG_MASK;
486 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
487 pte.pte_low |= pgprot_val(newprot);
488 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
489 return pte;
490}
491#else
492static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
493{
494 return __pte((pte_val(pte) & _PAGE_CHG_MASK) |
495 (pgprot_val(newprot) & ~_PAGE_CHG_MASK));
496}
497#endif
498
499
500extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
501 pte_t pte);
502
503static inline void update_mmu_cache(struct vm_area_struct *vma,
504 unsigned long address, pte_t *ptep)
505{
506 pte_t pte = *ptep;
507 __update_tlb(vma, address, pte);
508}
509
510static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
511 unsigned long address, pmd_t *pmdp)
512{
513 pte_t pte = *(pte_t *)pmdp;
514
515 __update_tlb(vma, address, pte);
516}
517
518#define kern_addr_valid(addr) (1)
519
520#ifdef CONFIG_PHYS_ADDR_T_64BIT
521extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
522
523static inline int io_remap_pfn_range(struct vm_area_struct *vma,
524 unsigned long vaddr,
525 unsigned long pfn,
526 unsigned long size,
527 pgprot_t prot)
528{
529 phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
530 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
531}
532#define io_remap_pfn_range io_remap_pfn_range
533#endif
534
535#ifdef CONFIG_TRANSPARENT_HUGEPAGE
536
537/* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
538#define pmdp_establish generic_pmdp_establish
539
540#define has_transparent_hugepage has_transparent_hugepage
541extern int has_transparent_hugepage(void);
542
543static inline int pmd_trans_huge(pmd_t pmd)
544{
545 return !!(pmd_val(pmd) & _PAGE_HUGE);
546}
547
548static inline pmd_t pmd_mkhuge(pmd_t pmd)
549{
550 pmd_val(pmd) |= _PAGE_HUGE;
551
552 return pmd;
553}
554
555extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
556 pmd_t *pmdp, pmd_t pmd);
557
558#define pmd_write pmd_write
559static inline int pmd_write(pmd_t pmd)
560{
561 return !!(pmd_val(pmd) & _PAGE_WRITE);
562}
563
564static inline pmd_t pmd_wrprotect(pmd_t pmd)
565{
566 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
567 return pmd;
568}
569
570static inline pmd_t pmd_mkwrite(pmd_t pmd)
571{
572 pmd_val(pmd) |= _PAGE_WRITE;
573 if (pmd_val(pmd) & _PAGE_MODIFIED)
574 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
575
576 return pmd;
577}
578
579static inline int pmd_dirty(pmd_t pmd)
580{
581 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
582}
583
584static inline pmd_t pmd_mkclean(pmd_t pmd)
585{
586 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
587 return pmd;
588}
589
590static inline pmd_t pmd_mkdirty(pmd_t pmd)
591{
592 pmd_val(pmd) |= _PAGE_MODIFIED;
593 if (pmd_val(pmd) & _PAGE_WRITE)
594 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
595
596 return pmd;
597}
598
599static inline int pmd_young(pmd_t pmd)
600{
601 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
602}
603
604static inline pmd_t pmd_mkold(pmd_t pmd)
605{
606 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
607
608 return pmd;
609}
610
611static inline pmd_t pmd_mkyoung(pmd_t pmd)
612{
613 pmd_val(pmd) |= _PAGE_ACCESSED;
614
615 if (!(pmd_val(pmd) & _PAGE_NO_READ))
616 pmd_val(pmd) |= _PAGE_SILENT_READ;
617
618 return pmd;
619}
620
621/* Extern to avoid header file madness */
622extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
623
624static inline unsigned long pmd_pfn(pmd_t pmd)
625{
626 return pmd_val(pmd) >> _PFN_SHIFT;
627}
628
629static inline struct page *pmd_page(pmd_t pmd)
630{
631 if (pmd_trans_huge(pmd))
632 return pfn_to_page(pmd_pfn(pmd));
633
634 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
635}
636
637static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
638{
639 pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) |
640 (pgprot_val(newprot) & ~_PAGE_CHG_MASK);
641 return pmd;
642}
643
644static inline pmd_t pmd_mknotpresent(pmd_t pmd)
645{
646 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
647
648 return pmd;
649}
650
651/*
652 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
653 * different prototype.
654 */
655#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
656static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
657 unsigned long address, pmd_t *pmdp)
658{
659 pmd_t old = *pmdp;
660
661 pmd_clear(pmdp);
662
663 return old;
664}
665
666#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
667
668#include <asm-generic/pgtable.h>
669
670/*
671 * uncached accelerated TLB map for video memory access
672 */
673#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
674#define __HAVE_PHYS_MEM_ACCESS_PROT
675
676struct file;
677pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
678 unsigned long size, pgprot_t vma_prot);
679#endif
680
681/*
682 * We provide our own get_unmapped area to cope with the virtual aliasing
683 * constraints placed on us by the cache architecture.
684 */
685#define HAVE_ARCH_UNMAPPED_AREA
686#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
687
688/*
689 * No page table caches to initialise
690 */
691#define pgtable_cache_init() do { } while (0)
692
693#endif /* _ASM_PGTABLE_H */
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
11#include <linux/mm_types.h>
12#include <linux/mmzone.h>
13#ifdef CONFIG_32BIT
14#include <asm/pgtable-32.h>
15#endif
16#ifdef CONFIG_64BIT
17#include <asm/pgtable-64.h>
18#endif
19
20#include <asm/io.h>
21#include <asm/pgtable-bits.h>
22
23struct mm_struct;
24struct vm_area_struct;
25
26#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
27#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | \
28 _page_cachable_default)
29#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_NO_EXEC | \
30 _page_cachable_default)
31#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
32 _page_cachable_default)
33#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
34 _PAGE_GLOBAL | _page_cachable_default)
35#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
36 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
37#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
38 _page_cachable_default)
39#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
40 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
41
42/*
43 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
44 * execute, and consider it to be the same as read. Also, write
45 * permissions imply read permissions. This is the closest we can get
46 * by reasonable means..
47 */
48
49/*
50 * Dummy values to fill the table in mmap.c
51 * The real values will be generated at runtime
52 */
53#define __P000 __pgprot(0)
54#define __P001 __pgprot(0)
55#define __P010 __pgprot(0)
56#define __P011 __pgprot(0)
57#define __P100 __pgprot(0)
58#define __P101 __pgprot(0)
59#define __P110 __pgprot(0)
60#define __P111 __pgprot(0)
61
62#define __S000 __pgprot(0)
63#define __S001 __pgprot(0)
64#define __S010 __pgprot(0)
65#define __S011 __pgprot(0)
66#define __S100 __pgprot(0)
67#define __S101 __pgprot(0)
68#define __S110 __pgprot(0)
69#define __S111 __pgprot(0)
70
71extern unsigned long _page_cachable_default;
72
73/*
74 * ZERO_PAGE is a global shared page that is always zero; used
75 * for zero-mapped memory areas etc..
76 */
77
78extern unsigned long empty_zero_page;
79extern unsigned long zero_page_mask;
80
81#define ZERO_PAGE(vaddr) \
82 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
83#define __HAVE_COLOR_ZERO_PAGE
84
85extern void paging_init(void);
86
87/*
88 * Conversion functions: convert a page and protection to a page entry,
89 * and a page entry and page directory to the page they refer to.
90 */
91#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
92
93#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
94#ifndef CONFIG_TRANSPARENT_HUGEPAGE
95#define pmd_page(pmd) __pmd_page(pmd)
96#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
97
98#define pmd_page_vaddr(pmd) pmd_val(pmd)
99
100#define htw_stop() \
101do { \
102 unsigned long flags; \
103 \
104 if (cpu_has_htw) { \
105 local_irq_save(flags); \
106 if(!raw_current_cpu_data.htw_seq++) { \
107 write_c0_pwctl(read_c0_pwctl() & \
108 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
109 back_to_back_c0_hazard(); \
110 } \
111 local_irq_restore(flags); \
112 } \
113} while(0)
114
115#define htw_start() \
116do { \
117 unsigned long flags; \
118 \
119 if (cpu_has_htw) { \
120 local_irq_save(flags); \
121 if (!--raw_current_cpu_data.htw_seq) { \
122 write_c0_pwctl(read_c0_pwctl() | \
123 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
124 back_to_back_c0_hazard(); \
125 } \
126 local_irq_restore(flags); \
127 } \
128} while(0)
129
130#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
131
132#define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
133#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
134
135static inline void set_pte(pte_t *ptep, pte_t pte)
136{
137 ptep->pte_high = pte.pte_high;
138 smp_wmb();
139 ptep->pte_low = pte.pte_low;
140
141 if (pte.pte_high & _PAGE_GLOBAL) {
142 pte_t *buddy = ptep_buddy(ptep);
143 /*
144 * Make sure the buddy is global too (if it's !none,
145 * it better already be global)
146 */
147 if (pte_none(*buddy))
148 buddy->pte_high |= _PAGE_GLOBAL;
149 }
150}
151#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
152
153static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
154{
155 pte_t null = __pte(0);
156
157 htw_stop();
158 /* Preserve global status for the pair */
159 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
160 null.pte_high = _PAGE_GLOBAL;
161
162 set_pte_at(mm, addr, ptep, null);
163 htw_start();
164}
165#else
166
167#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
168#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
169
170/*
171 * Certain architectures need to do special things when pte's
172 * within a page table are directly modified. Thus, the following
173 * hook is made available.
174 */
175static inline void set_pte(pte_t *ptep, pte_t pteval)
176{
177 *ptep = pteval;
178#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
179 if (pte_val(pteval) & _PAGE_GLOBAL) {
180 pte_t *buddy = ptep_buddy(ptep);
181 /*
182 * Make sure the buddy is global too (if it's !none,
183 * it better already be global)
184 */
185#ifdef CONFIG_SMP
186 /*
187 * For SMP, multiple CPUs can race, so we need to do
188 * this atomically.
189 */
190#ifdef CONFIG_64BIT
191#define LL_INSN "lld"
192#define SC_INSN "scd"
193#else /* CONFIG_32BIT */
194#define LL_INSN "ll"
195#define SC_INSN "sc"
196#endif
197 unsigned long page_global = _PAGE_GLOBAL;
198 unsigned long tmp;
199
200 __asm__ __volatile__ (
201 " .set push\n"
202 " .set noreorder\n"
203 "1: " LL_INSN " %[tmp], %[buddy]\n"
204 " bnez %[tmp], 2f\n"
205 " or %[tmp], %[tmp], %[global]\n"
206 " " SC_INSN " %[tmp], %[buddy]\n"
207 " beqz %[tmp], 1b\n"
208 " nop\n"
209 "2:\n"
210 " .set pop"
211 : [buddy] "+m" (buddy->pte),
212 [tmp] "=&r" (tmp)
213 : [global] "r" (page_global));
214#else /* !CONFIG_SMP */
215 if (pte_none(*buddy))
216 pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
217#endif /* CONFIG_SMP */
218 }
219#endif
220}
221#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
222
223static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
224{
225 htw_stop();
226#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
227 /* Preserve global status for the pair */
228 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
229 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
230 else
231#endif
232 set_pte_at(mm, addr, ptep, __pte(0));
233 htw_start();
234}
235#endif
236
237/*
238 * (pmds are folded into puds so this doesn't get actually called,
239 * but the define is needed for a generic inline function.)
240 */
241#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
242
243#ifndef __PAGETABLE_PMD_FOLDED
244/*
245 * (puds are folded into pgds so this doesn't get actually called,
246 * but the define is needed for a generic inline function.)
247 */
248#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
249#endif
250
251#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
252#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
253#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
254
255/*
256 * We used to declare this array with size but gcc 3.3 and older are not able
257 * to find that this expression is a constant, so the size is dropped.
258 */
259extern pgd_t swapper_pg_dir[];
260
261/*
262 * The following only work if pte_present() is true.
263 * Undefined behaviour if not..
264 */
265#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
266static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
267static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
268static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
269
270static inline pte_t pte_wrprotect(pte_t pte)
271{
272 pte.pte_low &= ~_PAGE_WRITE;
273 pte.pte_high &= ~_PAGE_SILENT_WRITE;
274 return pte;
275}
276
277static inline pte_t pte_mkclean(pte_t pte)
278{
279 pte.pte_low &= ~_PAGE_MODIFIED;
280 pte.pte_high &= ~_PAGE_SILENT_WRITE;
281 return pte;
282}
283
284static inline pte_t pte_mkold(pte_t pte)
285{
286 pte.pte_low &= ~_PAGE_ACCESSED;
287 pte.pte_high &= ~_PAGE_SILENT_READ;
288 return pte;
289}
290
291static inline pte_t pte_mkwrite(pte_t pte)
292{
293 pte.pte_low |= _PAGE_WRITE;
294 if (pte.pte_low & _PAGE_MODIFIED)
295 pte.pte_high |= _PAGE_SILENT_WRITE;
296 return pte;
297}
298
299static inline pte_t pte_mkdirty(pte_t pte)
300{
301 pte.pte_low |= _PAGE_MODIFIED;
302 if (pte.pte_low & _PAGE_WRITE)
303 pte.pte_high |= _PAGE_SILENT_WRITE;
304 return pte;
305}
306
307static inline pte_t pte_mkyoung(pte_t pte)
308{
309 pte.pte_low |= _PAGE_ACCESSED;
310 if (pte.pte_low & _PAGE_READ)
311 pte.pte_high |= _PAGE_SILENT_READ;
312 return pte;
313}
314#else
315static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
316static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
317static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
318
319static inline pte_t pte_wrprotect(pte_t pte)
320{
321 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
322 return pte;
323}
324
325static inline pte_t pte_mkclean(pte_t pte)
326{
327 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
328 return pte;
329}
330
331static inline pte_t pte_mkold(pte_t pte)
332{
333 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
334 return pte;
335}
336
337static inline pte_t pte_mkwrite(pte_t pte)
338{
339 pte_val(pte) |= _PAGE_WRITE;
340 if (pte_val(pte) & _PAGE_MODIFIED)
341 pte_val(pte) |= _PAGE_SILENT_WRITE;
342 return pte;
343}
344
345static inline pte_t pte_mkdirty(pte_t pte)
346{
347 pte_val(pte) |= _PAGE_MODIFIED;
348 if (pte_val(pte) & _PAGE_WRITE)
349 pte_val(pte) |= _PAGE_SILENT_WRITE;
350 return pte;
351}
352
353static inline pte_t pte_mkyoung(pte_t pte)
354{
355 pte_val(pte) |= _PAGE_ACCESSED;
356#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
357 if (!(pte_val(pte) & _PAGE_NO_READ))
358 pte_val(pte) |= _PAGE_SILENT_READ;
359 else
360#endif
361 if (pte_val(pte) & _PAGE_READ)
362 pte_val(pte) |= _PAGE_SILENT_READ;
363 return pte;
364}
365
366#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
367static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
368
369static inline pte_t pte_mkhuge(pte_t pte)
370{
371 pte_val(pte) |= _PAGE_HUGE;
372 return pte;
373}
374#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
375#endif
376static inline int pte_special(pte_t pte) { return 0; }
377static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
378
379/*
380 * Macro to make mark a page protection value as "uncacheable". Note
381 * that "protection" is really a misnomer here as the protection value
382 * contains the memory attribute bits, dirty bits, and various other
383 * bits as well.
384 */
385#define pgprot_noncached pgprot_noncached
386
387static inline pgprot_t pgprot_noncached(pgprot_t _prot)
388{
389 unsigned long prot = pgprot_val(_prot);
390
391 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
392
393 return __pgprot(prot);
394}
395
396#define pgprot_writecombine pgprot_writecombine
397
398static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
399{
400 unsigned long prot = pgprot_val(_prot);
401
402 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
403 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
404
405 return __pgprot(prot);
406}
407
408/*
409 * Conversion functions: convert a page and protection to a page entry,
410 * and a page entry and page directory to the page they refer to.
411 */
412#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
413
414#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
415static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
416{
417 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
418 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
419 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
420 pte.pte_high |= pgprot_val(newprot) & ~_PFN_MASK;
421 return pte;
422}
423#else
424static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
425{
426 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
427}
428#endif
429
430
431extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
432 pte_t pte);
433extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
434 pte_t pte);
435
436static inline void update_mmu_cache(struct vm_area_struct *vma,
437 unsigned long address, pte_t *ptep)
438{
439 pte_t pte = *ptep;
440 __update_tlb(vma, address, pte);
441 __update_cache(vma, address, pte);
442}
443
444static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
445 unsigned long address, pmd_t *pmdp)
446{
447 pte_t pte = *(pte_t *)pmdp;
448
449 __update_tlb(vma, address, pte);
450}
451
452#define kern_addr_valid(addr) (1)
453
454#ifdef CONFIG_PHYS_ADDR_T_64BIT
455extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
456
457static inline int io_remap_pfn_range(struct vm_area_struct *vma,
458 unsigned long vaddr,
459 unsigned long pfn,
460 unsigned long size,
461 pgprot_t prot)
462{
463 phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
464 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
465}
466#define io_remap_pfn_range io_remap_pfn_range
467#endif
468
469#ifdef CONFIG_TRANSPARENT_HUGEPAGE
470
471extern int has_transparent_hugepage(void);
472
473static inline int pmd_trans_huge(pmd_t pmd)
474{
475 return !!(pmd_val(pmd) & _PAGE_HUGE);
476}
477
478static inline pmd_t pmd_mkhuge(pmd_t pmd)
479{
480 pmd_val(pmd) |= _PAGE_HUGE;
481
482 return pmd;
483}
484
485extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
486 pmd_t *pmdp, pmd_t pmd);
487
488#define __HAVE_ARCH_PMD_WRITE
489static inline int pmd_write(pmd_t pmd)
490{
491 return !!(pmd_val(pmd) & _PAGE_WRITE);
492}
493
494static inline pmd_t pmd_wrprotect(pmd_t pmd)
495{
496 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
497 return pmd;
498}
499
500static inline pmd_t pmd_mkwrite(pmd_t pmd)
501{
502 pmd_val(pmd) |= _PAGE_WRITE;
503 if (pmd_val(pmd) & _PAGE_MODIFIED)
504 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
505
506 return pmd;
507}
508
509static inline int pmd_dirty(pmd_t pmd)
510{
511 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
512}
513
514static inline pmd_t pmd_mkclean(pmd_t pmd)
515{
516 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
517 return pmd;
518}
519
520static inline pmd_t pmd_mkdirty(pmd_t pmd)
521{
522 pmd_val(pmd) |= _PAGE_MODIFIED;
523 if (pmd_val(pmd) & _PAGE_WRITE)
524 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
525
526 return pmd;
527}
528
529static inline int pmd_young(pmd_t pmd)
530{
531 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
532}
533
534static inline pmd_t pmd_mkold(pmd_t pmd)
535{
536 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
537
538 return pmd;
539}
540
541static inline pmd_t pmd_mkyoung(pmd_t pmd)
542{
543 pmd_val(pmd) |= _PAGE_ACCESSED;
544
545#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
546 if (!(pmd_val(pmd) & _PAGE_NO_READ))
547 pmd_val(pmd) |= _PAGE_SILENT_READ;
548 else
549#endif
550 if (pmd_val(pmd) & _PAGE_READ)
551 pmd_val(pmd) |= _PAGE_SILENT_READ;
552
553 return pmd;
554}
555
556/* Extern to avoid header file madness */
557extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
558
559static inline unsigned long pmd_pfn(pmd_t pmd)
560{
561 return pmd_val(pmd) >> _PFN_SHIFT;
562}
563
564static inline struct page *pmd_page(pmd_t pmd)
565{
566 if (pmd_trans_huge(pmd))
567 return pfn_to_page(pmd_pfn(pmd));
568
569 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
570}
571
572static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
573{
574 pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | pgprot_val(newprot);
575 return pmd;
576}
577
578static inline pmd_t pmd_mknotpresent(pmd_t pmd)
579{
580 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
581
582 return pmd;
583}
584
585/*
586 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
587 * different prototype.
588 */
589#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
590static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
591 unsigned long address, pmd_t *pmdp)
592{
593 pmd_t old = *pmdp;
594
595 pmd_clear(pmdp);
596
597 return old;
598}
599
600#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
601
602#include <asm-generic/pgtable.h>
603
604/*
605 * uncached accelerated TLB map for video memory access
606 */
607#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
608#define __HAVE_PHYS_MEM_ACCESS_PROT
609
610struct file;
611pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
612 unsigned long size, pgprot_t vma_prot);
613int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
614 unsigned long size, pgprot_t *vma_prot);
615#endif
616
617/*
618 * We provide our own get_unmapped area to cope with the virtual aliasing
619 * constraints placed on us by the cache architecture.
620 */
621#define HAVE_ARCH_UNMAPPED_AREA
622#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
623
624/*
625 * No page table caches to initialise
626 */
627#define pgtable_cache_init() do { } while (0)
628
629#endif /* _ASM_PGTABLE_H */