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1// SPDX-License-Identifier: GPL-2.0
2#include "qcom-ipq8064-v1.0.dtsi"
3
4/ {
5 model = "Qualcomm IPQ8064/AP148";
6 compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
7
8 aliases {
9 serial0 = &gsbi4_serial;
10 };
11
12 chosen {
13 stdout-path = "serial0:115200n8";
14 };
15
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 ranges;
20 rsvd@41200000 {
21 reg = <0x41200000 0x300000>;
22 no-map;
23 };
24 };
25
26 soc {
27 pinmux@800000 {
28 i2c4_pins: i2c4_pinmux {
29 pins = "gpio12", "gpio13";
30 function = "gsbi4";
31 bias-disable;
32 };
33
34 spi_pins: spi_pins {
35 mux {
36 pins = "gpio18", "gpio19", "gpio21";
37 function = "gsbi5";
38 drive-strength = <10>;
39 bias-none;
40 };
41 };
42 };
43
44 gsbi@16300000 {
45 qcom,mode = <GSBI_PROT_I2C_UART>;
46 status = "ok";
47 serial@16340000 {
48 status = "ok";
49 };
50
51 i2c4: i2c@16380000 {
52 status = "ok";
53
54 clock-frequency = <200000>;
55
56 pinctrl-0 = <&i2c4_pins>;
57 pinctrl-names = "default";
58 };
59 };
60
61 gsbi5: gsbi@1a200000 {
62 qcom,mode = <GSBI_PROT_SPI>;
63 status = "ok";
64
65 spi4: spi@1a280000 {
66 status = "ok";
67 spi-max-frequency = <50000000>;
68
69 pinctrl-0 = <&spi_pins>;
70 pinctrl-names = "default";
71
72 cs-gpios = <&qcom_pinmux 20 0>;
73
74 flash: m25p80@0 {
75 compatible = "s25fl256s1";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 spi-max-frequency = <50000000>;
79 reg = <0>;
80
81 partition@0 {
82 label = "rootfs";
83 reg = <0x0 0x1000000>;
84 };
85
86 partition@1 {
87 label = "scratch";
88 reg = <0x1000000 0x1000000>;
89 };
90 };
91 };
92 };
93
94 sata-phy@1b400000 {
95 status = "ok";
96 };
97
98 sata@29000000 {
99 ports-implemented = <0x1>;
100 status = "ok";
101 };
102 };
103};
1#include "qcom-ipq8064-v1.0.dtsi"
2
3/ {
4 model = "Qualcomm IPQ8064/AP148";
5 compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
6
7 aliases {
8 serial0 = &gsbi4_serial;
9 };
10
11 chosen {
12 stdout-path = "serial0:115200n8";
13 };
14
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 ranges;
19 rsvd@41200000 {
20 reg = <0x41200000 0x300000>;
21 no-map;
22 };
23 };
24
25 soc {
26 pinmux@800000 {
27 i2c4_pins: i2c4_pinmux {
28 pins = "gpio12", "gpio13";
29 function = "gsbi4";
30 bias-disable;
31 };
32
33 spi_pins: spi_pins {
34 mux {
35 pins = "gpio18", "gpio19", "gpio21";
36 function = "gsbi5";
37 drive-strength = <10>;
38 bias-none;
39 };
40 };
41 };
42
43 gsbi@16300000 {
44 qcom,mode = <GSBI_PROT_I2C_UART>;
45 status = "ok";
46 serial@16340000 {
47 status = "ok";
48 };
49
50 i2c4: i2c@16380000 {
51 status = "ok";
52
53 clock-frequency = <200000>;
54
55 pinctrl-0 = <&i2c4_pins>;
56 pinctrl-names = "default";
57 };
58 };
59
60 gsbi5: gsbi@1a200000 {
61 qcom,mode = <GSBI_PROT_SPI>;
62 status = "ok";
63
64 spi4: spi@1a280000 {
65 status = "ok";
66 spi-max-frequency = <50000000>;
67
68 pinctrl-0 = <&spi_pins>;
69 pinctrl-names = "default";
70
71 cs-gpios = <&qcom_pinmux 20 0>;
72
73 flash: m25p80@0 {
74 compatible = "s25fl256s1";
75 #address-cells = <1>;
76 #size-cells = <1>;
77 spi-max-frequency = <50000000>;
78 reg = <0>;
79
80 partition@0 {
81 label = "rootfs";
82 reg = <0x0 0x1000000>;
83 };
84
85 partition@1 {
86 label = "scratch";
87 reg = <0x1000000 0x1000000>;
88 };
89 };
90 };
91 };
92
93 sata-phy@1b400000 {
94 status = "ok";
95 };
96
97 sata@29000000 {
98 status = "ok";
99 };
100 };
101};