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1/*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pinctrl/dm814x.h>
9
10/ {
11 compatible = "ti,dm814";
12 interrupt-parent = <&intc>;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 chosen { };
16
17 aliases {
18 i2c0 = &i2c1;
19 i2c1 = &i2c2;
20 serial0 = &uart1;
21 serial1 = &uart2;
22 serial2 = &uart3;
23 ethernet0 = &cpsw_emac0;
24 ethernet1 = &cpsw_emac1;
25 usb0 = &usb0;
26 usb1 = &usb1;
27 phy0 = &usb0_phy;
28 phy1 = &usb1_phy;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34 cpu@0 {
35 compatible = "arm,cortex-a8";
36 device_type = "cpu";
37 reg = <0>;
38 };
39 };
40
41 pmu {
42 compatible = "arm,cortex-a8-pmu";
43 interrupts = <3>;
44 };
45
46 /*
47 * The soc node represents the soc top level view. It is used for IPs
48 * that are not memory mapped in the MPU view or for the MPU itself.
49 */
50 soc {
51 compatible = "ti,omap-infra";
52 mpu {
53 compatible = "ti,omap3-mpu";
54 ti,hwmods = "mpu";
55 };
56 };
57
58 ocp {
59 compatible = "simple-bus";
60 #address-cells = <1>;
61 #size-cells = <1>;
62 ranges;
63 ti,hwmods = "l3_main";
64
65 usb: usb@47400000 {
66 compatible = "ti,am33xx-usb";
67 reg = <0x47400000 0x1000>;
68 ranges;
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ti,hwmods = "usb_otg_hs";
72
73 usb0_phy: usb-phy@47401300 {
74 compatible = "ti,am335x-usb-phy";
75 reg = <0x47401300 0x100>;
76 reg-names = "phy";
77 ti,ctrl_mod = <&usb_ctrl_mod>;
78 #phy-cells = <0>;
79 };
80
81 usb0: usb@47401000 {
82 compatible = "ti,musb-am33xx";
83 reg = <0x47401400 0x400
84 0x47401000 0x200>;
85 reg-names = "mc", "control";
86
87 interrupts = <18>;
88 interrupt-names = "mc";
89 dr_mode = "otg";
90 mentor,multipoint = <1>;
91 mentor,num-eps = <16>;
92 mentor,ram-bits = <12>;
93 mentor,power = <500>;
94 phys = <&usb0_phy>;
95
96 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
97 &cppi41dma 2 0 &cppi41dma 3 0
98 &cppi41dma 4 0 &cppi41dma 5 0
99 &cppi41dma 6 0 &cppi41dma 7 0
100 &cppi41dma 8 0 &cppi41dma 9 0
101 &cppi41dma 10 0 &cppi41dma 11 0
102 &cppi41dma 12 0 &cppi41dma 13 0
103 &cppi41dma 14 0 &cppi41dma 0 1
104 &cppi41dma 1 1 &cppi41dma 2 1
105 &cppi41dma 3 1 &cppi41dma 4 1
106 &cppi41dma 5 1 &cppi41dma 6 1
107 &cppi41dma 7 1 &cppi41dma 8 1
108 &cppi41dma 9 1 &cppi41dma 10 1
109 &cppi41dma 11 1 &cppi41dma 12 1
110 &cppi41dma 13 1 &cppi41dma 14 1>;
111 dma-names =
112 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
113 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
114 "rx14", "rx15",
115 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
116 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
117 "tx14", "tx15";
118 };
119
120 usb1: usb@47401800 {
121 compatible = "ti,musb-am33xx";
122 reg = <0x47401c00 0x400
123 0x47401800 0x200>;
124 reg-names = "mc", "control";
125 interrupts = <19>;
126 interrupt-names = "mc";
127 dr_mode = "otg";
128 mentor,multipoint = <1>;
129 mentor,num-eps = <16>;
130 mentor,ram-bits = <12>;
131 mentor,power = <500>;
132 phys = <&usb1_phy>;
133
134 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
135 &cppi41dma 17 0 &cppi41dma 18 0
136 &cppi41dma 19 0 &cppi41dma 20 0
137 &cppi41dma 21 0 &cppi41dma 22 0
138 &cppi41dma 23 0 &cppi41dma 24 0
139 &cppi41dma 25 0 &cppi41dma 26 0
140 &cppi41dma 27 0 &cppi41dma 28 0
141 &cppi41dma 29 0 &cppi41dma 15 1
142 &cppi41dma 16 1 &cppi41dma 17 1
143 &cppi41dma 18 1 &cppi41dma 19 1
144 &cppi41dma 20 1 &cppi41dma 21 1
145 &cppi41dma 22 1 &cppi41dma 23 1
146 &cppi41dma 24 1 &cppi41dma 25 1
147 &cppi41dma 26 1 &cppi41dma 27 1
148 &cppi41dma 28 1 &cppi41dma 29 1>;
149 dma-names =
150 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
151 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
152 "rx14", "rx15",
153 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
154 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
155 "tx14", "tx15";
156 };
157
158 cppi41dma: dma-controller@47402000 {
159 compatible = "ti,am3359-cppi41";
160 reg = <0x47400000 0x1000
161 0x47402000 0x1000
162 0x47403000 0x1000
163 0x47404000 0x4000>;
164 reg-names = "glue", "controller", "scheduler", "queuemgr";
165 interrupts = <17>;
166 interrupt-names = "glue";
167 #dma-cells = <2>;
168 #dma-channels = <30>;
169 #dma-requests = <256>;
170 };
171 };
172
173 /*
174 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
175 * It shows the module target agent registers though, so the
176 * actual device is typically 0x1000 before the target agent
177 * except in cases where the module is larger than 0x1000.
178 */
179 l4ls: l4ls@48000000 {
180 compatible = "ti,dm814-l4ls", "simple-bus";
181 #address-cells = <1>;
182 #size-cells = <1>;
183 ranges = <0 0x48000000 0x2000000>;
184
185 i2c1: i2c@28000 {
186 compatible = "ti,omap4-i2c";
187 #address-cells = <1>;
188 #size-cells = <0>;
189 ti,hwmods = "i2c1";
190 reg = <0x28000 0x1000>;
191 interrupts = <70>;
192 };
193
194 elm: elm@80000 {
195 compatible = "ti,814-elm";
196 ti,hwmods = "elm";
197 reg = <0x80000 0x2000>;
198 interrupts = <4>;
199 };
200
201 gpio1: gpio@32000 {
202 compatible = "ti,omap4-gpio";
203 ti,hwmods = "gpio1";
204 ti,gpio-always-on;
205 reg = <0x32000 0x2000>;
206 interrupts = <96>;
207 gpio-controller;
208 #gpio-cells = <2>;
209 interrupt-controller;
210 #interrupt-cells = <2>;
211 };
212
213 gpio2: gpio@4c000 {
214 compatible = "ti,omap4-gpio";
215 ti,hwmods = "gpio2";
216 ti,gpio-always-on;
217 reg = <0x4c000 0x2000>;
218 interrupts = <98>;
219 gpio-controller;
220 #gpio-cells = <2>;
221 interrupt-controller;
222 #interrupt-cells = <2>;
223 };
224
225 i2c2: i2c@2a000 {
226 compatible = "ti,omap4-i2c";
227 #address-cells = <1>;
228 #size-cells = <0>;
229 ti,hwmods = "i2c2";
230 reg = <0x2a000 0x1000>;
231 interrupts = <71>;
232 };
233
234 mcspi1: spi@30000 {
235 compatible = "ti,omap4-mcspi";
236 reg = <0x30000 0x1000>;
237 #address-cells = <1>;
238 #size-cells = <0>;
239 interrupts = <65>;
240 ti,spi-num-cs = <4>;
241 ti,hwmods = "mcspi1";
242 dmas = <&edma 16 0 &edma 17 0
243 &edma 18 0 &edma 19 0>;
244 dma-names = "tx0", "rx0", "tx1", "rx1";
245 };
246
247 timer1: timer@2e000 {
248 compatible = "ti,dm814-timer";
249 reg = <0x2e000 0x2000>;
250 interrupts = <67>;
251 ti,hwmods = "timer1";
252 ti,timer-alwon;
253 clocks = <&timer1_fck>;
254 clock-names = "fck";
255 };
256
257 uart1: uart@20000 {
258 compatible = "ti,am3352-uart", "ti,omap3-uart";
259 ti,hwmods = "uart1";
260 reg = <0x20000 0x2000>;
261 clock-frequency = <48000000>;
262 interrupts = <72>;
263 dmas = <&edma 26 0 &edma 27 0>;
264 dma-names = "tx", "rx";
265 };
266
267 uart2: uart@22000 {
268 compatible = "ti,am3352-uart", "ti,omap3-uart";
269 ti,hwmods = "uart2";
270 reg = <0x22000 0x2000>;
271 clock-frequency = <48000000>;
272 interrupts = <73>;
273 dmas = <&edma 28 0 &edma 29 0>;
274 dma-names = "tx", "rx";
275 };
276
277 uart3: uart@24000 {
278 compatible = "ti,am3352-uart", "ti,omap3-uart";
279 ti,hwmods = "uart3";
280 reg = <0x24000 0x2000>;
281 clock-frequency = <48000000>;
282 interrupts = <74>;
283 dmas = <&edma 30 0 &edma 31 0>;
284 dma-names = "tx", "rx";
285 };
286
287 timer2: timer@40000 {
288 compatible = "ti,dm814-timer";
289 reg = <0x40000 0x2000>;
290 interrupts = <68>;
291 ti,hwmods = "timer2";
292 clocks = <&timer2_fck>;
293 clock-names = "fck";
294 };
295
296 timer3: timer@42000 {
297 compatible = "ti,dm814-timer";
298 reg = <0x42000 0x2000>;
299 interrupts = <69>;
300 ti,hwmods = "timer3";
301 };
302
303 mmc1: mmc@60000 {
304 compatible = "ti,omap4-hsmmc";
305 ti,hwmods = "mmc1";
306 dmas = <&edma 24 0
307 &edma 25 0>;
308 dma-names = "tx", "rx";
309 interrupts = <64>;
310 interrupt-parent = <&intc>;
311 reg = <0x60000 0x1000>;
312 };
313
314 rtc: rtc@c0000 {
315 compatible = "ti,am3352-rtc", "ti,da830-rtc";
316 reg = <0xc0000 0x1000>;
317 interrupts = <75 76>;
318 ti,hwmods = "rtc";
319 };
320
321 mmc2: mmc@1d8000 {
322 compatible = "ti,omap4-hsmmc";
323 ti,hwmods = "mmc2";
324 dmas = <&edma 2 0
325 &edma 3 0>;
326 dma-names = "tx", "rx";
327 interrupts = <28>;
328 interrupt-parent = <&intc>;
329 reg = <0x1d8000 0x1000>;
330 };
331
332 control: control@140000 {
333 compatible = "ti,dm814-scm", "simple-bus";
334 reg = <0x140000 0x20000>;
335 #address-cells = <1>;
336 #size-cells = <1>;
337 ranges = <0 0x140000 0x20000>;
338
339 scm_conf: scm_conf@0 {
340 compatible = "syscon", "simple-bus";
341 reg = <0x0 0x800>;
342 #address-cells = <1>;
343 #size-cells = <1>;
344 ranges = <0 0 0x800>;
345
346 scm_clocks: clocks {
347 #address-cells = <1>;
348 #size-cells = <0>;
349 };
350
351 scm_clockdomains: clockdomains {
352 };
353 };
354
355 usb_ctrl_mod: control@620 {
356 compatible = "ti,am335x-usb-ctrl-module";
357 reg = <0x620 0x10
358 0x648 0x4>;
359 reg-names = "phy_ctrl", "wakeup";
360 };
361
362 edma_xbar: dma-router@f90 {
363 compatible = "ti,am335x-edma-crossbar";
364 reg = <0xf90 0x40>;
365 #dma-cells = <3>;
366 dma-requests = <32>;
367 dma-masters = <&edma>;
368 };
369
370 /*
371 * Note that silicon revision 2.1 and older
372 * require input enabled (bit 18 set) for all
373 * 3.3V I/Os to avoid cumulative hardware damage.
374 * For more info, see errata advisory 2.1.87.
375 * We leave bit 18 out of function-mask and rely
376 * on the bootloader for it.
377 */
378 pincntl: pinmux@800 {
379 compatible = "pinctrl-single";
380 reg = <0x800 0x438>;
381 #address-cells = <1>;
382 #size-cells = <0>;
383 #pinctrl-cells = <1>;
384 pinctrl-single,register-width = <32>;
385 pinctrl-single,function-mask = <0x307ff>;
386 };
387
388 usb1_phy: usb-phy@1b00 {
389 compatible = "ti,am335x-usb-phy";
390 reg = <0x1b00 0x100>;
391 reg-names = "phy";
392 ti,ctrl_mod = <&usb_ctrl_mod>;
393 #phy-cells = <0>;
394 };
395 };
396
397 prcm: prcm@180000 {
398 compatible = "ti,dm814-prcm", "simple-bus";
399 reg = <0x180000 0x2000>;
400 #address-cells = <1>;
401 #size-cells = <1>;
402 ranges = <0 0x180000 0x2000>;
403
404 prcm_clocks: clocks {
405 #address-cells = <1>;
406 #size-cells = <0>;
407 };
408
409 prcm_clockdomains: clockdomains {
410 };
411 };
412
413 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
414 pllss: pllss@1c5000 {
415 compatible = "ti,dm814-pllss", "simple-bus";
416 reg = <0x1c5000 0x1000>;
417 #address-cells = <1>;
418 #size-cells = <1>;
419 ranges = <0 0x1c5000 0x1000>;
420
421 pllss_clocks: clocks {
422 #address-cells = <1>;
423 #size-cells = <0>;
424 };
425
426 pllss_clockdomains: clockdomains {
427 };
428 };
429
430 wdt1: wdt@1c7000 {
431 compatible = "ti,omap3-wdt";
432 ti,hwmods = "wd_timer";
433 reg = <0x1c7000 0x1000>;
434 interrupts = <91>;
435 };
436 };
437
438 intc: interrupt-controller@48200000 {
439 compatible = "ti,dm814-intc";
440 interrupt-controller;
441 #interrupt-cells = <1>;
442 reg = <0x48200000 0x1000>;
443 };
444
445 /* Board must configure evtmux with edma_xbar for EDMA */
446 mmc3: mmc@47810000 {
447 compatible = "ti,omap4-hsmmc";
448 ti,hwmods = "mmc3";
449 interrupts = <29>;
450 interrupt-parent = <&intc>;
451 reg = <0x47810000 0x1000>;
452 };
453
454 edma: edma@49000000 {
455 compatible = "ti,edma3-tpcc";
456 ti,hwmods = "tpcc";
457 reg = <0x49000000 0x10000>;
458 reg-names = "edma3_cc";
459 interrupts = <12 13 14>;
460 interrupt-names = "edma3_ccint", "edma3_mperr",
461 "edma3_ccerrint";
462 dma-requests = <64>;
463 #dma-cells = <2>;
464
465 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
466 <&edma_tptc2 3>, <&edma_tptc3 0>;
467
468 ti,edma-memcpy-channels = <20 21>;
469 };
470
471 edma_tptc0: tptc@49800000 {
472 compatible = "ti,edma3-tptc";
473 ti,hwmods = "tptc0";
474 reg = <0x49800000 0x100000>;
475 interrupts = <112>;
476 interrupt-names = "edma3_tcerrint";
477 };
478
479 edma_tptc1: tptc@49900000 {
480 compatible = "ti,edma3-tptc";
481 ti,hwmods = "tptc1";
482 reg = <0x49900000 0x100000>;
483 interrupts = <113>;
484 interrupt-names = "edma3_tcerrint";
485 };
486
487 edma_tptc2: tptc@49a00000 {
488 compatible = "ti,edma3-tptc";
489 ti,hwmods = "tptc2";
490 reg = <0x49a00000 0x100000>;
491 interrupts = <114>;
492 interrupt-names = "edma3_tcerrint";
493 };
494
495 edma_tptc3: tptc@49b00000 {
496 compatible = "ti,edma3-tptc";
497 ti,hwmods = "tptc3";
498 reg = <0x49b00000 0x100000>;
499 interrupts = <115>;
500 interrupt-names = "edma3_tcerrint";
501 };
502
503 /* See TRM "Table 1-318. L4HS Instance Summary" */
504 l4hs: l4hs@4a000000 {
505 compatible = "ti,dm814-l4hs", "simple-bus";
506 #address-cells = <1>;
507 #size-cells = <1>;
508 ranges = <0 0x4a000000 0x1b4040>;
509 };
510
511 /* REVISIT: Move to live under l4hs once driver is fixed */
512 mac: ethernet@4a100000 {
513 compatible = "ti,cpsw";
514 ti,hwmods = "cpgmac0";
515 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
516 clock-names = "fck", "cpts";
517 cpdma_channels = <8>;
518 ale_entries = <1024>;
519 bd_ram_size = <0x2000>;
520 mac_control = <0x20>;
521 slaves = <2>;
522 active_slave = <0>;
523 cpts_clock_mult = <0x80000000>;
524 cpts_clock_shift = <29>;
525 reg = <0x4a100000 0x800
526 0x4a100900 0x100>;
527 #address-cells = <1>;
528 #size-cells = <1>;
529 interrupt-parent = <&intc>;
530 /*
531 * c0_rx_thresh_pend
532 * c0_rx_pend
533 * c0_tx_pend
534 * c0_misc_pend
535 */
536 interrupts = <40 41 42 43>;
537 ranges;
538 syscon = <&scm_conf>;
539
540 davinci_mdio: mdio@4a100800 {
541 compatible = "ti,davinci_mdio";
542 #address-cells = <1>;
543 #size-cells = <0>;
544 ti,hwmods = "davinci_mdio";
545 bus_freq = <1000000>;
546 reg = <0x4a100800 0x100>;
547 };
548
549 cpsw_emac0: slave@4a100200 {
550 /* Filled in by U-Boot */
551 mac-address = [ 00 00 00 00 00 00 ];
552 };
553
554 cpsw_emac1: slave@4a100300 {
555 /* Filled in by U-Boot */
556 mac-address = [ 00 00 00 00 00 00 ];
557 };
558
559 phy_sel: cpsw-phy-sel@48140650 {
560 compatible = "ti,am3352-cpsw-phy-sel";
561 reg= <0x48140650 0x4>;
562 reg-names = "gmii-sel";
563 };
564 };
565
566 gpmc: gpmc@50000000 {
567 compatible = "ti,am3352-gpmc";
568 ti,hwmods = "gpmc";
569 ti,no-idle-on-init;
570 reg = <0x50000000 0x2000>;
571 interrupts = <100>;
572 gpmc,num-cs = <7>;
573 gpmc,num-waitpins = <2>;
574 #address-cells = <2>;
575 #size-cells = <1>;
576 interrupt-controller;
577 #interrupt-cells = <2>;
578 gpio-controller;
579 #gpio-cells = <2>;
580 };
581 };
582};
583
584#include "dm814x-clocks.dtsi"
1/*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pinctrl/dm814x.h>
9
10#include "skeleton.dtsi"
11
12/ {
13 compatible = "ti,dm814";
14 interrupt-parent = <&intc>;
15
16 aliases {
17 i2c0 = &i2c1;
18 i2c1 = &i2c2;
19 serial0 = &uart1;
20 serial1 = &uart2;
21 serial2 = &uart3;
22 ethernet0 = &cpsw_emac0;
23 ethernet1 = &cpsw_emac1;
24 usb0 = &usb0;
25 usb1 = &usb1;
26 phy0 = &usb0_phy;
27 phy1 = &usb1_phy;
28 };
29
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33 cpu@0 {
34 compatible = "arm,cortex-a8";
35 device_type = "cpu";
36 reg = <0>;
37 };
38 };
39
40 pmu {
41 compatible = "arm,cortex-a8-pmu";
42 interrupts = <3>;
43 };
44
45 /*
46 * The soc node represents the soc top level view. It is used for IPs
47 * that are not memory mapped in the MPU view or for the MPU itself.
48 */
49 soc {
50 compatible = "ti,omap-infra";
51 mpu {
52 compatible = "ti,omap3-mpu";
53 ti,hwmods = "mpu";
54 };
55 };
56
57 ocp {
58 compatible = "simple-bus";
59 #address-cells = <1>;
60 #size-cells = <1>;
61 ranges;
62 ti,hwmods = "l3_main";
63
64 usb: usb@47400000 {
65 compatible = "ti,am33xx-usb";
66 reg = <0x47400000 0x1000>;
67 ranges;
68 #address-cells = <1>;
69 #size-cells = <1>;
70 ti,hwmods = "usb_otg_hs";
71
72 usb0_phy: usb-phy@47401300 {
73 compatible = "ti,am335x-usb-phy";
74 reg = <0x47401300 0x100>;
75 reg-names = "phy";
76 ti,ctrl_mod = <&usb_ctrl_mod>;
77 };
78
79 usb0: usb@47401000 {
80 compatible = "ti,musb-am33xx";
81 reg = <0x47401400 0x400
82 0x47401000 0x200>;
83 reg-names = "mc", "control";
84
85 interrupts = <18>;
86 interrupt-names = "mc";
87 dr_mode = "otg";
88 mentor,multipoint = <1>;
89 mentor,num-eps = <16>;
90 mentor,ram-bits = <12>;
91 mentor,power = <500>;
92 phys = <&usb0_phy>;
93
94 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
95 &cppi41dma 2 0 &cppi41dma 3 0
96 &cppi41dma 4 0 &cppi41dma 5 0
97 &cppi41dma 6 0 &cppi41dma 7 0
98 &cppi41dma 8 0 &cppi41dma 9 0
99 &cppi41dma 10 0 &cppi41dma 11 0
100 &cppi41dma 12 0 &cppi41dma 13 0
101 &cppi41dma 14 0 &cppi41dma 0 1
102 &cppi41dma 1 1 &cppi41dma 2 1
103 &cppi41dma 3 1 &cppi41dma 4 1
104 &cppi41dma 5 1 &cppi41dma 6 1
105 &cppi41dma 7 1 &cppi41dma 8 1
106 &cppi41dma 9 1 &cppi41dma 10 1
107 &cppi41dma 11 1 &cppi41dma 12 1
108 &cppi41dma 13 1 &cppi41dma 14 1>;
109 dma-names =
110 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
111 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
112 "rx14", "rx15",
113 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
114 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
115 "tx14", "tx15";
116 };
117
118 usb1: usb@47401800 {
119 compatible = "ti,musb-am33xx";
120 reg = <0x47401c00 0x400
121 0x47401800 0x200>;
122 reg-names = "mc", "control";
123 interrupts = <19>;
124 interrupt-names = "mc";
125 dr_mode = "otg";
126 mentor,multipoint = <1>;
127 mentor,num-eps = <16>;
128 mentor,ram-bits = <12>;
129 mentor,power = <500>;
130 phys = <&usb1_phy>;
131
132 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
133 &cppi41dma 17 0 &cppi41dma 18 0
134 &cppi41dma 19 0 &cppi41dma 20 0
135 &cppi41dma 21 0 &cppi41dma 22 0
136 &cppi41dma 23 0 &cppi41dma 24 0
137 &cppi41dma 25 0 &cppi41dma 26 0
138 &cppi41dma 27 0 &cppi41dma 28 0
139 &cppi41dma 29 0 &cppi41dma 15 1
140 &cppi41dma 16 1 &cppi41dma 17 1
141 &cppi41dma 18 1 &cppi41dma 19 1
142 &cppi41dma 20 1 &cppi41dma 21 1
143 &cppi41dma 22 1 &cppi41dma 23 1
144 &cppi41dma 24 1 &cppi41dma 25 1
145 &cppi41dma 26 1 &cppi41dma 27 1
146 &cppi41dma 28 1 &cppi41dma 29 1>;
147 dma-names =
148 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
149 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
150 "rx14", "rx15",
151 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
152 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
153 "tx14", "tx15";
154 };
155
156 cppi41dma: dma-controller@47402000 {
157 compatible = "ti,am3359-cppi41";
158 reg = <0x47400000 0x1000
159 0x47402000 0x1000
160 0x47403000 0x1000
161 0x47404000 0x4000>;
162 reg-names = "glue", "controller", "scheduler", "queuemgr";
163 interrupts = <17>;
164 interrupt-names = "glue";
165 #dma-cells = <2>;
166 #dma-channels = <30>;
167 #dma-requests = <256>;
168 };
169 };
170
171 /*
172 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
173 * It shows the module target agent registers though, so the
174 * actual device is typically 0x1000 before the target agent
175 * except in cases where the module is larger than 0x1000.
176 */
177 l4ls: l4ls@48000000 {
178 compatible = "ti,dm814-l4ls", "simple-bus";
179 #address-cells = <1>;
180 #size-cells = <1>;
181 ranges = <0 0x48000000 0x2000000>;
182
183 i2c1: i2c@28000 {
184 compatible = "ti,omap4-i2c";
185 #address-cells = <1>;
186 #size-cells = <0>;
187 ti,hwmods = "i2c1";
188 reg = <0x28000 0x1000>;
189 interrupts = <70>;
190 };
191
192 elm: elm@80000 {
193 compatible = "ti,814-elm";
194 ti,hwmods = "elm";
195 reg = <0x80000 0x2000>;
196 interrupts = <4>;
197 };
198
199 gpio1: gpio@32000 {
200 compatible = "ti,omap4-gpio";
201 ti,hwmods = "gpio1";
202 ti,gpio-always-on;
203 reg = <0x32000 0x2000>;
204 interrupts = <96>;
205 gpio-controller;
206 #gpio-cells = <2>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
209 };
210
211 gpio2: gpio@4c000 {
212 compatible = "ti,omap4-gpio";
213 ti,hwmods = "gpio2";
214 ti,gpio-always-on;
215 reg = <0x4c000 0x2000>;
216 interrupts = <98>;
217 gpio-controller;
218 #gpio-cells = <2>;
219 interrupt-controller;
220 #interrupt-cells = <2>;
221 };
222
223 i2c2: i2c@2a000 {
224 compatible = "ti,omap4-i2c";
225 #address-cells = <1>;
226 #size-cells = <0>;
227 ti,hwmods = "i2c2";
228 reg = <0x2a000 0x1000>;
229 interrupts = <71>;
230 };
231
232 mcspi1: spi@30000 {
233 compatible = "ti,omap4-mcspi";
234 reg = <0x30000 0x1000>;
235 #address-cells = <1>;
236 #size-cells = <0>;
237 interrupts = <65>;
238 ti,spi-num-cs = <4>;
239 ti,hwmods = "mcspi1";
240 dmas = <&edma 16 0 &edma 17 0
241 &edma 18 0 &edma 19 0>;
242 dma-names = "tx0", "rx0", "tx1", "rx1";
243 };
244
245 timer1: timer@2e000 {
246 compatible = "ti,dm814-timer";
247 reg = <0x2e000 0x2000>;
248 interrupts = <67>;
249 ti,hwmods = "timer1";
250 ti,timer-alwon;
251 };
252
253 uart1: uart@20000 {
254 compatible = "ti,omap3-uart";
255 ti,hwmods = "uart1";
256 reg = <0x20000 0x2000>;
257 clock-frequency = <48000000>;
258 interrupts = <72>;
259 dmas = <&edma 26 0 &edma 27 0>;
260 dma-names = "tx", "rx";
261 };
262
263 uart2: uart@22000 {
264 compatible = "ti,omap3-uart";
265 ti,hwmods = "uart2";
266 reg = <0x22000 0x2000>;
267 clock-frequency = <48000000>;
268 interrupts = <73>;
269 dmas = <&edma 28 0 &edma 29 0>;
270 dma-names = "tx", "rx";
271 };
272
273 uart3: uart@24000 {
274 compatible = "ti,omap3-uart";
275 ti,hwmods = "uart3";
276 reg = <0x24000 0x2000>;
277 clock-frequency = <48000000>;
278 interrupts = <74>;
279 dmas = <&edma 30 0 &edma 31 0>;
280 dma-names = "tx", "rx";
281 };
282
283 timer2: timer@40000 {
284 compatible = "ti,dm814-timer";
285 reg = <0x40000 0x2000>;
286 interrupts = <68>;
287 ti,hwmods = "timer2";
288 };
289
290 timer3: timer@42000 {
291 compatible = "ti,dm814-timer";
292 reg = <0x42000 0x2000>;
293 interrupts = <69>;
294 ti,hwmods = "timer3";
295 };
296
297 mmc1: mmc@60000 {
298 compatible = "ti,omap4-hsmmc";
299 ti,hwmods = "mmc1";
300 dmas = <&edma 24 0
301 &edma 25 0>;
302 dma-names = "tx", "rx";
303 interrupts = <64>;
304 interrupt-parent = <&intc>;
305 reg = <0x60000 0x1000>;
306 };
307
308 rtc: rtc@c0000 {
309 compatible = "ti,am3352-rtc", "ti,da830-rtc";
310 reg = <0xc0000 0x1000>;
311 interrupts = <75 76>;
312 ti,hwmods = "rtc";
313 };
314
315 mmc2: mmc@1d8000 {
316 compatible = "ti,omap4-hsmmc";
317 ti,hwmods = "mmc2";
318 dmas = <&edma 2 0
319 &edma 3 0>;
320 dma-names = "tx", "rx";
321 interrupts = <28>;
322 interrupt-parent = <&intc>;
323 reg = <0x1d8000 0x1000>;
324 };
325
326 control: control@140000 {
327 compatible = "ti,dm814-scm", "simple-bus";
328 reg = <0x140000 0x20000>;
329 #address-cells = <1>;
330 #size-cells = <1>;
331 ranges = <0 0x140000 0x20000>;
332
333 scm_conf: scm_conf@0 {
334 compatible = "syscon";
335 reg = <0x0 0x800>;
336 #address-cells = <1>;
337 #size-cells = <1>;
338
339 scm_clocks: clocks {
340 #address-cells = <1>;
341 #size-cells = <0>;
342 };
343
344 scm_clockdomains: clockdomains {
345 };
346 };
347
348 usb_ctrl_mod: control@620 {
349 compatible = "ti,am335x-usb-ctrl-module";
350 reg = <0x620 0x10
351 0x648 0x4>;
352 reg-names = "phy_ctrl", "wakeup";
353 };
354
355 edma_xbar: dma-router@f90 {
356 compatible = "ti,am335x-edma-crossbar";
357 reg = <0xf90 0x40>;
358 #dma-cells = <3>;
359 dma-requests = <32>;
360 dma-masters = <&edma>;
361 };
362
363 /*
364 * Note that silicon revision 2.1 and older
365 * require input enabled (bit 18 set) for all
366 * 3.3V I/Os to avoid cumulative hardware damage.
367 * For more info, see errata advisory 2.1.87.
368 * We leave bit 18 out of function-mask and rely
369 * on the bootloader for it.
370 */
371 pincntl: pinmux@800 {
372 compatible = "pinctrl-single";
373 reg = <0x800 0x438>;
374 #address-cells = <1>;
375 #size-cells = <0>;
376 pinctrl-single,register-width = <32>;
377 pinctrl-single,function-mask = <0x307ff>;
378 };
379
380 usb1_phy: usb-phy@1b00 {
381 compatible = "ti,am335x-usb-phy";
382 reg = <0x1b00 0x100>;
383 reg-names = "phy";
384 ti,ctrl_mod = <&usb_ctrl_mod>;
385 };
386 };
387
388 prcm: prcm@180000 {
389 compatible = "ti,dm814-prcm", "simple-bus";
390 reg = <0x180000 0x2000>;
391 #address-cells = <1>;
392 #size-cells = <1>;
393 ranges = <0 0x180000 0x2000>;
394
395 prcm_clocks: clocks {
396 #address-cells = <1>;
397 #size-cells = <0>;
398 };
399
400 prcm_clockdomains: clockdomains {
401 };
402 };
403
404 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
405 pllss: pllss@1c5000 {
406 compatible = "ti,dm814-pllss", "simple-bus";
407 reg = <0x1c5000 0x1000>;
408 #address-cells = <1>;
409 #size-cells = <1>;
410 ranges = <0 0x1c5000 0x1000>;
411
412 pllss_clocks: clocks {
413 #address-cells = <1>;
414 #size-cells = <0>;
415 };
416
417 pllss_clockdomains: clockdomains {
418 };
419 };
420
421 wdt1: wdt@1c7000 {
422 compatible = "ti,omap3-wdt";
423 ti,hwmods = "wd_timer";
424 reg = <0x1c7000 0x1000>;
425 interrupts = <91>;
426 };
427 };
428
429 intc: interrupt-controller@48200000 {
430 compatible = "ti,dm814-intc";
431 interrupt-controller;
432 #interrupt-cells = <1>;
433 reg = <0x48200000 0x1000>;
434 };
435
436 /* Board must configure evtmux with edma_xbar for EDMA */
437 mmc3: mmc@47810000 {
438 compatible = "ti,omap4-hsmmc";
439 ti,hwmods = "mmc3";
440 interrupts = <29>;
441 interrupt-parent = <&intc>;
442 reg = <0x47810000 0x1000>;
443 };
444
445 edma: edma@49000000 {
446 compatible = "ti,edma3-tpcc";
447 ti,hwmods = "tpcc";
448 reg = <0x49000000 0x10000>;
449 reg-names = "edma3_cc";
450 interrupts = <12 13 14>;
451 interrupt-names = "edma3_ccint", "emda3_mperr",
452 "edma3_ccerrint";
453 dma-requests = <64>;
454 #dma-cells = <2>;
455
456 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
457 <&edma_tptc2 3>, <&edma_tptc3 0>;
458
459 ti,edma-memcpy-channels = <20 21>;
460 };
461
462 edma_tptc0: tptc@49800000 {
463 compatible = "ti,edma3-tptc";
464 ti,hwmods = "tptc0";
465 reg = <0x49800000 0x100000>;
466 interrupts = <112>;
467 interrupt-names = "edma3_tcerrint";
468 };
469
470 edma_tptc1: tptc@49900000 {
471 compatible = "ti,edma3-tptc";
472 ti,hwmods = "tptc1";
473 reg = <0x49900000 0x100000>;
474 interrupts = <113>;
475 interrupt-names = "edma3_tcerrint";
476 };
477
478 edma_tptc2: tptc@49a00000 {
479 compatible = "ti,edma3-tptc";
480 ti,hwmods = "tptc2";
481 reg = <0x49a00000 0x100000>;
482 interrupts = <114>;
483 interrupt-names = "edma3_tcerrint";
484 };
485
486 edma_tptc3: tptc@49b00000 {
487 compatible = "ti,edma3-tptc";
488 ti,hwmods = "tptc3";
489 reg = <0x49b00000 0x100000>;
490 interrupts = <115>;
491 interrupt-names = "edma3_tcerrint";
492 };
493
494 /* See TRM "Table 1-318. L4HS Instance Summary" */
495 l4hs: l4hs@4a000000 {
496 compatible = "ti,dm814-l4hs", "simple-bus";
497 #address-cells = <1>;
498 #size-cells = <1>;
499 ranges = <0 0x4a000000 0x1b4040>;
500 };
501
502 /* REVISIT: Move to live under l4hs once driver is fixed */
503 mac: ethernet@4a100000 {
504 compatible = "ti,cpsw";
505 ti,hwmods = "cpgmac0";
506 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
507 clock-names = "fck", "cpts";
508 cpdma_channels = <8>;
509 ale_entries = <1024>;
510 bd_ram_size = <0x2000>;
511 no_bd_ram = <0>;
512 rx_descs = <64>;
513 mac_control = <0x20>;
514 slaves = <2>;
515 active_slave = <0>;
516 cpts_clock_mult = <0x80000000>;
517 cpts_clock_shift = <29>;
518 reg = <0x4a100000 0x800
519 0x4a100900 0x100>;
520 #address-cells = <1>;
521 #size-cells = <1>;
522 interrupt-parent = <&intc>;
523 /*
524 * c0_rx_thresh_pend
525 * c0_rx_pend
526 * c0_tx_pend
527 * c0_misc_pend
528 */
529 interrupts = <40 41 42 43>;
530 ranges;
531 syscon = <&scm_conf>;
532
533 davinci_mdio: mdio@4a100800 {
534 compatible = "ti,davinci_mdio";
535 #address-cells = <1>;
536 #size-cells = <0>;
537 ti,hwmods = "davinci_mdio";
538 bus_freq = <1000000>;
539 reg = <0x4a100800 0x100>;
540 };
541
542 cpsw_emac0: slave@4a100200 {
543 /* Filled in by U-Boot */
544 mac-address = [ 00 00 00 00 00 00 ];
545 };
546
547 cpsw_emac1: slave@4a100300 {
548 /* Filled in by U-Boot */
549 mac-address = [ 00 00 00 00 00 00 ];
550 };
551
552 phy_sel: cpsw-phy-sel@48140650 {
553 compatible = "ti,am3352-cpsw-phy-sel";
554 reg= <0x48140650 0x4>;
555 reg-names = "gmii-sel";
556 };
557 };
558
559 gpmc: gpmc@50000000 {
560 compatible = "ti,am3352-gpmc";
561 ti,hwmods = "gpmc";
562 ti,no-idle-on-init;
563 reg = <0x50000000 0x2000>;
564 interrupts = <100>;
565 gpmc,num-cs = <7>;
566 gpmc,num-waitpins = <2>;
567 #address-cells = <2>;
568 #size-cells = <1>;
569 interrupt-controller;
570 #interrupt-cells = <2>;
571 };
572 };
573};
574
575#include "dm814x-clocks.dtsi"