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v4.17
  1/*
  2 * Copyright 2013 Freescale Semiconductor, Inc.
  3 *
  4 * This file is dual-licensed: you can use it either under the terms
  5 * of the GPL or the X11 license, at your option. Note that this dual
  6 * licensing only applies to this file, and not this project as a
  7 * whole.
  8 *
  9 *  a) This file is free software; you can redistribute it and/or
 10 *     modify it under the terms of the GNU General Public License
 11 *     version 2 as published by the Free Software Foundation.
 12 *
 13 *     This file is distributed in the hope that it will be useful,
 14 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 15 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16 *     GNU General Public License for more details.
 17 *
 18 * Or, alternatively,
 19 *
 20 *  b) Permission is hereby granted, free of charge, to any person
 21 *     obtaining a copy of this software and associated documentation
 22 *     files (the "Software"), to deal in the Software without
 23 *     restriction, including without limitation the rights to use,
 24 *     copy, modify, merge, publish, distribute, sublicense, and/or
 25 *     sell copies of the Software, and to permit persons to whom the
 26 *     Software is furnished to do so, subject to the following
 27 *     conditions:
 28 *
 29 *     The above copyright notice and this permission notice shall be
 30 *     included in all copies or substantial portions of the Software.
 31 *
 32 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 33 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 34 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 35 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 36 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 37 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 38 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 39 *     OTHER DEALINGS IN THE SOFTWARE.
 40 */
 41
 42#include "vf610-pinfunc.h"
 43#include <dt-bindings/clock/vf610-clock.h>
 44#include <dt-bindings/interrupt-controller/irq.h>
 45#include <dt-bindings/gpio/gpio.h>
 46
 47/ {
 48	aliases {
 49		can0 = &can0;
 50		can1 = &can1;
 51		ethernet0 = &fec0;
 52		ethernet1 = &fec1;
 53		serial0 = &uart0;
 54		serial1 = &uart1;
 55		serial2 = &uart2;
 56		serial3 = &uart3;
 57		serial4 = &uart4;
 58		serial5 = &uart5;
 59		gpio0 = &gpio0;
 60		gpio1 = &gpio1;
 61		gpio2 = &gpio2;
 62		gpio3 = &gpio3;
 63		gpio4 = &gpio4;
 64		usbphy0 = &usbphy0;
 65		usbphy1 = &usbphy1;
 66	};
 67
 68	fxosc: fxosc {
 69		compatible = "fixed-clock";
 70		#clock-cells = <0>;
 71		clock-frequency = <24000000>;
 72	};
 73
 74	sxosc: sxosc {
 75		compatible = "fixed-clock";
 76		#clock-cells = <0>;
 77		clock-frequency = <32768>;
 78	};
 79
 80	reboot: syscon-reboot {
 81		compatible = "syscon-reboot";
 82		regmap = <&src>;
 83		offset = <0x0>;
 84		mask = <0x1000>;
 85	};
 86
 87	iio-hwmon {
 88		compatible = "iio-hwmon";
 89		io-channels = <&adc0 16>, <&adc1 16>;
 90	};
 91
 92	soc {
 93		#address-cells = <1>;
 94		#size-cells = <1>;
 95		compatible = "simple-bus";
 96		interrupt-parent = <&mscm_ir>;
 97		ranges;
 98
 99		aips0: aips-bus@40000000 {
100			compatible = "fsl,aips-bus", "simple-bus";
101			#address-cells = <1>;
102			#size-cells = <1>;
103			reg = <0x40000000 0x00070000>;
104			ranges;
105
106			mscm_cpucfg: cpucfg@40001000 {
107				compatible = "fsl,vf610-mscm-cpucfg", "syscon";
108				reg = <0x40001000 0x800>;
109			};
110
111			mscm_ir: interrupt-controller@40001800 {
112				compatible = "fsl,vf610-mscm-ir";
113				reg = <0x40001800 0x400>;
114				fsl,cpucfg = <&mscm_cpucfg>;
115				interrupt-controller;
116				#interrupt-cells = <2>;
117			};
118
119			edma0: dma-controller@40018000 {
120				#dma-cells = <2>;
121				compatible = "fsl,vf610-edma";
122				reg = <0x40018000 0x2000>,
123					<0x40024000 0x1000>,
124					<0x40025000 0x1000>;
125				dma-channels = <32>;
126				interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
127						<9 IRQ_TYPE_LEVEL_HIGH>;
128				interrupt-names = "edma-tx", "edma-err";
129				clock-names = "dmamux0", "dmamux1";
130				clocks = <&clks VF610_CLK_DMAMUX0>,
131					<&clks VF610_CLK_DMAMUX1>;
132				status = "disabled";
133			};
134
135			can0: flexcan@40020000 {
136				compatible = "fsl,vf610-flexcan";
137				reg = <0x40020000 0x4000>;
138				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
139				clocks = <&clks VF610_CLK_FLEXCAN0>,
140					 <&clks VF610_CLK_FLEXCAN0>;
141				clock-names = "ipg", "per";
142				status = "disabled";
143			};
144
145			uart0: serial@40027000 {
146				compatible = "fsl,vf610-lpuart";
147				reg = <0x40027000 0x1000>;
148				interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
149				clocks = <&clks VF610_CLK_UART0>;
150				clock-names = "ipg";
151				dmas = <&edma0 0 2>,
152					<&edma0 0 3>;
153				dma-names = "rx","tx";
154				status = "disabled";
155			};
156
157			uart1: serial@40028000 {
158				compatible = "fsl,vf610-lpuart";
159				reg = <0x40028000 0x1000>;
160				interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
161				clocks = <&clks VF610_CLK_UART1>;
162				clock-names = "ipg";
163				dmas = <&edma0 0 4>,
164					<&edma0 0 5>;
165				dma-names = "rx","tx";
166				status = "disabled";
167			};
168
169			uart2: serial@40029000 {
170				compatible = "fsl,vf610-lpuart";
171				reg = <0x40029000 0x1000>;
172				interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
173				clocks = <&clks VF610_CLK_UART2>;
174				clock-names = "ipg";
175				dmas = <&edma0 0 6>,
176					<&edma0 0 7>;
177				dma-names = "rx","tx";
178				status = "disabled";
179			};
180
181			uart3: serial@4002a000 {
182				compatible = "fsl,vf610-lpuart";
183				reg = <0x4002a000 0x1000>;
184				interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
185				clocks = <&clks VF610_CLK_UART3>;
186				clock-names = "ipg";
187				dmas = <&edma0 0 8>,
188					<&edma0 0 9>;
189				dma-names = "rx","tx";
190				status = "disabled";
191			};
192
193			dspi0: dspi0@4002c000 {
194				#address-cells = <1>;
195				#size-cells = <0>;
196				compatible = "fsl,vf610-dspi";
197				reg = <0x4002c000 0x1000>;
198				interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
199				clocks = <&clks VF610_CLK_DSPI0>;
200				clock-names = "dspi";
201				spi-num-chipselects = <6>;
202				dmas = <&edma1 1 12>,
203					<&edma1 1 13>;
204				dma-names = "rx", "tx";
205				status = "disabled";
206			};
207
208			dspi1: dspi1@4002d000 {
209				#address-cells = <1>;
210				#size-cells = <0>;
211				compatible = "fsl,vf610-dspi";
212				reg = <0x4002d000 0x1000>;
213				interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
214				clocks = <&clks VF610_CLK_DSPI1>;
215				clock-names = "dspi";
216				spi-num-chipselects = <4>;
217				dmas = <&edma1 1 14>,
218					<&edma1 1 15>;
219				dma-names = "rx", "tx";
220				status = "disabled";
221			};
222
223			sai0: sai@4002f000 {
224				compatible = "fsl,vf610-sai";
225				reg = <0x4002f000 0x1000>;
226				interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
227				clocks = <&clks VF610_CLK_SAI0>,
228					<&clks VF610_CLK_SAI0_DIV>,
229					<&clks 0>, <&clks 0>;
230				clock-names = "bus", "mclk1", "mclk2", "mclk3";
231				dma-names = "tx", "rx";
232				dmas = <&edma0 0 17>,
233					<&edma0 0 16>;
234				status = "disabled";
235			};
236
237			sai1: sai@40030000 {
238				compatible = "fsl,vf610-sai";
239				reg = <0x40030000 0x1000>;
240				interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
241				clocks = <&clks VF610_CLK_SAI1>,
242					<&clks VF610_CLK_SAI1_DIV>,
243					<&clks 0>, <&clks 0>;
244				clock-names = "bus", "mclk1", "mclk2", "mclk3";
245				dma-names = "tx", "rx";
246				dmas = <&edma0 0 19>,
247					<&edma0 0 18>;
248				status = "disabled";
249			};
250
251			sai2: sai@40031000 {
252				compatible = "fsl,vf610-sai";
253				reg = <0x40031000 0x1000>;
254				interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
255				clocks = <&clks VF610_CLK_SAI2>,
256					<&clks VF610_CLK_SAI2_DIV>,
257					<&clks 0>, <&clks 0>;
258				clock-names = "bus", "mclk1", "mclk2", "mclk3";
259				dma-names = "tx", "rx";
260				dmas = <&edma0 0 21>,
261					<&edma0 0 20>;
262				status = "disabled";
263			};
264
265			sai3: sai@40032000 {
266				compatible = "fsl,vf610-sai";
267				reg = <0x40032000 0x1000>;
268				interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
269				clocks = <&clks VF610_CLK_SAI3>,
270					<&clks VF610_CLK_SAI3_DIV>,
271					<&clks 0>, <&clks 0>;
272				clock-names = "bus", "mclk1", "mclk2", "mclk3";
273				dma-names = "tx", "rx";
274				dmas = <&edma0 1 9>,
275					<&edma0 1 8>;
276				status = "disabled";
277			};
278
279			pit: pit@40037000 {
280				compatible = "fsl,vf610-pit";
281				reg = <0x40037000 0x1000>;
282				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
283				clocks = <&clks VF610_CLK_PIT>;
284				clock-names = "pit";
285			};
286
287			pwm0: pwm@40038000 {
288				compatible = "fsl,vf610-ftm-pwm";
289				#pwm-cells = <3>;
290				reg = <0x40038000 0x1000>;
291				clock-names = "ftm_sys", "ftm_ext",
292					      "ftm_fix", "ftm_cnt_clk_en";
293				clocks = <&clks VF610_CLK_FTM0>,
294					<&clks VF610_CLK_FTM0_EXT_SEL>,
295					<&clks VF610_CLK_FTM0_FIX_SEL>,
296					<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
297				status = "disabled";
298			};
299
300			pwm1: pwm@40039000 {
301				compatible = "fsl,vf610-ftm-pwm";
302				#pwm-cells = <3>;
303				reg = <0x40039000 0x1000>;
304				clock-names = "ftm_sys", "ftm_ext",
305					      "ftm_fix", "ftm_cnt_clk_en";
306				clocks = <&clks VF610_CLK_FTM1>,
307					<&clks VF610_CLK_FTM1_EXT_SEL>,
308					<&clks VF610_CLK_FTM1_FIX_SEL>,
309					<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
310				status = "disabled";
311			};
312
313			adc0: adc@4003b000 {
314				compatible = "fsl,vf610-adc";
315				reg = <0x4003b000 0x1000>;
316				interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
317				clocks = <&clks VF610_CLK_ADC0>;
318				clock-names = "adc";
319				#io-channel-cells = <1>;
320				status = "disabled";
321				fsl,adck-max-frequency = <30000000>, <40000000>,
322							<20000000>;
323			};
324
325			tcon0: timing-controller@4003d000 {
326				compatible = "fsl,vf610-tcon";
327				reg = <0x4003d000 0x1000>;
328				clocks = <&clks VF610_CLK_TCON0>;
329				clock-names = "ipg";
330				status = "disabled";
331			};
332
333			wdoga5: wdog@4003e000 {
334				compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
335				reg = <0x4003e000 0x1000>;
336				interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
337				clocks = <&clks VF610_CLK_WDT>;
338				clock-names = "wdog";
339				status = "disabled";
340			};
341
342			qspi0: quadspi@40044000 {
343				#address-cells = <1>;
344				#size-cells = <0>;
345				compatible = "fsl,vf610-qspi";
346				reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
347				reg-names = "QuadSPI", "QuadSPI-memory";
348				interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
349				clocks = <&clks VF610_CLK_QSPI0_EN>,
350					<&clks VF610_CLK_QSPI0>;
351				clock-names = "qspi_en", "qspi";
352				status = "disabled";
353			};
354
355			iomuxc: iomuxc@40048000 {
356				compatible = "fsl,vf610-iomuxc";
357				reg = <0x40048000 0x1000>;
358			};
359
360			gpio0: gpio@40049000 {
361				compatible = "fsl,vf610-gpio";
362				reg = <0x40049000 0x1000 0x400ff000 0x40>;
363				gpio-controller;
364				#gpio-cells = <2>;
365				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
366				interrupt-controller;
367				#interrupt-cells = <2>;
368				gpio-ranges = <&iomuxc 0 0 32>;
369			};
370
371			gpio1: gpio@4004a000 {
372				compatible = "fsl,vf610-gpio";
373				reg = <0x4004a000 0x1000 0x400ff040 0x40>;
374				gpio-controller;
375				#gpio-cells = <2>;
376				interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
377				interrupt-controller;
378				#interrupt-cells = <2>;
379				gpio-ranges = <&iomuxc 0 32 32>;
380			};
381
382			gpio2: gpio@4004b000 {
383				compatible = "fsl,vf610-gpio";
384				reg = <0x4004b000 0x1000 0x400ff080 0x40>;
385				gpio-controller;
386				#gpio-cells = <2>;
387				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
388				interrupt-controller;
389				#interrupt-cells = <2>;
390				gpio-ranges = <&iomuxc 0 64 32>;
391			};
392
393			gpio3: gpio@4004c000 {
394				compatible = "fsl,vf610-gpio";
395				reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
396				gpio-controller;
397				#gpio-cells = <2>;
398				interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
399				interrupt-controller;
400				#interrupt-cells = <2>;
401				gpio-ranges = <&iomuxc 0 96 32>;
402			};
403
404			gpio4: gpio@4004d000 {
405				compatible = "fsl,vf610-gpio";
406				reg = <0x4004d000 0x1000 0x400ff100 0x40>;
407				gpio-controller;
408				#gpio-cells = <2>;
409				interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
410				interrupt-controller;
411				#interrupt-cells = <2>;
412				gpio-ranges = <&iomuxc 0 128 7>;
413			};
414
415			anatop: anatop@40050000 {
416				compatible = "fsl,vf610-anatop", "syscon";
417				reg = <0x40050000 0x400>;
418			};
419
420			usbphy0: usbphy@40050800 {
421				compatible = "fsl,vf610-usbphy";
422				reg = <0x40050800 0x400>;
423				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
424				clocks = <&clks VF610_CLK_USBPHY0>;
425				fsl,anatop = <&anatop>;
426				status = "disabled";
427			};
428
429			usbphy1: usbphy@40050c00 {
430				compatible = "fsl,vf610-usbphy";
431				reg = <0x40050c00 0x400>;
432				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
433				clocks = <&clks VF610_CLK_USBPHY1>;
434				fsl,anatop = <&anatop>;
435				status = "disabled";
436			};
437
438			dcu0: dcu@40058000 {
439				compatible = "fsl,vf610-dcu";
440				reg = <0x40058000 0x1200>;
441				interrupts = <30 IRQ_TYPE_LEVEL_HIGH>;
442				clocks = <&clks VF610_CLK_DCU0>,
443					<&clks VF610_CLK_DCU0_DIV>;
444				clock-names = "dcu", "pix";
445				fsl,tcon = <&tcon0>;
446				status = "disabled";
447			};
448
449			i2c0: i2c@40066000 {
450				#address-cells = <1>;
451				#size-cells = <0>;
452				compatible = "fsl,vf610-i2c";
453				reg = <0x40066000 0x1000>;
454				interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
455				clocks = <&clks VF610_CLK_I2C0>;
456				clock-names = "ipg";
457				dmas = <&edma0 0 50>,
458					<&edma0 0 51>;
459				dma-names = "rx","tx";
460				status = "disabled";
461			};
462
463			i2c1: i2c@40067000 {
464				#address-cells = <1>;
465				#size-cells = <0>;
466				compatible = "fsl,vf610-i2c";
467				reg = <0x40067000 0x1000>;
468				interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
469				clocks = <&clks VF610_CLK_I2C1>;
470				clock-names = "ipg";
471				dmas = <&edma0 0 52>,
472					<&edma0 0 53>;
473				dma-names = "rx","tx";
474				status = "disabled";
475			};
476
477			clks: ccm@4006b000 {
478				compatible = "fsl,vf610-ccm";
479				reg = <0x4006b000 0x1000>;
480				clocks = <&sxosc>, <&fxosc>;
481				clock-names = "sxosc", "fxosc";
482				#clock-cells = <1>;
483			};
484
485			usbdev0: usb@40034000 {
486				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
487				reg = <0x40034000 0x800>;
488				interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
489				clocks = <&clks VF610_CLK_USBC0>;
490				fsl,usbphy = <&usbphy0>;
491				fsl,usbmisc = <&usbmisc0 0>;
492				dr_mode = "peripheral";
493				status = "disabled";
494			};
495
496			usbmisc0: usb@40034800 {
497				#index-cells = <1>;
498				compatible = "fsl,vf610-usbmisc";
499				reg = <0x40034800 0x200>;
500				clocks = <&clks VF610_CLK_USBC0>;
501				status = "disabled";
502			};
503
504			src: src@4006e000 {
505				compatible = "fsl,vf610-src", "syscon";
506				reg = <0x4006e000 0x1000>;
507				interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
508			};
509		};
510
511		aips1: aips-bus@40080000 {
512			compatible = "fsl,aips-bus", "simple-bus";
513			#address-cells = <1>;
514			#size-cells = <1>;
515			reg = <0x40080000 0x0007f000>;
516			ranges;
517
518			edma1: dma-controller@40098000 {
519				#dma-cells = <2>;
520				compatible = "fsl,vf610-edma";
521				reg = <0x40098000 0x2000>,
522					<0x400a1000 0x1000>,
523					<0x400a2000 0x1000>;
524				dma-channels = <32>;
525				interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
526						<11 IRQ_TYPE_LEVEL_HIGH>;
527				interrupt-names = "edma-tx", "edma-err";
528				clock-names = "dmamux0", "dmamux1";
529				clocks = <&clks VF610_CLK_DMAMUX2>,
530					<&clks VF610_CLK_DMAMUX3>;
531				status = "disabled";
532			};
533
534			ocotp: ocotp@400a5000 {
535				compatible = "fsl,vf610-ocotp";
536				reg = <0x400a5000 0x1000>;
537				clocks = <&clks VF610_CLK_OCOTP>;
538			};
539
540			snvs0: snvs@400a7000 {
541			    compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
542				reg = <0x400a7000 0x2000>;
543
544				snvsrtc: snvs-rtc-lp {
545					compatible = "fsl,sec-v4.0-mon-rtc-lp";
546					regmap = <&snvs0>;
547					offset = <0x34>;
548					interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
549					clocks = <&clks VF610_CLK_SNVS>;
550					clock-names = "snvs-rtc";
551				};
552			};
553
554			uart4: serial@400a9000 {
555				compatible = "fsl,vf610-lpuart";
556				reg = <0x400a9000 0x1000>;
557				interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
558				clocks = <&clks VF610_CLK_UART4>;
559				clock-names = "ipg";
560				status = "disabled";
561			};
562
563			uart5: serial@400aa000 {
564				compatible = "fsl,vf610-lpuart";
565				reg = <0x400aa000 0x1000>;
566				interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
567				clocks = <&clks VF610_CLK_UART5>;
568				clock-names = "ipg";
569				status = "disabled";
570			};
571
572			dspi2: dspi2@400ac000 {
573				#address-cells = <1>;
574				#size-cells = <0>;
575				compatible = "fsl,vf610-dspi";
576				reg = <0x400ac000 0x1000>;
577				interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
578				clocks = <&clks VF610_CLK_DSPI2>;
579				clock-names = "dspi";
580				spi-num-chipselects = <2>;
581				dmas = <&edma1 0 10>,
582					<&edma1 0 11>;
583				dma-names = "rx", "tx";
584				status = "disabled";
585			};
586
587			dspi3: dspi3@400ad000 {
588				#address-cells = <1>;
589				#size-cells = <0>;
590				compatible = "fsl,vf610-dspi";
591				reg = <0x400ad000 0x1000>;
592				interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
593				clocks = <&clks VF610_CLK_DSPI3>;
594				clock-names = "dspi";
595				spi-num-chipselects = <2>;
596				dmas = <&edma1 0 12>,
597					<&edma1 0 13>;
598				dma-names = "rx", "tx";
599				status = "disabled";
600			};
601
602			adc1: adc@400bb000 {
603				compatible = "fsl,vf610-adc";
604				reg = <0x400bb000 0x1000>;
605				interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
606				clocks = <&clks VF610_CLK_ADC1>;
607				clock-names = "adc";
608				#io-channel-cells = <1>;
609				status = "disabled";
610				fsl,adck-max-frequency = <30000000>, <40000000>,
611							<20000000>;
612			};
613
614			esdhc0: esdhc@400b1000 {
615				compatible = "fsl,imx53-esdhc";
616				reg = <0x400b1000 0x1000>;
617				interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
618				clocks = <&clks VF610_CLK_IPG_BUS>,
619					<&clks VF610_CLK_PLATFORM_BUS>,
620					<&clks VF610_CLK_ESDHC0>;
621				clock-names = "ipg", "ahb", "per";
622				status = "disabled";
623			};
624
625			esdhc1: esdhc@400b2000 {
626				compatible = "fsl,imx53-esdhc";
627				reg = <0x400b2000 0x1000>;
628				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
629				clocks = <&clks VF610_CLK_IPG_BUS>,
630					<&clks VF610_CLK_PLATFORM_BUS>,
631					<&clks VF610_CLK_ESDHC1>;
632				clock-names = "ipg", "ahb", "per";
633				status = "disabled";
634			};
635
636			usbh1: usb@400b4000 {
637				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
638				reg = <0x400b4000 0x800>;
639				interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
640				clocks = <&clks VF610_CLK_USBC1>;
641				fsl,usbphy = <&usbphy1>;
642				fsl,usbmisc = <&usbmisc1 0>;
643				dr_mode = "host";
644				status = "disabled";
645			};
646
647			usbmisc1: usb@400b4800 {
648				#index-cells = <1>;
649				compatible = "fsl,vf610-usbmisc";
650				reg = <0x400b4800 0x200>;
651				clocks = <&clks VF610_CLK_USBC1>;
652				status = "disabled";
653			};
654
655			ftm: ftm@400b8000 {
656				compatible = "fsl,ftm-timer";
657				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
658				interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
659				clock-names = "ftm-evt", "ftm-src",
660					"ftm-evt-counter-en", "ftm-src-counter-en";
661				clocks = <&clks VF610_CLK_FTM2>,
662					<&clks VF610_CLK_FTM3>,
663					<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
664					<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
665				status = "disabled";
666			};
667
668			qspi1: quadspi@400c4000 {
669				#address-cells = <1>;
670				#size-cells = <0>;
671				compatible = "fsl,vf610-qspi";
672				reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
673				reg-names = "QuadSPI", "QuadSPI-memory";
674				interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
675				clocks = <&clks VF610_CLK_QSPI1_EN>,
676					<&clks VF610_CLK_QSPI1>;
677				clock-names = "qspi_en", "qspi";
678				status = "disabled";
679			};
680
681			dac0: dac@400cc000 {
682				compatible = "fsl,vf610-dac";
683				reg = <0x400cc000 1000>;
684				interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
685				clock-names = "dac";
686				clocks = <&clks VF610_CLK_DAC0>;
687				status = "disabled";
688			};
689
690			dac1: dac@400cd000 {
691				compatible = "fsl,vf610-dac";
692				reg = <0x400cd000 1000>;
693				interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
694				clock-names = "dac";
695				clocks = <&clks VF610_CLK_DAC1>;
696				status = "disabled";
697			};
698
699			fec0: ethernet@400d0000 {
700				compatible = "fsl,mvf600-fec";
701				reg = <0x400d0000 0x1000>;
702				interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
703				clocks = <&clks VF610_CLK_ENET0>,
704					<&clks VF610_CLK_ENET0>,
705					<&clks VF610_CLK_ENET>;
706				clock-names = "ipg", "ahb", "ptp";
707				status = "disabled";
708			};
709
710			fec1: ethernet@400d1000 {
711				compatible = "fsl,mvf600-fec";
712				reg = <0x400d1000 0x1000>;
713				interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
714				clocks = <&clks VF610_CLK_ENET1>,
715					<&clks VF610_CLK_ENET1>,
716					<&clks VF610_CLK_ENET>;
717				clock-names = "ipg", "ahb", "ptp";
718				status = "disabled";
719			};
720
721			can1: flexcan@400d4000 {
722				compatible = "fsl,vf610-flexcan";
723				reg = <0x400d4000 0x4000>;
724				interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
725				clocks = <&clks VF610_CLK_FLEXCAN1>,
726					 <&clks VF610_CLK_FLEXCAN1>;
727				clock-names = "ipg", "per";
728				status = "disabled";
729			};
730
731			nfc: nand@400e0000 {
732				#address-cells = <1>;
733				#size-cells = <0>;
734				compatible = "fsl,vf610-nfc";
735				reg = <0x400e0000 0x4000>;
736				interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
737				clocks = <&clks VF610_CLK_NFC>;
738				clock-names = "nfc";
739				status = "disabled";
740			};
741
742			i2c2: i2c@400e6000 {
743				#address-cells = <1>;
744				#size-cells = <0>;
745				compatible = "fsl,vf610-i2c";
746				reg = <0x400e6000 0x1000>;
747				interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
748				clocks = <&clks VF610_CLK_I2C2>;
749				clock-names = "ipg";
750				dmas = <&edma0 1 36>,
751					<&edma0 1 37>;
752				dma-names = "rx","tx";
753				status = "disabled";
754			};
755
756			i2c3: i2c@400e7000 {
757				#address-cells = <1>;
758				#size-cells = <0>;
759				compatible = "fsl,vf610-i2c";
760				reg = <0x400e7000 0x1000>;
761				interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
762				clocks = <&clks VF610_CLK_I2C3>;
763				clock-names = "ipg";
764				dmas = <&edma0 1 38>,
765					<&edma0 1 39>;
766				dma-names = "rx","tx";
767				status = "disabled";
768			};
 
 
 
 
 
769		};
770	};
771};
v4.6
  1/*
  2 * Copyright 2013 Freescale Semiconductor, Inc.
  3 *
  4 * This file is dual-licensed: you can use it either under the terms
  5 * of the GPL or the X11 license, at your option. Note that this dual
  6 * licensing only applies to this file, and not this project as a
  7 * whole.
  8 *
  9 *  a) This file is free software; you can redistribute it and/or
 10 *     modify it under the terms of the GNU General Public License
 11 *     version 2 as published by the Free Software Foundation.
 12 *
 13 *     This file is distributed in the hope that it will be useful
 14 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 15 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16 *     GNU General Public License for more details.
 17 *
 18 * Or, alternatively
 19 *
 20 *  b) Permission is hereby granted, free of charge, to any person
 21 *     obtaining a copy of this software and associated documentation
 22 *     files (the "Software"), to deal in the Software without
 23 *     restriction, including without limitation the rights to use
 24 *     copy, modify, merge, publish, distribute, sublicense, and/or
 25 *     sell copies of the Software, and to permit persons to whom the
 26 *     Software is furnished to do so, subject to the following
 27 *     conditions:
 28 *
 29 *     The above copyright notice and this permission notice shall be
 30 *     included in all copies or substantial portions of the Software.
 31 *
 32 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 33 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 34 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 35 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 36 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 37 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 38 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 39 *     OTHER DEALINGS IN THE SOFTWARE.
 40 */
 41
 42#include "vf610-pinfunc.h"
 43#include <dt-bindings/clock/vf610-clock.h>
 44#include <dt-bindings/interrupt-controller/irq.h>
 45#include <dt-bindings/gpio/gpio.h>
 46
 47/ {
 48	aliases {
 49		can0 = &can0;
 50		can1 = &can1;
 51		ethernet0 = &fec0;
 52		ethernet1 = &fec1;
 53		serial0 = &uart0;
 54		serial1 = &uart1;
 55		serial2 = &uart2;
 56		serial3 = &uart3;
 57		serial4 = &uart4;
 58		serial5 = &uart5;
 59		gpio0 = &gpio0;
 60		gpio1 = &gpio1;
 61		gpio2 = &gpio2;
 62		gpio3 = &gpio3;
 63		gpio4 = &gpio4;
 64		usbphy0 = &usbphy0;
 65		usbphy1 = &usbphy1;
 66	};
 67
 68	fxosc: fxosc {
 69		compatible = "fixed-clock";
 70		#clock-cells = <0>;
 71		clock-frequency = <24000000>;
 72	};
 73
 74	sxosc: sxosc {
 75		compatible = "fixed-clock";
 76		#clock-cells = <0>;
 77		clock-frequency = <32768>;
 78	};
 79
 80	reboot: syscon-reboot {
 81		compatible = "syscon-reboot";
 82		regmap = <&src>;
 83		offset = <0x0>;
 84		mask = <0x1000>;
 85	};
 86
 
 
 
 
 
 87	soc {
 88		#address-cells = <1>;
 89		#size-cells = <1>;
 90		compatible = "simple-bus";
 91		interrupt-parent = <&mscm_ir>;
 92		ranges;
 93
 94		aips0: aips-bus@40000000 {
 95			compatible = "fsl,aips-bus", "simple-bus";
 96			#address-cells = <1>;
 97			#size-cells = <1>;
 
 98			ranges;
 99
100			mscm_cpucfg: cpucfg@40001000 {
101				compatible = "fsl,vf610-mscm-cpucfg", "syscon";
102				reg = <0x40001000 0x800>;
103			};
104
105			mscm_ir: interrupt-controller@40001800 {
106				compatible = "fsl,vf610-mscm-ir";
107				reg = <0x40001800 0x400>;
108				fsl,cpucfg = <&mscm_cpucfg>;
109				interrupt-controller;
110				#interrupt-cells = <2>;
111			};
112
113			edma0: dma-controller@40018000 {
114				#dma-cells = <2>;
115				compatible = "fsl,vf610-edma";
116				reg = <0x40018000 0x2000>,
117					<0x40024000 0x1000>,
118					<0x40025000 0x1000>;
119				dma-channels = <32>;
120				interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
121						<9 IRQ_TYPE_LEVEL_HIGH>;
122				interrupt-names = "edma-tx", "edma-err";
123				clock-names = "dmamux0", "dmamux1";
124				clocks = <&clks VF610_CLK_DMAMUX0>,
125					<&clks VF610_CLK_DMAMUX1>;
126				status = "disabled";
127			};
128
129			can0: flexcan@40020000 {
130				compatible = "fsl,vf610-flexcan";
131				reg = <0x40020000 0x4000>;
132				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
133				clocks = <&clks VF610_CLK_FLEXCAN0>,
134					 <&clks VF610_CLK_FLEXCAN0>;
135				clock-names = "ipg", "per";
136				status = "disabled";
137			};
138
139			uart0: serial@40027000 {
140				compatible = "fsl,vf610-lpuart";
141				reg = <0x40027000 0x1000>;
142				interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
143				clocks = <&clks VF610_CLK_UART0>;
144				clock-names = "ipg";
145				dmas = <&edma0 0 2>,
146					<&edma0 0 3>;
147				dma-names = "rx","tx";
148				status = "disabled";
149			};
150
151			uart1: serial@40028000 {
152				compatible = "fsl,vf610-lpuart";
153				reg = <0x40028000 0x1000>;
154				interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
155				clocks = <&clks VF610_CLK_UART1>;
156				clock-names = "ipg";
157				dmas = <&edma0 0 4>,
158					<&edma0 0 5>;
159				dma-names = "rx","tx";
160				status = "disabled";
161			};
162
163			uart2: serial@40029000 {
164				compatible = "fsl,vf610-lpuart";
165				reg = <0x40029000 0x1000>;
166				interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
167				clocks = <&clks VF610_CLK_UART2>;
168				clock-names = "ipg";
169				dmas = <&edma0 0 6>,
170					<&edma0 0 7>;
171				dma-names = "rx","tx";
172				status = "disabled";
173			};
174
175			uart3: serial@4002a000 {
176				compatible = "fsl,vf610-lpuart";
177				reg = <0x4002a000 0x1000>;
178				interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
179				clocks = <&clks VF610_CLK_UART3>;
180				clock-names = "ipg";
181				dmas = <&edma0 0 8>,
182					<&edma0 0 9>;
183				dma-names = "rx","tx";
184				status = "disabled";
185			};
186
187			dspi0: dspi0@4002c000 {
188				#address-cells = <1>;
189				#size-cells = <0>;
190				compatible = "fsl,vf610-dspi";
191				reg = <0x4002c000 0x1000>;
192				interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
193				clocks = <&clks VF610_CLK_DSPI0>;
194				clock-names = "dspi";
195				spi-num-chipselects = <6>;
 
 
 
196				status = "disabled";
197			};
198
199			dspi1: dspi1@4002d000 {
200				#address-cells = <1>;
201				#size-cells = <0>;
202				compatible = "fsl,vf610-dspi";
203				reg = <0x4002d000 0x1000>;
204				interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
205				clocks = <&clks VF610_CLK_DSPI1>;
206				clock-names = "dspi";
207				spi-num-chipselects = <4>;
 
 
 
208				status = "disabled";
209			};
210
211			sai0: sai@4002f000 {
212				compatible = "fsl,vf610-sai";
213				reg = <0x4002f000 0x1000>;
214				interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
215				clocks = <&clks VF610_CLK_SAI0>,
216					<&clks VF610_CLK_SAI0_DIV>,
217					<&clks 0>, <&clks 0>;
218				clock-names = "bus", "mclk1", "mclk2", "mclk3";
219				dma-names = "tx", "rx";
220				dmas = <&edma0 0 17>,
221					<&edma0 0 16>;
222				status = "disabled";
223			};
224
225			sai1: sai@40030000 {
226				compatible = "fsl,vf610-sai";
227				reg = <0x40030000 0x1000>;
228				interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
229				clocks = <&clks VF610_CLK_SAI1>,
230					<&clks VF610_CLK_SAI1_DIV>,
231					<&clks 0>, <&clks 0>;
232				clock-names = "bus", "mclk1", "mclk2", "mclk3";
233				dma-names = "tx", "rx";
234				dmas = <&edma0 0 19>,
235					<&edma0 0 18>;
236				status = "disabled";
237			};
238
239			sai2: sai@40031000 {
240				compatible = "fsl,vf610-sai";
241				reg = <0x40031000 0x1000>;
242				interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
243				clocks = <&clks VF610_CLK_SAI2>,
244					<&clks VF610_CLK_SAI2_DIV>,
245					<&clks 0>, <&clks 0>;
246				clock-names = "bus", "mclk1", "mclk2", "mclk3";
247				dma-names = "tx", "rx";
248				dmas = <&edma0 0 21>,
249					<&edma0 0 20>;
250				status = "disabled";
251			};
252
253			sai3: sai@40032000 {
254				compatible = "fsl,vf610-sai";
255				reg = <0x40032000 0x1000>;
256				interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
257				clocks = <&clks VF610_CLK_SAI3>,
258					<&clks VF610_CLK_SAI3_DIV>,
259					<&clks 0>, <&clks 0>;
260				clock-names = "bus", "mclk1", "mclk2", "mclk3";
261				dma-names = "tx", "rx";
262				dmas = <&edma0 1 9>,
263					<&edma0 1 8>;
264				status = "disabled";
265			};
266
267			pit: pit@40037000 {
268				compatible = "fsl,vf610-pit";
269				reg = <0x40037000 0x1000>;
270				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
271				clocks = <&clks VF610_CLK_PIT>;
272				clock-names = "pit";
273			};
274
275			pwm0: pwm@40038000 {
276				compatible = "fsl,vf610-ftm-pwm";
277				#pwm-cells = <3>;
278				reg = <0x40038000 0x1000>;
279				clock-names = "ftm_sys", "ftm_ext",
280					      "ftm_fix", "ftm_cnt_clk_en";
281				clocks = <&clks VF610_CLK_FTM0>,
282					<&clks VF610_CLK_FTM0_EXT_SEL>,
283					<&clks VF610_CLK_FTM0_FIX_SEL>,
284					<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
285				status = "disabled";
286			};
287
288			pwm1: pwm@40039000 {
289				compatible = "fsl,vf610-ftm-pwm";
290				#pwm-cells = <3>;
291				reg = <0x40039000 0x1000>;
292				clock-names = "ftm_sys", "ftm_ext",
293					      "ftm_fix", "ftm_cnt_clk_en";
294				clocks = <&clks VF610_CLK_FTM1>,
295					<&clks VF610_CLK_FTM1_EXT_SEL>,
296					<&clks VF610_CLK_FTM1_FIX_SEL>,
297					<&clks VF610_CLK_FTM1_EXT_FIX_EN>;
298				status = "disabled";
299			};
300
301			adc0: adc@4003b000 {
302				compatible = "fsl,vf610-adc";
303				reg = <0x4003b000 0x1000>;
304				interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
305				clocks = <&clks VF610_CLK_ADC0>;
306				clock-names = "adc";
307				#io-channel-cells = <1>;
308				status = "disabled";
309				fsl,adck-max-frequency = <30000000>, <40000000>,
310							<20000000>;
311			};
312
 
 
 
 
 
 
 
 
313			wdoga5: wdog@4003e000 {
314				compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
315				reg = <0x4003e000 0x1000>;
316				interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
317				clocks = <&clks VF610_CLK_WDT>;
318				clock-names = "wdog";
319				status = "disabled";
320			};
321
322			qspi0: quadspi@40044000 {
323				#address-cells = <1>;
324				#size-cells = <0>;
325				compatible = "fsl,vf610-qspi";
326				reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
327				reg-names = "QuadSPI", "QuadSPI-memory";
328				interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
329				clocks = <&clks VF610_CLK_QSPI0_EN>,
330					<&clks VF610_CLK_QSPI0>;
331				clock-names = "qspi_en", "qspi";
332				status = "disabled";
333			};
334
335			iomuxc: iomuxc@40048000 {
336				compatible = "fsl,vf610-iomuxc";
337				reg = <0x40048000 0x1000>;
338			};
339
340			gpio0: gpio@40049000 {
341				compatible = "fsl,vf610-gpio";
342				reg = <0x40049000 0x1000 0x400ff000 0x40>;
343				gpio-controller;
344				#gpio-cells = <2>;
345				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
346				interrupt-controller;
347				#interrupt-cells = <2>;
348				gpio-ranges = <&iomuxc 0 0 32>;
349			};
350
351			gpio1: gpio@4004a000 {
352				compatible = "fsl,vf610-gpio";
353				reg = <0x4004a000 0x1000 0x400ff040 0x40>;
354				gpio-controller;
355				#gpio-cells = <2>;
356				interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
357				interrupt-controller;
358				#interrupt-cells = <2>;
359				gpio-ranges = <&iomuxc 0 32 32>;
360			};
361
362			gpio2: gpio@4004b000 {
363				compatible = "fsl,vf610-gpio";
364				reg = <0x4004b000 0x1000 0x400ff080 0x40>;
365				gpio-controller;
366				#gpio-cells = <2>;
367				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
368				interrupt-controller;
369				#interrupt-cells = <2>;
370				gpio-ranges = <&iomuxc 0 64 32>;
371			};
372
373			gpio3: gpio@4004c000 {
374				compatible = "fsl,vf610-gpio";
375				reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
376				gpio-controller;
377				#gpio-cells = <2>;
378				interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
379				interrupt-controller;
380				#interrupt-cells = <2>;
381				gpio-ranges = <&iomuxc 0 96 32>;
382			};
383
384			gpio4: gpio@4004d000 {
385				compatible = "fsl,vf610-gpio";
386				reg = <0x4004d000 0x1000 0x400ff100 0x40>;
387				gpio-controller;
388				#gpio-cells = <2>;
389				interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
390				interrupt-controller;
391				#interrupt-cells = <2>;
392				gpio-ranges = <&iomuxc 0 128 7>;
393			};
394
395			anatop: anatop@40050000 {
396				compatible = "fsl,vf610-anatop", "syscon";
397				reg = <0x40050000 0x400>;
398			};
399
400			usbphy0: usbphy@40050800 {
401				compatible = "fsl,vf610-usbphy";
402				reg = <0x40050800 0x400>;
403				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
404				clocks = <&clks VF610_CLK_USBPHY0>;
405				fsl,anatop = <&anatop>;
406				status = "disabled";
407			};
408
409			usbphy1: usbphy@40050c00 {
410				compatible = "fsl,vf610-usbphy";
411				reg = <0x40050c00 0x400>;
412				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
413				clocks = <&clks VF610_CLK_USBPHY1>;
414				fsl,anatop = <&anatop>;
415				status = "disabled";
416			};
417
 
 
 
 
 
 
 
 
 
 
 
418			i2c0: i2c@40066000 {
419				#address-cells = <1>;
420				#size-cells = <0>;
421				compatible = "fsl,vf610-i2c";
422				reg = <0x40066000 0x1000>;
423				interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
424				clocks = <&clks VF610_CLK_I2C0>;
425				clock-names = "ipg";
426				dmas = <&edma0 0 50>,
427					<&edma0 0 51>;
428				dma-names = "rx","tx";
429				status = "disabled";
430			};
431
432			i2c1: i2c@40067000 {
433				#address-cells = <1>;
434				#size-cells = <0>;
435				compatible = "fsl,vf610-i2c";
436				reg = <0x40067000 0x1000>;
437				interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
438				clocks = <&clks VF610_CLK_I2C1>;
439				clock-names = "ipg";
440				dmas = <&edma0 0 52>,
441					<&edma0 0 53>;
442				dma-names = "rx","tx";
443				status = "disabled";
444			};
445
446			clks: ccm@4006b000 {
447				compatible = "fsl,vf610-ccm";
448				reg = <0x4006b000 0x1000>;
449				clocks = <&sxosc>, <&fxosc>;
450				clock-names = "sxosc", "fxosc";
451				#clock-cells = <1>;
452			};
453
454			usbdev0: usb@40034000 {
455				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
456				reg = <0x40034000 0x800>;
457				interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
458				clocks = <&clks VF610_CLK_USBC0>;
459				fsl,usbphy = <&usbphy0>;
460				fsl,usbmisc = <&usbmisc0 0>;
461				dr_mode = "peripheral";
462				status = "disabled";
463			};
464
465			usbmisc0: usb@40034800 {
466				#index-cells = <1>;
467				compatible = "fsl,vf610-usbmisc";
468				reg = <0x40034800 0x200>;
469				clocks = <&clks VF610_CLK_USBC0>;
470				status = "disabled";
471			};
472
473			src: src@4006e000 {
474				compatible = "fsl,vf610-src", "syscon";
475				reg = <0x4006e000 0x1000>;
476				interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
477			};
478		};
479
480		aips1: aips-bus@40080000 {
481			compatible = "fsl,aips-bus", "simple-bus";
482			#address-cells = <1>;
483			#size-cells = <1>;
 
484			ranges;
485
486			edma1: dma-controller@40098000 {
487				#dma-cells = <2>;
488				compatible = "fsl,vf610-edma";
489				reg = <0x40098000 0x2000>,
490					<0x400a1000 0x1000>,
491					<0x400a2000 0x1000>;
492				dma-channels = <32>;
493				interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
494						<11 IRQ_TYPE_LEVEL_HIGH>;
495				interrupt-names = "edma-tx", "edma-err";
496				clock-names = "dmamux0", "dmamux1";
497				clocks = <&clks VF610_CLK_DMAMUX2>,
498					<&clks VF610_CLK_DMAMUX3>;
499				status = "disabled";
500			};
501
 
 
 
 
 
 
502			snvs0: snvs@400a7000 {
503			    compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
504				reg = <0x400a7000 0x2000>;
505
506				snvsrtc: snvs-rtc-lp {
507					compatible = "fsl,sec-v4.0-mon-rtc-lp";
508					regmap = <&snvs0>;
509					offset = <0x34>;
510					interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
511					clocks = <&clks VF610_CLK_SNVS>;
512					clock-names = "snvs-rtc";
513				};
514			};
515
516			uart4: serial@400a9000 {
517				compatible = "fsl,vf610-lpuart";
518				reg = <0x400a9000 0x1000>;
519				interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
520				clocks = <&clks VF610_CLK_UART4>;
521				clock-names = "ipg";
522				status = "disabled";
523			};
524
525			uart5: serial@400aa000 {
526				compatible = "fsl,vf610-lpuart";
527				reg = <0x400aa000 0x1000>;
528				interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
529				clocks = <&clks VF610_CLK_UART5>;
530				clock-names = "ipg";
531				status = "disabled";
532			};
533
534			dspi2: dspi2@400ac000 {
535				#address-cells = <1>;
536				#size-cells = <0>;
537				compatible = "fsl,vf610-dspi";
538				reg = <0x400ac000 0x1000>;
539				interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
540				clocks = <&clks VF610_CLK_DSPI2>;
541				clock-names = "dspi";
542				spi-num-chipselects = <2>;
 
 
 
543				status = "disabled";
544			};
545
546			dspi3: dspi3@400ad000 {
547				#address-cells = <1>;
548				#size-cells = <0>;
549				compatible = "fsl,vf610-dspi";
550				reg = <0x400ad000 0x1000>;
551				interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
552				clocks = <&clks VF610_CLK_DSPI3>;
553				clock-names = "dspi";
554				spi-num-chipselects = <2>;
 
 
 
555				status = "disabled";
556			};
557
558			adc1: adc@400bb000 {
559				compatible = "fsl,vf610-adc";
560				reg = <0x400bb000 0x1000>;
561				interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
562				clocks = <&clks VF610_CLK_ADC1>;
563				clock-names = "adc";
564				#io-channel-cells = <1>;
565				status = "disabled";
566				fsl,adck-max-frequency = <30000000>, <40000000>,
567							<20000000>;
568			};
569
570			esdhc0: esdhc@400b1000 {
571				compatible = "fsl,imx53-esdhc";
572				reg = <0x400b1000 0x1000>;
573				interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
574				clocks = <&clks VF610_CLK_IPG_BUS>,
575					<&clks VF610_CLK_PLATFORM_BUS>,
576					<&clks VF610_CLK_ESDHC0>;
577				clock-names = "ipg", "ahb", "per";
578				status = "disabled";
579			};
580
581			esdhc1: esdhc@400b2000 {
582				compatible = "fsl,imx53-esdhc";
583				reg = <0x400b2000 0x1000>;
584				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
585				clocks = <&clks VF610_CLK_IPG_BUS>,
586					<&clks VF610_CLK_PLATFORM_BUS>,
587					<&clks VF610_CLK_ESDHC1>;
588				clock-names = "ipg", "ahb", "per";
589				status = "disabled";
590			};
591
592			usbh1: usb@400b4000 {
593				compatible = "fsl,vf610-usb", "fsl,imx27-usb";
594				reg = <0x400b4000 0x800>;
595				interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
596				clocks = <&clks VF610_CLK_USBC1>;
597				fsl,usbphy = <&usbphy1>;
598				fsl,usbmisc = <&usbmisc1 0>;
599				dr_mode = "host";
600				status = "disabled";
601			};
602
603			usbmisc1: usb@400b4800 {
604				#index-cells = <1>;
605				compatible = "fsl,vf610-usbmisc";
606				reg = <0x400b4800 0x200>;
607				clocks = <&clks VF610_CLK_USBC1>;
608				status = "disabled";
609			};
610
611			ftm: ftm@400b8000 {
612				compatible = "fsl,ftm-timer";
613				reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
614				interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
615				clock-names = "ftm-evt", "ftm-src",
616					"ftm-evt-counter-en", "ftm-src-counter-en";
617				clocks = <&clks VF610_CLK_FTM2>,
618					<&clks VF610_CLK_FTM3>,
619					<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
620					<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
621				status = "disabled";
622			};
623
624			qspi1: quadspi@400c4000 {
625				#address-cells = <1>;
626				#size-cells = <0>;
627				compatible = "fsl,vf610-qspi";
628				reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
629				reg-names = "QuadSPI", "QuadSPI-memory";
630				interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
631				clocks = <&clks VF610_CLK_QSPI1_EN>,
632					<&clks VF610_CLK_QSPI1>;
633				clock-names = "qspi_en", "qspi";
634				status = "disabled";
635			};
636
637			dac0: dac@400cc000 {
638				compatible = "fsl,vf610-dac";
639				reg = <0x400cc000 1000>;
640				interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
641				clock-names = "dac";
642				clocks = <&clks VF610_CLK_DAC0>;
643				status = "disabled";
644			};
645
646			dac1: dac@400cd000 {
647				compatible = "fsl,vf610-dac";
648				reg = <0x400cd000 1000>;
649				interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
650				clock-names = "dac";
651				clocks = <&clks VF610_CLK_DAC1>;
652				status = "disabled";
653			};
654
655			fec0: ethernet@400d0000 {
656				compatible = "fsl,mvf600-fec";
657				reg = <0x400d0000 0x1000>;
658				interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
659				clocks = <&clks VF610_CLK_ENET0>,
660					<&clks VF610_CLK_ENET0>,
661					<&clks VF610_CLK_ENET>;
662				clock-names = "ipg", "ahb", "ptp";
663				status = "disabled";
664			};
665
666			fec1: ethernet@400d1000 {
667				compatible = "fsl,mvf600-fec";
668				reg = <0x400d1000 0x1000>;
669				interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
670				clocks = <&clks VF610_CLK_ENET1>,
671					<&clks VF610_CLK_ENET1>,
672					<&clks VF610_CLK_ENET>;
673				clock-names = "ipg", "ahb", "ptp";
674				status = "disabled";
675			};
676
677			can1: flexcan@400d4000 {
678				compatible = "fsl,vf610-flexcan";
679				reg = <0x400d4000 0x4000>;
680				interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
681				clocks = <&clks VF610_CLK_FLEXCAN1>,
682					 <&clks VF610_CLK_FLEXCAN1>;
683				clock-names = "ipg", "per";
684				status = "disabled";
685			};
686
687			nfc: nand@400e0000 {
688				#address-cells = <1>;
689				#size-cells = <0>;
690				compatible = "fsl,vf610-nfc";
691				reg = <0x400e0000 0x4000>;
692				interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
693				clocks = <&clks VF610_CLK_NFC>;
694				clock-names = "nfc";
695				status = "disabled";
696			};
697
698			i2c2: i2c@400e6000 {
699				#address-cells = <1>;
700				#size-cells = <0>;
701				compatible = "fsl,vf610-i2c";
702				reg = <0x400e6000 0x1000>;
703				interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
704				clocks = <&clks VF610_CLK_I2C2>;
705				clock-names = "ipg";
706				dmas = <&edma0 1 36>,
707					<&edma0 1 37>;
708				dma-names = "rx","tx";
709				status = "disabled";
710			};
711
712			i2c3: i2c@400e7000 {
713				#address-cells = <1>;
714				#size-cells = <0>;
715				compatible = "fsl,vf610-i2c";
716				reg = <0x400e7000 0x1000>;
717				interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
718				clocks = <&clks VF610_CLK_I2C3>;
719				clock-names = "ipg";
720				dmas = <&edma0 1 38>,
721					<&edma0 1 39>;
722				dma-names = "rx","tx";
723				status = "disabled";
724			};
725		};
726
727		iio-hwmon {
728			compatible = "iio-hwmon";
729			io-channels = <&adc0 16>, <&adc1 16>;
730		};
731	};
732};