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1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include <dt-bindings/clock/imx6qdl-clock.h>
44#include <dt-bindings/gpio/gpio.h>
45#include <dt-bindings/input/input.h>
46
47/ {
48 chosen {
49 stdout-path = &uart2;
50 };
51
52 memory@10000000 {
53 reg = <0x10000000 0x40000000>;
54 };
55
56 regulators {
57 compatible = "simple-bus";
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 reg_2p5v: regulator@0 {
62 compatible = "regulator-fixed";
63 reg = <0>;
64 regulator-name = "2P5V";
65 regulator-min-microvolt = <2500000>;
66 regulator-max-microvolt = <2500000>;
67 regulator-always-on;
68 };
69
70 reg_3p3v: regulator@1 {
71 compatible = "regulator-fixed";
72 reg = <1>;
73 regulator-name = "3P3V";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
76 regulator-always-on;
77 };
78
79 reg_usb_otg_vbus: regulator@2 {
80 compatible = "regulator-fixed";
81 reg = <2>;
82 regulator-name = "usb_otg_vbus";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
85 gpio = <&gpio3 22 0>;
86 enable-active-high;
87 };
88
89 reg_can_xcvr: regulator@3 {
90 compatible = "regulator-fixed";
91 reg = <3>;
92 regulator-name = "CAN XCVR";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_can_xcvr>;
97 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
98 };
99
100 reg_1p5v: regulator@4 {
101 compatible = "regulator-fixed";
102 reg = <4>;
103 regulator-name = "1P5V";
104 regulator-min-microvolt = <1500000>;
105 regulator-max-microvolt = <1500000>;
106 regulator-always-on;
107 };
108
109 reg_1p8v: regulator@5 {
110 compatible = "regulator-fixed";
111 reg = <5>;
112 regulator-name = "1P8V";
113 regulator-min-microvolt = <1800000>;
114 regulator-max-microvolt = <1800000>;
115 regulator-always-on;
116 };
117
118 reg_2p8v: regulator@6 {
119 compatible = "regulator-fixed";
120 reg = <6>;
121 regulator-name = "2P8V";
122 regulator-min-microvolt = <2800000>;
123 regulator-max-microvolt = <2800000>;
124 regulator-always-on;
125 };
126
127 reg_usb_h1_vbus: regulator@7 {
128 compatible = "regulator-fixed";
129 reg = <7>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_usbh1>;
132 regulator-name = "usb_h1_vbus";
133 regulator-min-microvolt = <3300000>;
134 regulator-max-microvolt = <3300000>;
135 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
136 enable-active-high;
137 };
138 };
139
140 mipi_xclk: mipi_xclk {
141 compatible = "pwm-clock";
142 #clock-cells = <0>;
143 clock-frequency = <22000000>;
144 clock-output-names = "mipi_pwm3";
145 pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */
146 status = "okay";
147 };
148
149 gpio-keys {
150 compatible = "gpio-keys";
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_gpio_keys>;
153
154 power {
155 label = "Power Button";
156 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
157 linux,code = <KEY_POWER>;
158 wakeup-source;
159 };
160
161 menu {
162 label = "Menu";
163 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
164 linux,code = <KEY_MENU>;
165 };
166
167 home {
168 label = "Home";
169 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
170 linux,code = <KEY_HOME>;
171 };
172
173 back {
174 label = "Back";
175 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
176 linux,code = <KEY_BACK>;
177 };
178
179 volume-up {
180 label = "Volume Up";
181 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
182 linux,code = <KEY_VOLUMEUP>;
183 };
184
185 volume-down {
186 label = "Volume Down";
187 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
188 linux,code = <KEY_VOLUMEDOWN>;
189 };
190 };
191
192 sound {
193 compatible = "fsl,imx6q-sabrelite-sgtl5000",
194 "fsl,imx-audio-sgtl5000";
195 model = "imx6q-sabrelite-sgtl5000";
196 ssi-controller = <&ssi1>;
197 audio-codec = <&codec>;
198 audio-routing =
199 "MIC_IN", "Mic Jack",
200 "Mic Jack", "Mic Bias",
201 "Headphone Jack", "HP_OUT";
202 mux-int-port = <1>;
203 mux-ext-port = <4>;
204 };
205
206 backlight_lcd: backlight-lcd {
207 compatible = "pwm-backlight";
208 pwms = <&pwm1 0 5000000>;
209 brightness-levels = <0 4 8 16 32 64 128 255>;
210 default-brightness-level = <7>;
211 power-supply = <®_3p3v>;
212 status = "okay";
213 };
214
215 backlight_lvds: backlight-lvds {
216 compatible = "pwm-backlight";
217 pwms = <&pwm4 0 5000000>;
218 brightness-levels = <0 4 8 16 32 64 128 255>;
219 default-brightness-level = <7>;
220 power-supply = <®_3p3v>;
221 status = "okay";
222 };
223
224 lcd_display: disp0 {
225 compatible = "fsl,imx-parallel-display";
226 #address-cells = <1>;
227 #size-cells = <0>;
228 interface-pix-fmt = "bgr666";
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_j15>;
231 status = "okay";
232
233 port@0 {
234 reg = <0>;
235
236 lcd_display_in: endpoint {
237 remote-endpoint = <&ipu1_di0_disp0>;
238 };
239 };
240
241 port@1 {
242 reg = <1>;
243
244 lcd_display_out: endpoint {
245 remote-endpoint = <&lcd_panel_in>;
246 };
247 };
248 };
249
250 panel-lcd {
251 compatible = "okaya,rs800480t-7x0gp";
252 backlight = <&backlight_lcd>;
253
254 port {
255 lcd_panel_in: endpoint {
256 remote-endpoint = <&lcd_display_out>;
257 };
258 };
259 };
260
261 panel-lvds0 {
262 compatible = "hannstar,hsd100pxn1";
263 backlight = <&backlight_lvds>;
264
265 port {
266 panel_in: endpoint {
267 remote-endpoint = <&lvds0_out>;
268 };
269 };
270 };
271};
272
273&ipu1_csi0_from_ipu1_csi0_mux {
274 bus-width = <8>;
275 data-shift = <12>; /* Lines 19:12 used */
276 hsync-active = <1>;
277 vync-active = <1>;
278};
279
280&ipu1_csi0_mux_from_parallel_sensor {
281 remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
282};
283
284&ipu1_csi0 {
285 pinctrl-names = "default";
286 pinctrl-0 = <&pinctrl_ipu1_csi0>;
287};
288
289&audmux {
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_audmux>;
292 status = "okay";
293};
294
295&can1 {
296 pinctrl-names = "default";
297 pinctrl-0 = <&pinctrl_can1>;
298 xceiver-supply = <®_can_xcvr>;
299 status = "okay";
300};
301
302&clks {
303 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
304 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
305 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
306 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
307};
308
309&ecspi1 {
310 cs-gpios = <&gpio3 19 0>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_ecspi1>;
313 status = "okay";
314
315 flash: m25p80@0 {
316 compatible = "sst,sst25vf016b", "jedec,spi-nor";
317 spi-max-frequency = <20000000>;
318 reg = <0>;
319 };
320};
321
322&fec {
323 pinctrl-names = "default";
324 pinctrl-0 = <&pinctrl_enet>;
325 phy-mode = "rgmii";
326 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
327 txen-skew-ps = <0>;
328 txc-skew-ps = <3000>;
329 rxdv-skew-ps = <0>;
330 rxc-skew-ps = <3000>;
331 rxd0-skew-ps = <0>;
332 rxd1-skew-ps = <0>;
333 rxd2-skew-ps = <0>;
334 rxd3-skew-ps = <0>;
335 txd0-skew-ps = <0>;
336 txd1-skew-ps = <0>;
337 txd2-skew-ps = <0>;
338 txd3-skew-ps = <0>;
339 status = "okay";
340};
341
342&hdmi {
343 ddc-i2c-bus = <&i2c2>;
344 status = "okay";
345};
346
347&i2c1 {
348 clock-frequency = <100000>;
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_i2c1>;
351 status = "okay";
352
353 codec: sgtl5000@a {
354 compatible = "fsl,sgtl5000";
355 reg = <0x0a>;
356 clocks = <&clks IMX6QDL_CLK_CKO>;
357 VDDA-supply = <®_2p5v>;
358 VDDIO-supply = <®_3p3v>;
359 };
360};
361
362&i2c2 {
363 clock-frequency = <100000>;
364 pinctrl-names = "default";
365 pinctrl-0 = <&pinctrl_i2c2>;
366 status = "okay";
367
368 ov5640: camera@40 {
369 compatible = "ovti,ov5640";
370 pinctrl-names = "default";
371 pinctrl-0 = <&pinctrl_ov5640>;
372 reg = <0x40>;
373 clocks = <&mipi_xclk>;
374 clock-names = "xclk";
375 DOVDD-supply = <®_1p8v>;
376 AVDD-supply = <®_2p8v>;
377 DVDD-supply = <®_1p5v>;
378 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */
379 powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */
380
381 port {
382 #address-cells = <1>;
383 #size-cells = <0>;
384
385 ov5640_to_mipi_csi2: endpoint {
386 remote-endpoint = <&mipi_csi2_in>;
387 clock-lanes = <0>;
388 data-lanes = <1 2>;
389 };
390 };
391 };
392
393 ov5642: camera@42 {
394 compatible = "ovti,ov5642";
395 pinctrl-names = "default";
396 pinctrl-0 = <&pinctrl_ov5642>;
397 clocks = <&clks IMX6QDL_CLK_CKO2>;
398 clock-names = "xclk";
399 reg = <0x42>;
400 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
401 powerdown-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
402 gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
403 status = "disabled";
404
405 port {
406 ov5642_to_ipu1_csi0_mux: endpoint {
407 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
408 bus-width = <8>;
409 hsync-active = <1>;
410 vsync-active = <1>;
411 };
412 };
413 };
414};
415
416&i2c3 {
417 clock-frequency = <100000>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_i2c3>;
420 status = "okay";
421};
422
423&iomuxc {
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_hog>;
426
427 imx6q-sabrelite {
428 pinctrl_hog: hoggrp {
429 fsl,pins = <
430 /* SGTL5000 sys_mclk */
431 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
432 >;
433 };
434
435 pinctrl_audmux: audmuxgrp {
436 fsl,pins = <
437 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
438 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
439 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
440 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
441 >;
442 };
443
444 pinctrl_can1: can1grp {
445 fsl,pins = <
446 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
447 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
448 >;
449 };
450
451 pinctrl_can_xcvr: can-xcvrgrp {
452 fsl,pins = <
453 /* Flexcan XCVR enable */
454 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
455 >;
456 };
457
458 pinctrl_ecspi1: ecspi1grp {
459 fsl,pins = <
460 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
461 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
462 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
463 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
464 >;
465 };
466
467 pinctrl_enet: enetgrp {
468 fsl,pins = <
469 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
470 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
471 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
472 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
473 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
474 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
475 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
476 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
477 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
478 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
479 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
480 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
481 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
482 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
483 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
484 /* Phy reset */
485 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
486 >;
487 };
488
489 pinctrl_gpio_keys: gpio-keysgrp {
490 fsl,pins = <
491 /* Power Button */
492 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
493 /* Menu Button */
494 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
495 /* Home Button */
496 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
497 /* Back Button */
498 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
499 /* Volume Up Button */
500 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
501 /* Volume Down Button */
502 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
503 >;
504 };
505
506 pinctrl_i2c1: i2c1grp {
507 fsl,pins = <
508 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
509 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
510 >;
511 };
512
513 pinctrl_i2c2: i2c2grp {
514 fsl,pins = <
515 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
516 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
517 >;
518 };
519
520 pinctrl_i2c3: i2c3grp {
521 fsl,pins = <
522 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
523 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
524 >;
525 };
526
527 pinctrl_ipu1_csi0: ipu1csi0grp {
528 fsl,pins = <
529 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
530 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
531 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
532 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
533 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
534 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
535 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
536 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
537 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
538 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
539 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
540 MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0
541 >;
542 };
543
544 pinctrl_j15: j15grp {
545 fsl,pins = <
546 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
547 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
548 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
549 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
550 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
551 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
552 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
553 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
554 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
555 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
556 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
557 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
558 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
559 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
560 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
561 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
562 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
563 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
564 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
565 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
566 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
567 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
568 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
569 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
570 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
571 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
572 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
573 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
574 >;
575 };
576
577 pinctrl_ov5640: ov5640grp {
578 fsl,pins = <
579 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000b0
580 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
581 >;
582 };
583
584 pinctrl_ov5642: ov5642grp {
585 fsl,pins = <
586 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
587 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
588 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x130b0
589 MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
590 >;
591 };
592
593 pinctrl_pwm1: pwm1grp {
594 fsl,pins = <
595 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
596 >;
597 };
598
599 pinctrl_pwm3: pwm3grp {
600 fsl,pins = <
601 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
602 >;
603 };
604
605 pinctrl_pwm4: pwm4grp {
606 fsl,pins = <
607 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
608 >;
609 };
610
611 pinctrl_uart1: uart1grp {
612 fsl,pins = <
613 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
614 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
615 >;
616 };
617
618 pinctrl_uart2: uart2grp {
619 fsl,pins = <
620 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
621 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
622 >;
623 };
624
625 pinctrl_usbh1: usbh1grp {
626 fsl,pins = <
627 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
628 >;
629 };
630
631 pinctrl_usbotg: usbotggrp {
632 fsl,pins = <
633 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
634 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
635 /* power enable, high active */
636 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
637 >;
638 };
639
640 pinctrl_usdhc3: usdhc3grp {
641 fsl,pins = <
642 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
643 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
644 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
645 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
646 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
647 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
648 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
649 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
650 >;
651 };
652
653 pinctrl_usdhc4: usdhc4grp {
654 fsl,pins = <
655 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
656 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
657 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
658 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
659 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
660 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
661 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
662 >;
663 };
664 };
665};
666
667&ipu1_di0_disp0 {
668 remote-endpoint = <&lcd_display_in>;
669};
670
671&ldb {
672 status = "okay";
673
674 lvds-channel@0 {
675 status = "okay";
676
677 port@4 {
678 reg = <4>;
679
680 lvds0_out: endpoint {
681 remote-endpoint = <&panel_in>;
682 };
683 };
684 };
685};
686
687&pcie {
688 status = "okay";
689};
690
691&pwm1 {
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_pwm1>;
694 status = "okay";
695};
696
697&pwm3 {
698 pinctrl-names = "default";
699 pinctrl-0 = <&pinctrl_pwm3>;
700 status = "okay";
701};
702
703&pwm4 {
704 pinctrl-names = "default";
705 pinctrl-0 = <&pinctrl_pwm4>;
706 status = "okay";
707};
708
709&ssi1 {
710 status = "okay";
711};
712
713&uart1 {
714 pinctrl-names = "default";
715 pinctrl-0 = <&pinctrl_uart1>;
716 status = "okay";
717};
718
719&uart2 {
720 pinctrl-names = "default";
721 pinctrl-0 = <&pinctrl_uart2>;
722 status = "okay";
723};
724
725&usbh1 {
726 vbus-supply = <®_usb_h1_vbus>;
727 status = "okay";
728};
729
730&usbotg {
731 vbus-supply = <®_usb_otg_vbus>;
732 pinctrl-names = "default";
733 pinctrl-0 = <&pinctrl_usbotg>;
734 disable-over-current;
735 status = "okay";
736};
737
738&usdhc3 {
739 pinctrl-names = "default";
740 pinctrl-0 = <&pinctrl_usdhc3>;
741 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
742 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
743 vmmc-supply = <®_3p3v>;
744 status = "okay";
745};
746
747&usdhc4 {
748 pinctrl-names = "default";
749 pinctrl-0 = <&pinctrl_usdhc4>;
750 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
751 vmmc-supply = <®_3p3v>;
752 status = "okay";
753};
754
755&mipi_csi {
756 status = "okay";
757
758 port@0 {
759 reg = <0>;
760
761 mipi_csi2_in: endpoint {
762 remote-endpoint = <&ov5640_to_mipi_csi2>;
763 clock-lanes = <0>;
764 data-lanes = <1 2>;
765 };
766 };
767};
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42#include <dt-bindings/gpio/gpio.h>
43#include <dt-bindings/input/input.h>
44
45/ {
46 chosen {
47 stdout-path = &uart2;
48 };
49
50 memory {
51 reg = <0x10000000 0x40000000>;
52 };
53
54 regulators {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 reg_2p5v: regulator@0 {
60 compatible = "regulator-fixed";
61 reg = <0>;
62 regulator-name = "2P5V";
63 regulator-min-microvolt = <2500000>;
64 regulator-max-microvolt = <2500000>;
65 regulator-always-on;
66 };
67
68 reg_3p3v: regulator@1 {
69 compatible = "regulator-fixed";
70 reg = <1>;
71 regulator-name = "3P3V";
72 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <3300000>;
74 regulator-always-on;
75 };
76
77 reg_usb_otg_vbus: regulator@2 {
78 compatible = "regulator-fixed";
79 reg = <2>;
80 regulator-name = "usb_otg_vbus";
81 regulator-min-microvolt = <5000000>;
82 regulator-max-microvolt = <5000000>;
83 gpio = <&gpio3 22 0>;
84 enable-active-high;
85 };
86
87 reg_can_xcvr: regulator@3 {
88 compatible = "regulator-fixed";
89 reg = <3>;
90 regulator-name = "CAN XCVR";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_can_xcvr>;
95 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
96 };
97 };
98
99 gpio-keys {
100 compatible = "gpio-keys";
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_gpio_keys>;
103
104 power {
105 label = "Power Button";
106 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
107 linux,code = <KEY_POWER>;
108 wakeup-source;
109 };
110
111 menu {
112 label = "Menu";
113 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
114 linux,code = <KEY_MENU>;
115 };
116
117 home {
118 label = "Home";
119 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
120 linux,code = <KEY_HOME>;
121 };
122
123 back {
124 label = "Back";
125 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
126 linux,code = <KEY_BACK>;
127 };
128
129 volume-up {
130 label = "Volume Up";
131 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
132 linux,code = <KEY_VOLUMEUP>;
133 };
134
135 volume-down {
136 label = "Volume Down";
137 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
138 linux,code = <KEY_VOLUMEDOWN>;
139 };
140 };
141
142 sound {
143 compatible = "fsl,imx6q-sabrelite-sgtl5000",
144 "fsl,imx-audio-sgtl5000";
145 model = "imx6q-sabrelite-sgtl5000";
146 ssi-controller = <&ssi1>;
147 audio-codec = <&codec>;
148 audio-routing =
149 "MIC_IN", "Mic Jack",
150 "Mic Jack", "Mic Bias",
151 "Headphone Jack", "HP_OUT";
152 mux-int-port = <1>;
153 mux-ext-port = <4>;
154 };
155
156 backlight_lcd: backlight_lcd {
157 compatible = "pwm-backlight";
158 pwms = <&pwm1 0 5000000>;
159 brightness-levels = <0 4 8 16 32 64 128 255>;
160 default-brightness-level = <7>;
161 power-supply = <®_3p3v>;
162 status = "okay";
163 };
164
165 backlight_lvds: backlight_lvds {
166 compatible = "pwm-backlight";
167 pwms = <&pwm4 0 5000000>;
168 brightness-levels = <0 4 8 16 32 64 128 255>;
169 default-brightness-level = <7>;
170 power-supply = <®_3p3v>;
171 status = "okay";
172 };
173
174 lcd_display: display@di0 {
175 compatible = "fsl,imx-parallel-display";
176 #address-cells = <1>;
177 #size-cells = <0>;
178 interface-pix-fmt = "bgr666";
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_j15>;
181 status = "okay";
182
183 port@0 {
184 reg = <0>;
185
186 lcd_display_in: endpoint {
187 remote-endpoint = <&ipu1_di0_disp0>;
188 };
189 };
190
191 port@1 {
192 reg = <1>;
193
194 lcd_display_out: endpoint {
195 remote-endpoint = <&lcd_panel_in>;
196 };
197 };
198 };
199
200 lcd_panel {
201 compatible = "okaya,rs800480t-7x0gp";
202 backlight = <&backlight_lcd>;
203
204 port {
205 lcd_panel_in: endpoint {
206 remote-endpoint = <&lcd_display_out>;
207 };
208 };
209 };
210
211 panel {
212 compatible = "hannstar,hsd100pxn1";
213 backlight = <&backlight_lvds>;
214
215 port {
216 panel_in: endpoint {
217 remote-endpoint = <&lvds0_out>;
218 };
219 };
220 };
221};
222
223&audmux {
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_audmux>;
226 status = "okay";
227};
228
229&can1 {
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_can1>;
232 xceiver-supply = <®_can_xcvr>;
233 status = "okay";
234};
235
236&clks {
237 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
238 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
239 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
240 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
241};
242
243&ecspi1 {
244 fsl,spi-num-chipselects = <1>;
245 cs-gpios = <&gpio3 19 0>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_ecspi1>;
248 status = "okay";
249
250 flash: m25p80@0 {
251 compatible = "sst,sst25vf016b", "jedec,spi-nor";
252 spi-max-frequency = <20000000>;
253 reg = <0>;
254 };
255};
256
257&fec {
258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_enet>;
260 phy-mode = "rgmii";
261 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
262 txen-skew-ps = <0>;
263 txc-skew-ps = <3000>;
264 rxdv-skew-ps = <0>;
265 rxc-skew-ps = <3000>;
266 rxd0-skew-ps = <0>;
267 rxd1-skew-ps = <0>;
268 rxd2-skew-ps = <0>;
269 rxd3-skew-ps = <0>;
270 txd0-skew-ps = <0>;
271 txd1-skew-ps = <0>;
272 txd2-skew-ps = <0>;
273 txd3-skew-ps = <0>;
274 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
275 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
276 status = "okay";
277};
278
279&hdmi {
280 ddc-i2c-bus = <&i2c2>;
281 status = "okay";
282};
283
284&i2c1 {
285 clock-frequency = <100000>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_i2c1>;
288 status = "okay";
289
290 codec: sgtl5000@0a {
291 compatible = "fsl,sgtl5000";
292 reg = <0x0a>;
293 clocks = <&clks 201>;
294 VDDA-supply = <®_2p5v>;
295 VDDIO-supply = <®_3p3v>;
296 };
297};
298
299&i2c2 {
300 clock-frequency = <100000>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&pinctrl_i2c2>;
303 status = "okay";
304};
305
306&i2c3 {
307 clock-frequency = <100000>;
308 pinctrl-names = "default";
309 pinctrl-0 = <&pinctrl_i2c3>;
310 status = "okay";
311};
312
313&iomuxc {
314 pinctrl-names = "default";
315 pinctrl-0 = <&pinctrl_hog>;
316
317 imx6q-sabrelite {
318 pinctrl_hog: hoggrp {
319 fsl,pins = <
320 /* SGTL5000 sys_mclk */
321 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
322 >;
323 };
324
325 pinctrl_audmux: audmuxgrp {
326 fsl,pins = <
327 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
328 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
329 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
330 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
331 >;
332 };
333
334 pinctrl_can1: can1grp {
335 fsl,pins = <
336 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
337 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
338 >;
339 };
340
341 pinctrl_can_xcvr: can-xcvrgrp {
342 fsl,pins = <
343 /* Flexcan XCVR enable */
344 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
345 >;
346 };
347
348 pinctrl_ecspi1: ecspi1grp {
349 fsl,pins = <
350 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
351 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
352 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
353 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
354 >;
355 };
356
357 pinctrl_enet: enetgrp {
358 fsl,pins = <
359 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
360 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
361 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
362 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
363 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
364 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
365 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
366 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
367 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
368 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
369 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
370 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
371 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
372 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
373 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
374 /* Phy reset */
375 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
376 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
377 >;
378 };
379
380 pinctrl_gpio_keys: gpio_keysgrp {
381 fsl,pins = <
382 /* Power Button */
383 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
384 /* Menu Button */
385 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
386 /* Home Button */
387 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
388 /* Back Button */
389 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
390 /* Volume Up Button */
391 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
392 /* Volume Down Button */
393 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
394 >;
395 };
396
397 pinctrl_i2c1: i2c1grp {
398 fsl,pins = <
399 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
400 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
401 >;
402 };
403
404 pinctrl_i2c2: i2c2grp {
405 fsl,pins = <
406 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
407 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
408 >;
409 };
410
411 pinctrl_i2c3: i2c3grp {
412 fsl,pins = <
413 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
414 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
415 >;
416 };
417
418 pinctrl_j15: j15grp {
419 fsl,pins = <
420 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
421 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
422 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
423 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
424 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
425 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
426 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
427 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
428 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
429 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
430 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
431 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
432 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
433 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
434 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
435 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
436 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
437 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
438 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
439 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
440 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
441 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
442 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
443 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
444 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
445 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
446 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
447 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
448 >;
449 };
450
451 pinctrl_pwm1: pwm1grp {
452 fsl,pins = <
453 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
454 >;
455 };
456
457 pinctrl_pwm3: pwm3grp {
458 fsl,pins = <
459 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
460 >;
461 };
462
463 pinctrl_pwm4: pwm4grp {
464 fsl,pins = <
465 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
466 >;
467 };
468
469 pinctrl_uart1: uart1grp {
470 fsl,pins = <
471 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
472 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
473 >;
474 };
475
476 pinctrl_uart2: uart2grp {
477 fsl,pins = <
478 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
479 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
480 >;
481 };
482
483 pinctrl_usbotg: usbotggrp {
484 fsl,pins = <
485 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
486 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
487 /* power enable, high active */
488 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
489 >;
490 };
491
492 pinctrl_usdhc3: usdhc3grp {
493 fsl,pins = <
494 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
495 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
496 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
497 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
498 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
499 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
500 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
501 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
502 >;
503 };
504
505 pinctrl_usdhc4: usdhc4grp {
506 fsl,pins = <
507 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
508 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
509 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
510 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
511 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
512 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
513 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
514 >;
515 };
516 };
517};
518
519&ipu1_di0_disp0 {
520 remote-endpoint = <&lcd_display_in>;
521};
522
523&ldb {
524 status = "okay";
525
526 lvds-channel@0 {
527 fsl,data-mapping = "spwg";
528 fsl,data-width = <18>;
529 status = "okay";
530
531 port@4 {
532 reg = <4>;
533
534 lvds0_out: endpoint {
535 remote-endpoint = <&panel_in>;
536 };
537 };
538 };
539};
540
541&pcie {
542 status = "okay";
543};
544
545&pwm1 {
546 pinctrl-names = "default";
547 pinctrl-0 = <&pinctrl_pwm1>;
548 status = "okay";
549};
550
551&pwm3 {
552 pinctrl-names = "default";
553 pinctrl-0 = <&pinctrl_pwm3>;
554 status = "okay";
555};
556
557&pwm4 {
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_pwm4>;
560 status = "okay";
561};
562
563&ssi1 {
564 status = "okay";
565};
566
567&uart1 {
568 pinctrl-names = "default";
569 pinctrl-0 = <&pinctrl_uart1>;
570 status = "okay";
571};
572
573&uart2 {
574 pinctrl-names = "default";
575 pinctrl-0 = <&pinctrl_uart2>;
576 status = "okay";
577};
578
579&usbh1 {
580 status = "okay";
581};
582
583&usbotg {
584 vbus-supply = <®_usb_otg_vbus>;
585 pinctrl-names = "default";
586 pinctrl-0 = <&pinctrl_usbotg>;
587 disable-over-current;
588 status = "okay";
589};
590
591&usdhc3 {
592 pinctrl-names = "default";
593 pinctrl-0 = <&pinctrl_usdhc3>;
594 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
595 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
596 vmmc-supply = <®_3p3v>;
597 status = "okay";
598};
599
600&usdhc4 {
601 pinctrl-names = "default";
602 pinctrl-0 = <&pinctrl_usdhc4>;
603 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
604 vmmc-supply = <®_3p3v>;
605 status = "okay";
606};