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1/*
2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include "am57xx-beagle-x15-common.dtsi"
10
11/ {
12 /* NOTE: This describes the "original" pre-production A2 revision */
13 model = "TI AM5728 BeagleBoard-X15";
14};
15
16&tpd12s015 {
17 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
18 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
19 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
20};
21
22&mmc1 {
23 pinctrl-names = "default", "hs";
24 pinctrl-0 = <&mmc1_pins_default>;
25 pinctrl-1 = <&mmc1_pins_hs>;
26
27 vmmc-supply = <&ldo1_reg>;
28};
29
30&mmc2 {
31 pinctrl-names = "default", "hs", "ddr_1_8v";
32 pinctrl-0 = <&mmc2_pins_default>;
33 pinctrl-1 = <&mmc2_pins_hs>;
34 pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
35};
36
37/* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
38&phy1 {
39 max-speed = <100>;
40};
1/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "dra74x.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13
14/ {
15 model = "TI AM5728 BeagleBoard-X15";
16 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
17
18 aliases {
19 rtc0 = &mcp_rtc;
20 rtc1 = &tps659038_rtc;
21 rtc2 = &rtc;
22 display0 = &hdmi0;
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0x0 0x80000000 0x0 0x80000000>;
28 };
29
30 vdd_3v3: fixedregulator-vdd_3v3 {
31 compatible = "regulator-fixed";
32 regulator-name = "vdd_3v3";
33 vin-supply = <®en1>;
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 };
37
38 aic_dvdd: fixedregulator-aic_dvdd {
39 compatible = "regulator-fixed";
40 regulator-name = "aic_dvdd_fixed";
41 vin-supply = <&vdd_3v3>;
42 regulator-min-microvolt = <1800000>;
43 regulator-max-microvolt = <1800000>;
44 };
45
46 vtt_fixed: fixedregulator-vtt {
47 /* TPS51200 */
48 compatible = "regulator-fixed";
49 regulator-name = "vtt_fixed";
50 vin-supply = <&smps3_reg>;
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-always-on;
54 regulator-boot-on;
55 enable-active-high;
56 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
57 };
58
59 leds {
60 compatible = "gpio-leds";
61 pinctrl-names = "default";
62 pinctrl-0 = <&leds_pins_default>;
63
64 led@0 {
65 label = "beagle-x15:usr0";
66 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
67 linux,default-trigger = "heartbeat";
68 default-state = "off";
69 };
70
71 led@1 {
72 label = "beagle-x15:usr1";
73 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
74 linux,default-trigger = "cpu0";
75 default-state = "off";
76 };
77
78 led@2 {
79 label = "beagle-x15:usr2";
80 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
81 linux,default-trigger = "mmc0";
82 default-state = "off";
83 };
84
85 led@3 {
86 label = "beagle-x15:usr3";
87 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger = "ide-disk";
89 default-state = "off";
90 };
91 };
92
93 gpio_fan: gpio_fan {
94 /* Based on 5v 500mA AFB02505HHB */
95 compatible = "gpio-fan";
96 gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
97 gpio-fan,speed-map = <0 0>,
98 <13000 1>;
99 #cooling-cells = <2>;
100 };
101
102 hdmi0: connector {
103 compatible = "hdmi-connector";
104 label = "hdmi";
105
106 type = "a";
107
108 port {
109 hdmi_connector_in: endpoint {
110 remote-endpoint = <&tpd12s015_out>;
111 };
112 };
113 };
114
115 tpd12s015: encoder {
116 compatible = "ti,tpd12s015";
117
118 pinctrl-names = "default";
119 pinctrl-0 = <&tpd12s015_pins>;
120
121 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
122 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
123 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
124
125 ports {
126 #address-cells = <1>;
127 #size-cells = <0>;
128
129 port@0 {
130 reg = <0>;
131
132 tpd12s015_in: endpoint {
133 remote-endpoint = <&hdmi_out>;
134 };
135 };
136
137 port@1 {
138 reg = <1>;
139
140 tpd12s015_out: endpoint {
141 remote-endpoint = <&hdmi_connector_in>;
142 };
143 };
144 };
145 };
146
147 sound0: sound@0 {
148 compatible = "simple-audio-card";
149 simple-audio-card,name = "BeagleBoard-X15";
150 simple-audio-card,widgets =
151 "Line", "Line Out",
152 "Line", "Line In";
153 simple-audio-card,routing =
154 "Line Out", "LLOUT",
155 "Line Out", "RLOUT",
156 "MIC2L", "Line In",
157 "MIC2R", "Line In";
158 simple-audio-card,format = "dsp_b";
159 simple-audio-card,bitclock-master = <&sound0_master>;
160 simple-audio-card,frame-master = <&sound0_master>;
161 simple-audio-card,bitclock-inversion;
162
163 simple-audio-card,cpu {
164 sound-dai = <&mcasp3>;
165 };
166
167 sound0_master: simple-audio-card,codec {
168 sound-dai = <&tlv320aic3104>;
169 assigned-clocks = <&clkoutmux2_clk_mux>;
170 assigned-clock-parents = <&sys_clk2_dclk_div>;
171 clocks = <&clkout2_clk>;
172 };
173 };
174};
175
176&dra7_pmx_core {
177 leds_pins_default: leds_pins_default {
178 pinctrl-single,pins = <
179 DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
180 DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
181 DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
182 DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
183 >;
184 };
185
186 i2c1_pins_default: i2c1_pins_default {
187 pinctrl-single,pins = <
188 DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
189 DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
190 >;
191 };
192
193 hdmi_pins: pinmux_hdmi_pins {
194 pinctrl-single,pins = <
195 DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
196 DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
197 >;
198 };
199
200 i2c3_pins_default: i2c3_pins_default {
201 pinctrl-single,pins = <
202 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
203 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
204 >;
205 };
206
207 uart3_pins_default: uart3_pins_default {
208 pinctrl-single,pins = <
209 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
210 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
211 >;
212 };
213
214 mmc1_pins_default: mmc1_pins_default {
215 pinctrl-single,pins = <
216 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
217 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
218 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
219 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
220 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
221 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
222 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
223 >;
224 };
225
226 mmc2_pins_default: mmc2_pins_default {
227 pinctrl-single,pins = <
228 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
229 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
230 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
231 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
232 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
233 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
234 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
235 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
236 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
237 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
238 >;
239 };
240
241 cpsw_pins_default: cpsw_pins_default {
242 pinctrl-single,pins = <
243 /* Slave 1 */
244 DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
245 DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
246 DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
247 DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
248 DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
249 DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
250 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
251 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
252 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
253 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
254 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
255 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
256
257 /* Slave 2 */
258 DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
259 DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
260 DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
261 DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
262 DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
263 DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
264 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
265 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
266 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
267 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
268 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
269 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
270 >;
271
272 };
273
274 cpsw_pins_sleep: cpsw_pins_sleep {
275 pinctrl-single,pins = <
276 /* Slave 1 */
277 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
278 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
279 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
280 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
281 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
282 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
283 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
284 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
285 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
286 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
287 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
288 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
289
290 /* Slave 2 */
291 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
292 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
293 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
294 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
295 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
296 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
297 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
298 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
299 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
300 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
301 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
302 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
303 >;
304 };
305
306 davinci_mdio_pins_default: davinci_mdio_pins_default {
307 pinctrl-single,pins = <
308 /* MDIO */
309 DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
310 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
311 >;
312 };
313
314 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
315 pinctrl-single,pins = <
316 DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
317 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
318 >;
319 };
320
321 tps659038_pins_default: tps659038_pins_default {
322 pinctrl-single,pins = <
323 DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
324 >;
325 };
326
327 tmp102_pins_default: tmp102_pins_default {
328 pinctrl-single,pins = <
329 DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
330 >;
331 };
332
333 mcp79410_pins_default: mcp79410_pins_default {
334 pinctrl-single,pins = <
335 DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
336 >;
337 };
338
339 usb1_pins: pinmux_usb1_pins {
340 pinctrl-single,pins = <
341 DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
342 >;
343 };
344
345 tpd12s015_pins: pinmux_tpd12s015_pins {
346 pinctrl-single,pins = <
347 DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
348 DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
349 DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
350 >;
351 };
352
353 clkout2_pins_default: clkout2_pins_default {
354 pinctrl-single,pins = <
355 DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
356 >;
357 };
358
359 clkout2_pins_sleep: clkout2_pins_sleep {
360 pinctrl-single,pins = <
361 DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
362 >;
363 };
364
365 mcasp3_pins_default: mcasp3_pins_default {
366 pinctrl-single,pins = <
367 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
368 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
369 DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
370 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
371 >;
372 };
373
374 mcasp3_pins_sleep: mcasp3_pins_sleep {
375 pinctrl-single,pins = <
376 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
377 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
378 DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
379 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
380 >;
381 };
382};
383
384&i2c1 {
385 status = "okay";
386 pinctrl-names = "default";
387 pinctrl-0 = <&i2c1_pins_default>;
388 clock-frequency = <400000>;
389
390 tps659038: tps659038@58 {
391 compatible = "ti,tps659038";
392 reg = <0x58>;
393 interrupt-parent = <&gpio1>;
394 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
395
396 pinctrl-names = "default";
397 pinctrl-0 = <&tps659038_pins_default>;
398
399 #interrupt-cells = <2>;
400 interrupt-controller;
401
402 ti,system-power-controller;
403
404 tps659038_pmic {
405 compatible = "ti,tps659038-pmic";
406
407 regulators {
408 smps12_reg: smps12 {
409 /* VDD_MPU */
410 regulator-name = "smps12";
411 regulator-min-microvolt = < 850000>;
412 regulator-max-microvolt = <1250000>;
413 regulator-always-on;
414 regulator-boot-on;
415 };
416
417 smps3_reg: smps3 {
418 /* VDD_DDR */
419 regulator-name = "smps3";
420 regulator-min-microvolt = <1350000>;
421 regulator-max-microvolt = <1350000>;
422 regulator-always-on;
423 regulator-boot-on;
424 };
425
426 smps45_reg: smps45 {
427 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
428 regulator-name = "smps45";
429 regulator-min-microvolt = < 850000>;
430 regulator-max-microvolt = <1150000>;
431 regulator-always-on;
432 regulator-boot-on;
433 };
434
435 smps6_reg: smps6 {
436 /* VDD_CORE */
437 regulator-name = "smps6";
438 regulator-min-microvolt = <850000>;
439 regulator-max-microvolt = <1030000>;
440 regulator-always-on;
441 regulator-boot-on;
442 };
443
444 /* SMPS7 unused */
445
446 smps8_reg: smps8 {
447 /* VDD_1V8 */
448 regulator-name = "smps8";
449 regulator-min-microvolt = <1800000>;
450 regulator-max-microvolt = <1800000>;
451 regulator-always-on;
452 regulator-boot-on;
453 };
454
455 /* SMPS9 unused */
456
457 ldo1_reg: ldo1 {
458 /* VDD_SD / VDDSHV8 */
459 regulator-name = "ldo1";
460 regulator-min-microvolt = <1800000>;
461 regulator-max-microvolt = <3300000>;
462 regulator-boot-on;
463 regulator-always-on;
464 };
465
466 ldo2_reg: ldo2 {
467 /* VDD_SHV5 */
468 regulator-name = "ldo2";
469 regulator-min-microvolt = <3300000>;
470 regulator-max-microvolt = <3300000>;
471 regulator-always-on;
472 regulator-boot-on;
473 };
474
475 ldo3_reg: ldo3 {
476 /* VDDA_1V8_PHYA */
477 regulator-name = "ldo3";
478 regulator-min-microvolt = <1800000>;
479 regulator-max-microvolt = <1800000>;
480 regulator-always-on;
481 regulator-boot-on;
482 };
483
484 ldo4_reg: ldo4 {
485 /* VDDA_1V8_PHYB */
486 regulator-name = "ldo4";
487 regulator-min-microvolt = <1800000>;
488 regulator-max-microvolt = <1800000>;
489 regulator-always-on;
490 regulator-boot-on;
491 };
492
493 ldo9_reg: ldo9 {
494 /* VDD_RTC */
495 regulator-name = "ldo9";
496 regulator-min-microvolt = <1050000>;
497 regulator-max-microvolt = <1050000>;
498 regulator-always-on;
499 regulator-boot-on;
500 };
501
502 ldoln_reg: ldoln {
503 /* VDDA_1V8_PLL */
504 regulator-name = "ldoln";
505 regulator-min-microvolt = <1800000>;
506 regulator-max-microvolt = <1800000>;
507 regulator-always-on;
508 regulator-boot-on;
509 };
510
511 ldousb_reg: ldousb {
512 /* VDDA_3V_USB: VDDA_USBHS33 */
513 regulator-name = "ldousb";
514 regulator-min-microvolt = <3300000>;
515 regulator-max-microvolt = <3300000>;
516 regulator-boot-on;
517 };
518
519 regen1: regen1 {
520 /* VDD_3V3_ON */
521 regulator-name = "regen1";
522 regulator-boot-on;
523 regulator-always-on;
524 };
525 };
526 };
527
528 tps659038_rtc: tps659038_rtc {
529 compatible = "ti,palmas-rtc";
530 interrupt-parent = <&tps659038>;
531 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
532 wakeup-source;
533 };
534
535 tps659038_pwr_button: tps659038_pwr_button {
536 compatible = "ti,palmas-pwrbutton";
537 interrupt-parent = <&tps659038>;
538 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
539 wakeup-source;
540 ti,palmas-long-press-seconds = <12>;
541 };
542
543 tps659038_gpio: tps659038_gpio {
544 compatible = "ti,palmas-gpio";
545 gpio-controller;
546 #gpio-cells = <2>;
547 };
548
549 extcon_usb2: tps659038_usb {
550 compatible = "ti,palmas-usb-vid";
551 ti,enable-vbus-detection;
552 vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
553 };
554
555 };
556
557 tmp102: tmp102@48 {
558 compatible = "ti,tmp102";
559 reg = <0x48>;
560 pinctrl-names = "default";
561 pinctrl-0 = <&tmp102_pins_default>;
562 interrupt-parent = <&gpio7>;
563 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
564 #thermal-sensor-cells = <1>;
565 };
566
567 tlv320aic3104: tlv320aic3104@18 {
568 #sound-dai-cells = <0>;
569 compatible = "ti,tlv320aic3104";
570 reg = <0x18>;
571 pinctrl-names = "default", "sleep";
572 pinctrl-0 = <&clkout2_pins_default>;
573 pinctrl-1 = <&clkout2_pins_sleep>;
574 status = "okay";
575 adc-settle-ms = <40>;
576
577 AVDD-supply = <&vdd_3v3>;
578 IOVDD-supply = <&vdd_3v3>;
579 DRVDD-supply = <&vdd_3v3>;
580 DVDD-supply = <&aic_dvdd>;
581 };
582
583 eeprom: eeprom@50 {
584 compatible = "at,24c32";
585 reg = <0x50>;
586 };
587};
588
589&i2c3 {
590 status = "okay";
591 pinctrl-names = "default";
592 pinctrl-0 = <&i2c3_pins_default>;
593 clock-frequency = <400000>;
594
595 mcp_rtc: rtc@6f {
596 compatible = "microchip,mcp7941x";
597 reg = <0x6f>;
598 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
599 <&dra7_pmx_core 0x424>;
600 interrupt-names = "irq", "wakeup";
601
602 pinctrl-names = "default";
603 pinctrl-0 = <&mcp79410_pins_default>;
604
605 vcc-supply = <&vdd_3v3>;
606 wakeup-source;
607 };
608};
609
610&gpio7 {
611 ti,no-reset-on-init;
612 ti,no-idle-on-init;
613};
614
615&cpu0 {
616 cpu0-supply = <&smps12_reg>;
617 voltage-tolerance = <1>;
618};
619
620&uart3 {
621 status = "okay";
622 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
623 <&dra7_pmx_core 0x3f8>;
624
625 pinctrl-names = "default";
626 pinctrl-0 = <&uart3_pins_default>;
627};
628
629&mac {
630 status = "okay";
631 pinctrl-names = "default", "sleep";
632 pinctrl-0 = <&cpsw_pins_default>;
633 pinctrl-1 = <&cpsw_pins_sleep>;
634 dual_emac;
635};
636
637&cpsw_emac0 {
638 phy_id = <&davinci_mdio>, <1>;
639 phy-mode = "rgmii";
640 dual_emac_res_vlan = <1>;
641};
642
643&cpsw_emac1 {
644 phy_id = <&davinci_mdio>, <2>;
645 phy-mode = "rgmii";
646 dual_emac_res_vlan = <2>;
647};
648
649&davinci_mdio {
650 pinctrl-names = "default", "sleep";
651 pinctrl-0 = <&davinci_mdio_pins_default>;
652 pinctrl-1 = <&davinci_mdio_pins_sleep>;
653};
654
655&mmc1 {
656 status = "okay";
657
658 pinctrl-names = "default";
659 pinctrl-0 = <&mmc1_pins_default>;
660
661 vmmc-supply = <&ldo1_reg>;
662 bus-width = <4>;
663 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
664};
665
666&mmc2 {
667 status = "okay";
668
669 pinctrl-names = "default";
670 pinctrl-0 = <&mmc2_pins_default>;
671
672 vmmc-supply = <&vdd_3v3>;
673 bus-width = <8>;
674 ti,non-removable;
675 cap-mmc-dual-data-rate;
676};
677
678&sata {
679 status = "okay";
680};
681
682&usb2_phy1 {
683 phy-supply = <&ldousb_reg>;
684};
685
686&usb2_phy2 {
687 phy-supply = <&ldousb_reg>;
688};
689
690&usb1 {
691 dr_mode = "host";
692 pinctrl-names = "default";
693 pinctrl-0 = <&usb1_pins>;
694};
695
696&omap_dwc3_2 {
697 extcon = <&extcon_usb2>;
698};
699
700&usb2 {
701 /*
702 * Stand alone usage is peripheral only.
703 * However, with some resistor modifications
704 * this port can be used via expansion connectors
705 * as "host" or "dual-role". If so, provide
706 * the necessary dr_mode override in the expansion
707 * board's DT.
708 */
709 dr_mode = "peripheral";
710};
711
712&cpu_trips {
713 cpu_alert1: cpu_alert1 {
714 temperature = <50000>; /* millicelsius */
715 hysteresis = <2000>; /* millicelsius */
716 type = "active";
717 };
718};
719
720&cpu_cooling_maps {
721 map1 {
722 trip = <&cpu_alert1>;
723 cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
724 };
725};
726
727&thermal_zones {
728 board_thermal: board_thermal {
729 polling-delay-passive = <1250>; /* milliseconds */
730 polling-delay = <1500>; /* milliseconds */
731
732 /* sensor ID */
733 thermal-sensors = <&tmp102 0>;
734
735 board_trips: trips {
736 board_alert0: board_alert {
737 temperature = <40000>; /* millicelsius */
738 hysteresis = <2000>; /* millicelsius */
739 type = "active";
740 };
741
742 board_crit: board_crit {
743 temperature = <105000>; /* millicelsius */
744 hysteresis = <0>; /* millicelsius */
745 type = "critical";
746 };
747 };
748
749 board_cooling_maps: cooling-maps {
750 map0 {
751 trip = <&board_alert0>;
752 cooling-device =
753 <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
754 };
755 };
756 };
757};
758
759&dss {
760 status = "ok";
761
762 vdda_video-supply = <&ldoln_reg>;
763};
764
765&hdmi {
766 status = "ok";
767 vdda-supply = <&ldo4_reg>;
768
769 pinctrl-names = "default";
770 pinctrl-0 = <&hdmi_pins>;
771
772 port {
773 hdmi_out: endpoint {
774 remote-endpoint = <&tpd12s015_in>;
775 };
776 };
777};
778
779&pcie1 {
780 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
781};
782
783&mcasp3 {
784 #sound-dai-cells = <0>;
785 pinctrl-names = "default", "sleep";
786 pinctrl-0 = <&mcasp3_pins_default>;
787 pinctrl-1 = <&mcasp3_pins_sleep>;
788 assigned-clocks = <&mcasp3_ahclkx_mux>;
789 assigned-clock-parents = <&sys_clkin2>;
790 status = "okay";
791
792 op-mode = <0>; /* MCASP_IIS_MODE */
793 tdm-slots = <2>;
794 /* 4 serializers */
795 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
796 1 2 0 0
797 >;
798};
799
800&mailbox5 {
801 status = "okay";
802 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
803 status = "okay";
804 };
805 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
806 status = "okay";
807 };
808};
809
810&mailbox6 {
811 status = "okay";
812 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
813 status = "okay";
814 };
815 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
816 status = "okay";
817 };
818};