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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
28 *
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
38 * All rights reserved.
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 *
44 * * Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * * Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in
48 * the documentation and/or other materials provided with the
49 * distribution.
50 * * Neither the name Intel Corporation nor the names of its
51 * contributors may be used to endorse or promote products derived
52 * from this software without specific prior written permission.
53 *
54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *
66 *****************************************************************************/
67#include <linux/firmware.h>
68#include <linux/rtnetlink.h>
69#include "iwl-trans.h"
70#include "iwl-csr.h"
71#include "mvm.h"
72#include "iwl-eeprom-parse.h"
73#include "iwl-eeprom-read.h"
74#include "iwl-nvm-parse.h"
75#include "iwl-prph.h"
76#include "fw/acpi.h"
77
78/* Default NVM size to read */
79#define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
80#define IWL_MAX_NVM_SECTION_SIZE 0x1b58
81#define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc
82
83#define NVM_WRITE_OPCODE 1
84#define NVM_READ_OPCODE 0
85
86/* load nvm chunk response */
87enum {
88 READ_NVM_CHUNK_SUCCEED = 0,
89 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
90};
91
92/*
93 * prepare the NVM host command w/ the pointers to the nvm buffer
94 * and send it to fw
95 */
96static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
97 u16 offset, u16 length, const u8 *data)
98{
99 struct iwl_nvm_access_cmd nvm_access_cmd = {
100 .offset = cpu_to_le16(offset),
101 .length = cpu_to_le16(length),
102 .type = cpu_to_le16(section),
103 .op_code = NVM_WRITE_OPCODE,
104 };
105 struct iwl_host_cmd cmd = {
106 .id = NVM_ACCESS_CMD,
107 .len = { sizeof(struct iwl_nvm_access_cmd), length },
108 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
109 .data = { &nvm_access_cmd, data },
110 /* data may come from vmalloc, so use _DUP */
111 .dataflags = { 0, IWL_HCMD_DFL_DUP },
112 };
113 struct iwl_rx_packet *pkt;
114 struct iwl_nvm_access_resp *nvm_resp;
115 int ret;
116
117 ret = iwl_mvm_send_cmd(mvm, &cmd);
118 if (ret)
119 return ret;
120
121 pkt = cmd.resp_pkt;
122 /* Extract & check NVM write response */
123 nvm_resp = (void *)pkt->data;
124 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
125 IWL_ERR(mvm,
126 "NVM access write command failed for section %u (status = 0x%x)\n",
127 section, le16_to_cpu(nvm_resp->status));
128 ret = -EIO;
129 }
130
131 iwl_free_resp(&cmd);
132 return ret;
133}
134
135static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
136 u16 offset, u16 length, u8 *data)
137{
138 struct iwl_nvm_access_cmd nvm_access_cmd = {
139 .offset = cpu_to_le16(offset),
140 .length = cpu_to_le16(length),
141 .type = cpu_to_le16(section),
142 .op_code = NVM_READ_OPCODE,
143 };
144 struct iwl_nvm_access_resp *nvm_resp;
145 struct iwl_rx_packet *pkt;
146 struct iwl_host_cmd cmd = {
147 .id = NVM_ACCESS_CMD,
148 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
149 .data = { &nvm_access_cmd, },
150 };
151 int ret, bytes_read, offset_read;
152 u8 *resp_data;
153
154 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
155
156 ret = iwl_mvm_send_cmd(mvm, &cmd);
157 if (ret)
158 return ret;
159
160 pkt = cmd.resp_pkt;
161
162 /* Extract NVM response */
163 nvm_resp = (void *)pkt->data;
164 ret = le16_to_cpu(nvm_resp->status);
165 bytes_read = le16_to_cpu(nvm_resp->length);
166 offset_read = le16_to_cpu(nvm_resp->offset);
167 resp_data = nvm_resp->data;
168 if (ret) {
169 if ((offset != 0) &&
170 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
171 /*
172 * meaning of NOT_VALID_ADDRESS:
173 * driver try to read chunk from address that is
174 * multiple of 2K and got an error since addr is empty.
175 * meaning of (offset != 0): driver already
176 * read valid data from another chunk so this case
177 * is not an error.
178 */
179 IWL_DEBUG_EEPROM(mvm->trans->dev,
180 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
181 offset);
182 ret = 0;
183 } else {
184 IWL_DEBUG_EEPROM(mvm->trans->dev,
185 "NVM access command failed with status %d (device: %s)\n",
186 ret, mvm->cfg->name);
187 ret = -EIO;
188 }
189 goto exit;
190 }
191
192 if (offset_read != offset) {
193 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
194 offset_read);
195 ret = -EINVAL;
196 goto exit;
197 }
198
199 /* Write data to NVM */
200 memcpy(data + offset, resp_data, bytes_read);
201 ret = bytes_read;
202
203exit:
204 iwl_free_resp(&cmd);
205 return ret;
206}
207
208static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
209 const u8 *data, u16 length)
210{
211 int offset = 0;
212
213 /* copy data in chunks of 2k (and remainder if any) */
214
215 while (offset < length) {
216 int chunk_size, ret;
217
218 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
219 length - offset);
220
221 ret = iwl_nvm_write_chunk(mvm, section, offset,
222 chunk_size, data + offset);
223 if (ret < 0)
224 return ret;
225
226 offset += chunk_size;
227 }
228
229 return 0;
230}
231
232static void iwl_mvm_nvm_fixups(struct iwl_mvm *mvm, unsigned int section,
233 u8 *data, unsigned int len)
234{
235#define IWL_4165_DEVICE_ID 0x5501
236#define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
237
238 if (section == NVM_SECTION_TYPE_PHY_SKU &&
239 mvm->trans->hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
240 (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
241 /* OTP 0x52 bug work around: it's a 1x1 device */
242 data[3] = ANT_B | (ANT_B << 4);
243}
244
245/*
246 * Reads an NVM section completely.
247 * NICs prior to 7000 family doesn't have a real NVM, but just read
248 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
249 * by uCode, we need to manually check in this case that we don't
250 * overflow and try to read more than the EEPROM size.
251 * For 7000 family NICs, we supply the maximal size we can read, and
252 * the uCode fills the response with as much data as we can,
253 * without overflowing, so no check is needed.
254 */
255static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
256 u8 *data, u32 size_read)
257{
258 u16 length, offset = 0;
259 int ret;
260
261 /* Set nvm section read length */
262 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
263
264 ret = length;
265
266 /* Read the NVM until exhausted (reading less than requested) */
267 while (ret == length) {
268 /* Check no memory assumptions fail and cause an overflow */
269 if ((size_read + offset + length) >
270 mvm->cfg->base_params->eeprom_size) {
271 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
272 return -ENOBUFS;
273 }
274
275 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
276 if (ret < 0) {
277 IWL_DEBUG_EEPROM(mvm->trans->dev,
278 "Cannot read NVM from section %d offset %d, length %d\n",
279 section, offset, length);
280 return ret;
281 }
282 offset += ret;
283 }
284
285 iwl_mvm_nvm_fixups(mvm, section, data, offset);
286
287 IWL_DEBUG_EEPROM(mvm->trans->dev,
288 "NVM section %d read completed\n", section);
289 return offset;
290}
291
292static struct iwl_nvm_data *
293iwl_parse_nvm_sections(struct iwl_mvm *mvm)
294{
295 struct iwl_nvm_section *sections = mvm->nvm_sections;
296 const __be16 *hw;
297 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
298 bool lar_enabled;
299 int regulatory_type;
300
301 /* Checking for required sections */
302 if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
303 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
304 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
305 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
306 return NULL;
307 }
308 } else {
309 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
310 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
311 else
312 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
313
314 /* SW and REGULATORY sections are mandatory */
315 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
316 !mvm->nvm_sections[regulatory_type].data) {
317 IWL_ERR(mvm,
318 "Can't parse empty family 8000 OTP/NVM sections\n");
319 return NULL;
320 }
321 /* MAC_OVERRIDE or at least HW section must exist */
322 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
323 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
324 IWL_ERR(mvm,
325 "Can't parse mac_address, empty sections\n");
326 return NULL;
327 }
328
329 /* PHY_SKU section is mandatory in B0 */
330 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
331 IWL_ERR(mvm,
332 "Can't parse phy_sku in B0, empty sections\n");
333 return NULL;
334 }
335 }
336
337 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
338 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
339 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
340 mac_override =
341 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
342 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
343
344 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
345 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
346 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
347
348 lar_enabled = !iwlwifi_mod_params.lar_disable &&
349 fw_has_capa(&mvm->fw->ucode_capa,
350 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
351
352 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib,
353 regulatory, mac_override, phy_sku,
354 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
355 lar_enabled);
356}
357
358#define MAX_NVM_FILE_LEN 16384
359
360/*
361 * Reads external NVM from a file into mvm->nvm_sections
362 *
363 * HOW TO CREATE THE NVM FILE FORMAT:
364 * ------------------------------
365 * 1. create hex file, format:
366 * 3800 -> header
367 * 0000 -> header
368 * 5a40 -> data
369 *
370 * rev - 6 bit (word1)
371 * len - 10 bit (word1)
372 * id - 4 bit (word2)
373 * rsv - 12 bit (word2)
374 *
375 * 2. flip 8bits with 8 bits per line to get the right NVM file format
376 *
377 * 3. create binary file from the hex file
378 *
379 * 4. save as "iNVM_xxx.bin" under /lib/firmware
380 */
381int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
382{
383 int ret, section_size;
384 u16 section_id;
385 const struct firmware *fw_entry;
386 const struct {
387 __le16 word1;
388 __le16 word2;
389 u8 data[];
390 } *file_sec;
391 const u8 *eof;
392 u8 *temp;
393 int max_section_size;
394 const __le32 *dword_buff;
395
396#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
397#define NVM_WORD2_ID(x) (x >> 12)
398#define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
399#define EXT_NVM_WORD1_ID(x) ((x) >> 4)
400#define NVM_HEADER_0 (0x2A504C54)
401#define NVM_HEADER_1 (0x4E564D2A)
402#define NVM_HEADER_SIZE (4 * sizeof(u32))
403
404 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
405
406 /* Maximal size depends on NVM version */
407 if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT)
408 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
409 else
410 max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
411
412 /*
413 * Obtain NVM image via request_firmware. Since we already used
414 * request_firmware_nowait() for the firmware binary load and only
415 * get here after that we assume the NVM request can be satisfied
416 * synchronously.
417 */
418 ret = request_firmware(&fw_entry, mvm->nvm_file_name,
419 mvm->trans->dev);
420 if (ret) {
421 IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
422 mvm->nvm_file_name, ret);
423 return ret;
424 }
425
426 IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
427 mvm->nvm_file_name, fw_entry->size);
428
429 if (fw_entry->size > MAX_NVM_FILE_LEN) {
430 IWL_ERR(mvm, "NVM file too large\n");
431 ret = -EINVAL;
432 goto out;
433 }
434
435 eof = fw_entry->data + fw_entry->size;
436 dword_buff = (__le32 *)fw_entry->data;
437
438 /* some NVM file will contain a header.
439 * The header is identified by 2 dwords header as follow:
440 * dword[0] = 0x2A504C54
441 * dword[1] = 0x4E564D2A
442 *
443 * This header must be skipped when providing the NVM data to the FW.
444 */
445 if (fw_entry->size > NVM_HEADER_SIZE &&
446 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
447 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
448 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
449 IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
450 IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
451 le32_to_cpu(dword_buff[3]));
452
453 /* nvm file validation, dword_buff[2] holds the file version */
454 if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
455 CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP &&
456 le32_to_cpu(dword_buff[2]) < 0xE4A) {
457 ret = -EFAULT;
458 goto out;
459 }
460 } else {
461 file_sec = (void *)fw_entry->data;
462 }
463
464 while (true) {
465 if (file_sec->data > eof) {
466 IWL_ERR(mvm,
467 "ERROR - NVM file too short for section header\n");
468 ret = -EINVAL;
469 break;
470 }
471
472 /* check for EOF marker */
473 if (!file_sec->word1 && !file_sec->word2) {
474 ret = 0;
475 break;
476 }
477
478 if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
479 section_size =
480 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
481 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
482 } else {
483 section_size = 2 * EXT_NVM_WORD2_LEN(
484 le16_to_cpu(file_sec->word2));
485 section_id = EXT_NVM_WORD1_ID(
486 le16_to_cpu(file_sec->word1));
487 }
488
489 if (section_size > max_section_size) {
490 IWL_ERR(mvm, "ERROR - section too large (%d)\n",
491 section_size);
492 ret = -EINVAL;
493 break;
494 }
495
496 if (!section_size) {
497 IWL_ERR(mvm, "ERROR - section empty\n");
498 ret = -EINVAL;
499 break;
500 }
501
502 if (file_sec->data + section_size > eof) {
503 IWL_ERR(mvm,
504 "ERROR - NVM file too short for section (%d bytes)\n",
505 section_size);
506 ret = -EINVAL;
507 break;
508 }
509
510 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
511 "Invalid NVM section ID %d\n", section_id)) {
512 ret = -EINVAL;
513 break;
514 }
515
516 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
517 if (!temp) {
518 ret = -ENOMEM;
519 break;
520 }
521
522 iwl_mvm_nvm_fixups(mvm, section_id, temp, section_size);
523
524 kfree(mvm->nvm_sections[section_id].data);
525 mvm->nvm_sections[section_id].data = temp;
526 mvm->nvm_sections[section_id].length = section_size;
527
528 /* advance to the next section */
529 file_sec = (void *)(file_sec->data + section_size);
530 }
531out:
532 release_firmware(fw_entry);
533 return ret;
534}
535
536/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
537int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
538{
539 int i, ret = 0;
540 struct iwl_nvm_section *sections = mvm->nvm_sections;
541
542 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
543
544 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
545 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
546 continue;
547 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
548 sections[i].length);
549 if (ret < 0) {
550 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
551 break;
552 }
553 }
554 return ret;
555}
556
557int iwl_nvm_init(struct iwl_mvm *mvm)
558{
559 int ret, section;
560 u32 size_read = 0;
561 u8 *nvm_buffer, *temp;
562 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
563
564 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
565 return -EINVAL;
566
567 /* load NVM values from nic */
568 /* Read From FW NVM */
569 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
570
571 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
572 GFP_KERNEL);
573 if (!nvm_buffer)
574 return -ENOMEM;
575 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
576 /* we override the constness for initial read */
577 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
578 size_read);
579 if (ret < 0)
580 continue;
581 size_read += ret;
582 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
583 if (!temp) {
584 ret = -ENOMEM;
585 break;
586 }
587
588 iwl_mvm_nvm_fixups(mvm, section, temp, ret);
589
590 mvm->nvm_sections[section].data = temp;
591 mvm->nvm_sections[section].length = ret;
592
593#ifdef CONFIG_IWLWIFI_DEBUGFS
594 switch (section) {
595 case NVM_SECTION_TYPE_SW:
596 mvm->nvm_sw_blob.data = temp;
597 mvm->nvm_sw_blob.size = ret;
598 break;
599 case NVM_SECTION_TYPE_CALIBRATION:
600 mvm->nvm_calib_blob.data = temp;
601 mvm->nvm_calib_blob.size = ret;
602 break;
603 case NVM_SECTION_TYPE_PRODUCTION:
604 mvm->nvm_prod_blob.data = temp;
605 mvm->nvm_prod_blob.size = ret;
606 break;
607 case NVM_SECTION_TYPE_PHY_SKU:
608 mvm->nvm_phy_sku_blob.data = temp;
609 mvm->nvm_phy_sku_blob.size = ret;
610 break;
611 default:
612 if (section == mvm->cfg->nvm_hw_section_num) {
613 mvm->nvm_hw_blob.data = temp;
614 mvm->nvm_hw_blob.size = ret;
615 break;
616 }
617 }
618#endif
619 }
620 if (!size_read)
621 IWL_ERR(mvm, "OTP is blank\n");
622 kfree(nvm_buffer);
623
624 /* Only if PNVM selected in the mod param - load external NVM */
625 if (mvm->nvm_file_name) {
626 /* read External NVM file from the mod param */
627 ret = iwl_mvm_read_external_nvm(mvm);
628 if (ret) {
629 mvm->nvm_file_name = nvm_file_C;
630
631 if ((ret == -EFAULT || ret == -ENOENT) &&
632 mvm->nvm_file_name) {
633 /* in case nvm file was failed try again */
634 ret = iwl_mvm_read_external_nvm(mvm);
635 if (ret)
636 return ret;
637 } else {
638 return ret;
639 }
640 }
641 }
642
643 /* parse the relevant nvm sections */
644 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
645 if (!mvm->nvm_data)
646 return -ENODATA;
647 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
648 mvm->nvm_data->nvm_version);
649
650 return 0;
651}
652
653struct iwl_mcc_update_resp *
654iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
655 enum iwl_mcc_source src_id)
656{
657 struct iwl_mcc_update_cmd mcc_update_cmd = {
658 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
659 .source_id = (u8)src_id,
660 };
661 struct iwl_mcc_update_resp *resp_cp;
662 struct iwl_rx_packet *pkt;
663 struct iwl_host_cmd cmd = {
664 .id = MCC_UPDATE_CMD,
665 .flags = CMD_WANT_SKB,
666 .data = { &mcc_update_cmd },
667 };
668
669 int ret;
670 u32 status;
671 int resp_len, n_channels;
672 u16 mcc;
673 bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa,
674 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
675
676 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
677 return ERR_PTR(-EOPNOTSUPP);
678
679 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
680 if (!resp_v2)
681 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1);
682
683 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
684 alpha2[0], alpha2[1], src_id);
685
686 ret = iwl_mvm_send_cmd(mvm, &cmd);
687 if (ret)
688 return ERR_PTR(ret);
689
690 pkt = cmd.resp_pkt;
691
692 /* Extract MCC response */
693 if (resp_v2) {
694 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
695
696 n_channels = __le32_to_cpu(mcc_resp->n_channels);
697 resp_len = sizeof(struct iwl_mcc_update_resp) +
698 n_channels * sizeof(__le32);
699 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
700 if (!resp_cp) {
701 resp_cp = ERR_PTR(-ENOMEM);
702 goto exit;
703 }
704 } else {
705 struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = (void *)pkt->data;
706
707 n_channels = __le32_to_cpu(mcc_resp_v1->n_channels);
708 resp_len = sizeof(struct iwl_mcc_update_resp) +
709 n_channels * sizeof(__le32);
710 resp_cp = kzalloc(resp_len, GFP_KERNEL);
711 if (!resp_cp) {
712 resp_cp = ERR_PTR(-ENOMEM);
713 goto exit;
714 }
715
716 resp_cp->status = mcc_resp_v1->status;
717 resp_cp->mcc = mcc_resp_v1->mcc;
718 resp_cp->cap = mcc_resp_v1->cap;
719 resp_cp->source_id = mcc_resp_v1->source_id;
720 resp_cp->n_channels = mcc_resp_v1->n_channels;
721 memcpy(resp_cp->channels, mcc_resp_v1->channels,
722 n_channels * sizeof(__le32));
723 }
724
725 status = le32_to_cpu(resp_cp->status);
726
727 mcc = le16_to_cpu(resp_cp->mcc);
728
729 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
730 if (mcc == 0) {
731 mcc = 0x3030; /* "00" - world */
732 resp_cp->mcc = cpu_to_le16(mcc);
733 }
734
735 IWL_DEBUG_LAR(mvm,
736 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n",
737 status, mcc, mcc >> 8, mcc & 0xff,
738 !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels);
739
740exit:
741 iwl_free_resp(&cmd);
742 return resp_cp;
743}
744
745int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
746{
747 bool tlv_lar;
748 bool nvm_lar;
749 int retval;
750 struct ieee80211_regdomain *regd;
751 char mcc[3];
752
753 if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
754 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
755 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
756 nvm_lar = mvm->nvm_data->lar_enabled;
757 if (tlv_lar != nvm_lar)
758 IWL_INFO(mvm,
759 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
760 tlv_lar ? "enabled" : "disabled",
761 nvm_lar ? "enabled" : "disabled");
762 }
763
764 if (!iwl_mvm_is_lar_supported(mvm))
765 return 0;
766
767 /*
768 * try to replay the last set MCC to FW. If it doesn't exist,
769 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
770 */
771 retval = iwl_mvm_init_fw_regd(mvm);
772 if (retval != -ENOENT)
773 return retval;
774
775 /*
776 * Driver regulatory hint for initial update, this also informs the
777 * firmware we support wifi location updates.
778 * Disallow scans that might crash the FW while the LAR regdomain
779 * is not set.
780 */
781 mvm->lar_regdom_set = false;
782
783 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
784 if (IS_ERR_OR_NULL(regd))
785 return -EIO;
786
787 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
788 !iwl_acpi_get_mcc(mvm->dev, mcc)) {
789 kfree(regd);
790 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
791 MCC_SOURCE_BIOS, NULL);
792 if (IS_ERR_OR_NULL(regd))
793 return -EIO;
794 }
795
796 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
797 kfree(regd);
798 return retval;
799}
800
801void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
802 struct iwl_rx_cmd_buffer *rxb)
803{
804 struct iwl_rx_packet *pkt = rxb_addr(rxb);
805 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
806 enum iwl_mcc_source src;
807 char mcc[3];
808 struct ieee80211_regdomain *regd;
809
810 lockdep_assert_held(&mvm->mutex);
811
812 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
813 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
814 return;
815 }
816
817 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
818 return;
819
820 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
821 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
822 mcc[2] = '\0';
823 src = notif->source_id;
824
825 IWL_DEBUG_LAR(mvm,
826 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
827 mcc, src);
828 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
829 if (IS_ERR_OR_NULL(regd))
830 return;
831
832 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
833 kfree(regd);
834}
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
28 *
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * Copyright(c) 2016 Intel Deutschland GmbH
38 * All rights reserved.
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 *
44 * * Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * * Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in
48 * the documentation and/or other materials provided with the
49 * distribution.
50 * * Neither the name Intel Corporation nor the names of its
51 * contributors may be used to endorse or promote products derived
52 * from this software without specific prior written permission.
53 *
54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *
66 *****************************************************************************/
67#include <linux/firmware.h>
68#include <linux/rtnetlink.h>
69#include "iwl-trans.h"
70#include "iwl-csr.h"
71#include "mvm.h"
72#include "iwl-eeprom-parse.h"
73#include "iwl-eeprom-read.h"
74#include "iwl-nvm-parse.h"
75#include "iwl-prph.h"
76
77/* Default NVM size to read */
78#define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
79#define IWL_MAX_NVM_SECTION_SIZE 0x1b58
80#define IWL_MAX_NVM_8000_SECTION_SIZE 0x1ffc
81
82#define NVM_WRITE_OPCODE 1
83#define NVM_READ_OPCODE 0
84
85/* load nvm chunk response */
86enum {
87 READ_NVM_CHUNK_SUCCEED = 0,
88 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
89};
90
91/*
92 * prepare the NVM host command w/ the pointers to the nvm buffer
93 * and send it to fw
94 */
95static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
96 u16 offset, u16 length, const u8 *data)
97{
98 struct iwl_nvm_access_cmd nvm_access_cmd = {
99 .offset = cpu_to_le16(offset),
100 .length = cpu_to_le16(length),
101 .type = cpu_to_le16(section),
102 .op_code = NVM_WRITE_OPCODE,
103 };
104 struct iwl_host_cmd cmd = {
105 .id = NVM_ACCESS_CMD,
106 .len = { sizeof(struct iwl_nvm_access_cmd), length },
107 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
108 .data = { &nvm_access_cmd, data },
109 /* data may come from vmalloc, so use _DUP */
110 .dataflags = { 0, IWL_HCMD_DFL_DUP },
111 };
112 struct iwl_rx_packet *pkt;
113 struct iwl_nvm_access_resp *nvm_resp;
114 int ret;
115
116 ret = iwl_mvm_send_cmd(mvm, &cmd);
117 if (ret)
118 return ret;
119
120 pkt = cmd.resp_pkt;
121 if (!pkt) {
122 IWL_ERR(mvm, "Error in NVM_ACCESS response\n");
123 return -EINVAL;
124 }
125 /* Extract & check NVM write response */
126 nvm_resp = (void *)pkt->data;
127 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
128 IWL_ERR(mvm,
129 "NVM access write command failed for section %u (status = 0x%x)\n",
130 section, le16_to_cpu(nvm_resp->status));
131 ret = -EIO;
132 }
133
134 iwl_free_resp(&cmd);
135 return ret;
136}
137
138static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
139 u16 offset, u16 length, u8 *data)
140{
141 struct iwl_nvm_access_cmd nvm_access_cmd = {
142 .offset = cpu_to_le16(offset),
143 .length = cpu_to_le16(length),
144 .type = cpu_to_le16(section),
145 .op_code = NVM_READ_OPCODE,
146 };
147 struct iwl_nvm_access_resp *nvm_resp;
148 struct iwl_rx_packet *pkt;
149 struct iwl_host_cmd cmd = {
150 .id = NVM_ACCESS_CMD,
151 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
152 .data = { &nvm_access_cmd, },
153 };
154 int ret, bytes_read, offset_read;
155 u8 *resp_data;
156
157 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
158
159 ret = iwl_mvm_send_cmd(mvm, &cmd);
160 if (ret)
161 return ret;
162
163 pkt = cmd.resp_pkt;
164
165 /* Extract NVM response */
166 nvm_resp = (void *)pkt->data;
167 ret = le16_to_cpu(nvm_resp->status);
168 bytes_read = le16_to_cpu(nvm_resp->length);
169 offset_read = le16_to_cpu(nvm_resp->offset);
170 resp_data = nvm_resp->data;
171 if (ret) {
172 if ((offset != 0) &&
173 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
174 /*
175 * meaning of NOT_VALID_ADDRESS:
176 * driver try to read chunk from address that is
177 * multiple of 2K and got an error since addr is empty.
178 * meaning of (offset != 0): driver already
179 * read valid data from another chunk so this case
180 * is not an error.
181 */
182 IWL_DEBUG_EEPROM(mvm->trans->dev,
183 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
184 offset);
185 ret = 0;
186 } else {
187 IWL_DEBUG_EEPROM(mvm->trans->dev,
188 "NVM access command failed with status %d (device: %s)\n",
189 ret, mvm->cfg->name);
190 ret = -EIO;
191 }
192 goto exit;
193 }
194
195 if (offset_read != offset) {
196 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
197 offset_read);
198 ret = -EINVAL;
199 goto exit;
200 }
201
202 /* Write data to NVM */
203 memcpy(data + offset, resp_data, bytes_read);
204 ret = bytes_read;
205
206exit:
207 iwl_free_resp(&cmd);
208 return ret;
209}
210
211static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
212 const u8 *data, u16 length)
213{
214 int offset = 0;
215
216 /* copy data in chunks of 2k (and remainder if any) */
217
218 while (offset < length) {
219 int chunk_size, ret;
220
221 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
222 length - offset);
223
224 ret = iwl_nvm_write_chunk(mvm, section, offset,
225 chunk_size, data + offset);
226 if (ret < 0)
227 return ret;
228
229 offset += chunk_size;
230 }
231
232 return 0;
233}
234
235static void iwl_mvm_nvm_fixups(struct iwl_mvm *mvm, unsigned int section,
236 u8 *data, unsigned int len)
237{
238#define IWL_4165_DEVICE_ID 0x5501
239#define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
240
241 if (section == NVM_SECTION_TYPE_PHY_SKU &&
242 mvm->trans->hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
243 (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
244 /* OTP 0x52 bug work around: it's a 1x1 device */
245 data[3] = ANT_B | (ANT_B << 4);
246}
247
248/*
249 * Reads an NVM section completely.
250 * NICs prior to 7000 family doesn't have a real NVM, but just read
251 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
252 * by uCode, we need to manually check in this case that we don't
253 * overflow and try to read more than the EEPROM size.
254 * For 7000 family NICs, we supply the maximal size we can read, and
255 * the uCode fills the response with as much data as we can,
256 * without overflowing, so no check is needed.
257 */
258static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
259 u8 *data, u32 size_read)
260{
261 u16 length, offset = 0;
262 int ret;
263
264 /* Set nvm section read length */
265 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
266
267 ret = length;
268
269 /* Read the NVM until exhausted (reading less than requested) */
270 while (ret == length) {
271 /* Check no memory assumptions fail and cause an overflow */
272 if ((size_read + offset + length) >
273 mvm->cfg->base_params->eeprom_size) {
274 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
275 return -ENOBUFS;
276 }
277
278 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
279 if (ret < 0) {
280 IWL_DEBUG_EEPROM(mvm->trans->dev,
281 "Cannot read NVM from section %d offset %d, length %d\n",
282 section, offset, length);
283 return ret;
284 }
285 offset += ret;
286 }
287
288 iwl_mvm_nvm_fixups(mvm, section, data, offset);
289
290 IWL_DEBUG_EEPROM(mvm->trans->dev,
291 "NVM section %d read completed\n", section);
292 return offset;
293}
294
295static struct iwl_nvm_data *
296iwl_parse_nvm_sections(struct iwl_mvm *mvm)
297{
298 struct iwl_nvm_section *sections = mvm->nvm_sections;
299 const __le16 *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;
300 bool lar_enabled;
301
302 /* Checking for required sections */
303 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
304 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
305 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
306 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
307 return NULL;
308 }
309 } else {
310 /* SW and REGULATORY sections are mandatory */
311 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
312 !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
313 IWL_ERR(mvm,
314 "Can't parse empty family 8000 OTP/NVM sections\n");
315 return NULL;
316 }
317 /* MAC_OVERRIDE or at least HW section must exist */
318 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
319 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
320 IWL_ERR(mvm,
321 "Can't parse mac_address, empty sections\n");
322 return NULL;
323 }
324
325 /* PHY_SKU section is mandatory in B0 */
326 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
327 IWL_ERR(mvm,
328 "Can't parse phy_sku in B0, empty sections\n");
329 return NULL;
330 }
331 }
332
333 if (WARN_ON(!mvm->cfg))
334 return NULL;
335
336 hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
337 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
338 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
339 regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
340 mac_override =
341 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
342 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
343
344 lar_enabled = !iwlwifi_mod_params.lar_disable &&
345 fw_has_capa(&mvm->fw->ucode_capa,
346 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
347
348 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib,
349 regulatory, mac_override, phy_sku,
350 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
351 lar_enabled);
352}
353
354#define MAX_NVM_FILE_LEN 16384
355
356/*
357 * Reads external NVM from a file into mvm->nvm_sections
358 *
359 * HOW TO CREATE THE NVM FILE FORMAT:
360 * ------------------------------
361 * 1. create hex file, format:
362 * 3800 -> header
363 * 0000 -> header
364 * 5a40 -> data
365 *
366 * rev - 6 bit (word1)
367 * len - 10 bit (word1)
368 * id - 4 bit (word2)
369 * rsv - 12 bit (word2)
370 *
371 * 2. flip 8bits with 8 bits per line to get the right NVM file format
372 *
373 * 3. create binary file from the hex file
374 *
375 * 4. save as "iNVM_xxx.bin" under /lib/firmware
376 */
377static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
378{
379 int ret, section_size;
380 u16 section_id;
381 const struct firmware *fw_entry;
382 const struct {
383 __le16 word1;
384 __le16 word2;
385 u8 data[];
386 } *file_sec;
387 const u8 *eof;
388 u8 *temp;
389 int max_section_size;
390 const __le32 *dword_buff;
391
392#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
393#define NVM_WORD2_ID(x) (x >> 12)
394#define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8))
395#define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
396#define NVM_HEADER_0 (0x2A504C54)
397#define NVM_HEADER_1 (0x4E564D2A)
398#define NVM_HEADER_SIZE (4 * sizeof(u32))
399
400 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
401
402 /* Maximal size depends on HW family and step */
403 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
404 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
405 else
406 max_section_size = IWL_MAX_NVM_8000_SECTION_SIZE;
407
408 /*
409 * Obtain NVM image via request_firmware. Since we already used
410 * request_firmware_nowait() for the firmware binary load and only
411 * get here after that we assume the NVM request can be satisfied
412 * synchronously.
413 */
414 ret = request_firmware(&fw_entry, mvm->nvm_file_name,
415 mvm->trans->dev);
416 if (ret) {
417 IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
418 mvm->nvm_file_name, ret);
419 return ret;
420 }
421
422 IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
423 mvm->nvm_file_name, fw_entry->size);
424
425 if (fw_entry->size > MAX_NVM_FILE_LEN) {
426 IWL_ERR(mvm, "NVM file too large\n");
427 ret = -EINVAL;
428 goto out;
429 }
430
431 eof = fw_entry->data + fw_entry->size;
432 dword_buff = (__le32 *)fw_entry->data;
433
434 /* some NVM file will contain a header.
435 * The header is identified by 2 dwords header as follow:
436 * dword[0] = 0x2A504C54
437 * dword[1] = 0x4E564D2A
438 *
439 * This header must be skipped when providing the NVM data to the FW.
440 */
441 if (fw_entry->size > NVM_HEADER_SIZE &&
442 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
443 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
444 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
445 IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
446 IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
447 le32_to_cpu(dword_buff[3]));
448
449 /* nvm file validation, dword_buff[2] holds the file version */
450 if ((CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP &&
451 le32_to_cpu(dword_buff[2]) < 0xE4A) ||
452 (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_B_STEP &&
453 le32_to_cpu(dword_buff[2]) >= 0xE4A)) {
454 ret = -EFAULT;
455 goto out;
456 }
457 } else {
458 file_sec = (void *)fw_entry->data;
459 }
460
461 while (true) {
462 if (file_sec->data > eof) {
463 IWL_ERR(mvm,
464 "ERROR - NVM file too short for section header\n");
465 ret = -EINVAL;
466 break;
467 }
468
469 /* check for EOF marker */
470 if (!file_sec->word1 && !file_sec->word2) {
471 ret = 0;
472 break;
473 }
474
475 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
476 section_size =
477 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
478 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
479 } else {
480 section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
481 le16_to_cpu(file_sec->word2));
482 section_id = NVM_WORD1_ID_FAMILY_8000(
483 le16_to_cpu(file_sec->word1));
484 }
485
486 if (section_size > max_section_size) {
487 IWL_ERR(mvm, "ERROR - section too large (%d)\n",
488 section_size);
489 ret = -EINVAL;
490 break;
491 }
492
493 if (!section_size) {
494 IWL_ERR(mvm, "ERROR - section empty\n");
495 ret = -EINVAL;
496 break;
497 }
498
499 if (file_sec->data + section_size > eof) {
500 IWL_ERR(mvm,
501 "ERROR - NVM file too short for section (%d bytes)\n",
502 section_size);
503 ret = -EINVAL;
504 break;
505 }
506
507 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
508 "Invalid NVM section ID %d\n", section_id)) {
509 ret = -EINVAL;
510 break;
511 }
512
513 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
514 if (!temp) {
515 ret = -ENOMEM;
516 break;
517 }
518
519 iwl_mvm_nvm_fixups(mvm, section_id, temp, section_size);
520
521 kfree(mvm->nvm_sections[section_id].data);
522 mvm->nvm_sections[section_id].data = temp;
523 mvm->nvm_sections[section_id].length = section_size;
524
525 /* advance to the next section */
526 file_sec = (void *)(file_sec->data + section_size);
527 }
528out:
529 release_firmware(fw_entry);
530 return ret;
531}
532
533/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
534int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
535{
536 int i, ret = 0;
537 struct iwl_nvm_section *sections = mvm->nvm_sections;
538
539 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
540
541 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
542 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
543 continue;
544 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
545 sections[i].length);
546 if (ret < 0) {
547 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
548 break;
549 }
550 }
551 return ret;
552}
553
554int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
555{
556 int ret, section;
557 u32 size_read = 0;
558 u8 *nvm_buffer, *temp;
559 const char *nvm_file_B = mvm->cfg->default_nvm_file_B_step;
560 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
561
562 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
563 return -EINVAL;
564
565 /* load NVM values from nic */
566 if (read_nvm_from_nic) {
567 /* Read From FW NVM */
568 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
569
570 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
571 GFP_KERNEL);
572 if (!nvm_buffer)
573 return -ENOMEM;
574 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
575 /* we override the constness for initial read */
576 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
577 size_read);
578 if (ret < 0)
579 continue;
580 size_read += ret;
581 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
582 if (!temp) {
583 ret = -ENOMEM;
584 break;
585 }
586
587 iwl_mvm_nvm_fixups(mvm, section, temp, ret);
588
589 mvm->nvm_sections[section].data = temp;
590 mvm->nvm_sections[section].length = ret;
591
592#ifdef CONFIG_IWLWIFI_DEBUGFS
593 switch (section) {
594 case NVM_SECTION_TYPE_SW:
595 mvm->nvm_sw_blob.data = temp;
596 mvm->nvm_sw_blob.size = ret;
597 break;
598 case NVM_SECTION_TYPE_CALIBRATION:
599 mvm->nvm_calib_blob.data = temp;
600 mvm->nvm_calib_blob.size = ret;
601 break;
602 case NVM_SECTION_TYPE_PRODUCTION:
603 mvm->nvm_prod_blob.data = temp;
604 mvm->nvm_prod_blob.size = ret;
605 break;
606 case NVM_SECTION_TYPE_PHY_SKU:
607 mvm->nvm_phy_sku_blob.data = temp;
608 mvm->nvm_phy_sku_blob.size = ret;
609 break;
610 default:
611 if (section == mvm->cfg->nvm_hw_section_num) {
612 mvm->nvm_hw_blob.data = temp;
613 mvm->nvm_hw_blob.size = ret;
614 break;
615 }
616 }
617#endif
618 }
619 if (!size_read)
620 IWL_ERR(mvm, "OTP is blank\n");
621 kfree(nvm_buffer);
622 }
623
624 /* Only if PNVM selected in the mod param - load external NVM */
625 if (mvm->nvm_file_name) {
626 /* read External NVM file from the mod param */
627 ret = iwl_mvm_read_external_nvm(mvm);
628 if (ret) {
629 /* choose the nvm_file name according to the
630 * HW step
631 */
632 if (CSR_HW_REV_STEP(mvm->trans->hw_rev) ==
633 SILICON_B_STEP)
634 mvm->nvm_file_name = nvm_file_B;
635 else
636 mvm->nvm_file_name = nvm_file_C;
637
638 if ((ret == -EFAULT || ret == -ENOENT) &&
639 mvm->nvm_file_name) {
640 /* in case nvm file was failed try again */
641 ret = iwl_mvm_read_external_nvm(mvm);
642 if (ret)
643 return ret;
644 } else {
645 return ret;
646 }
647 }
648 }
649
650 /* parse the relevant nvm sections */
651 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
652 if (!mvm->nvm_data)
653 return -ENODATA;
654 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
655 mvm->nvm_data->nvm_version);
656
657 return 0;
658}
659
660struct iwl_mcc_update_resp *
661iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
662 enum iwl_mcc_source src_id)
663{
664 struct iwl_mcc_update_cmd mcc_update_cmd = {
665 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
666 .source_id = (u8)src_id,
667 };
668 struct iwl_mcc_update_resp *resp_cp;
669 struct iwl_rx_packet *pkt;
670 struct iwl_host_cmd cmd = {
671 .id = MCC_UPDATE_CMD,
672 .flags = CMD_WANT_SKB,
673 .data = { &mcc_update_cmd },
674 };
675
676 int ret;
677 u32 status;
678 int resp_len, n_channels;
679 u16 mcc;
680 bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa,
681 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
682
683 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
684 return ERR_PTR(-EOPNOTSUPP);
685
686 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
687 if (!resp_v2)
688 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1);
689
690 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
691 alpha2[0], alpha2[1], src_id);
692
693 ret = iwl_mvm_send_cmd(mvm, &cmd);
694 if (ret)
695 return ERR_PTR(ret);
696
697 pkt = cmd.resp_pkt;
698
699 /* Extract MCC response */
700 if (resp_v2) {
701 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
702
703 n_channels = __le32_to_cpu(mcc_resp->n_channels);
704 resp_len = sizeof(struct iwl_mcc_update_resp) +
705 n_channels * sizeof(__le32);
706 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
707 } else {
708 struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = (void *)pkt->data;
709
710 n_channels = __le32_to_cpu(mcc_resp_v1->n_channels);
711 resp_len = sizeof(struct iwl_mcc_update_resp) +
712 n_channels * sizeof(__le32);
713 resp_cp = kzalloc(resp_len, GFP_KERNEL);
714
715 if (resp_cp) {
716 resp_cp->status = mcc_resp_v1->status;
717 resp_cp->mcc = mcc_resp_v1->mcc;
718 resp_cp->cap = mcc_resp_v1->cap;
719 resp_cp->source_id = mcc_resp_v1->source_id;
720 resp_cp->n_channels = mcc_resp_v1->n_channels;
721 memcpy(resp_cp->channels, mcc_resp_v1->channels,
722 n_channels * sizeof(__le32));
723 }
724 }
725
726 if (!resp_cp) {
727 ret = -ENOMEM;
728 goto exit;
729 }
730
731 status = le32_to_cpu(resp_cp->status);
732
733 mcc = le16_to_cpu(resp_cp->mcc);
734
735 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
736 if (mcc == 0) {
737 mcc = 0x3030; /* "00" - world */
738 resp_cp->mcc = cpu_to_le16(mcc);
739 }
740
741 IWL_DEBUG_LAR(mvm,
742 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n",
743 status, mcc, mcc >> 8, mcc & 0xff,
744 !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels);
745
746exit:
747 iwl_free_resp(&cmd);
748 if (ret)
749 return ERR_PTR(ret);
750 return resp_cp;
751}
752
753int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
754{
755 bool tlv_lar;
756 bool nvm_lar;
757 int retval;
758 struct ieee80211_regdomain *regd;
759 char mcc[3];
760
761 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
762 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
763 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
764 nvm_lar = mvm->nvm_data->lar_enabled;
765 if (tlv_lar != nvm_lar)
766 IWL_INFO(mvm,
767 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
768 tlv_lar ? "enabled" : "disabled",
769 nvm_lar ? "enabled" : "disabled");
770 }
771
772 if (!iwl_mvm_is_lar_supported(mvm))
773 return 0;
774
775 /*
776 * try to replay the last set MCC to FW. If it doesn't exist,
777 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
778 */
779 retval = iwl_mvm_init_fw_regd(mvm);
780 if (retval != -ENOENT)
781 return retval;
782
783 /*
784 * Driver regulatory hint for initial update, this also informs the
785 * firmware we support wifi location updates.
786 * Disallow scans that might crash the FW while the LAR regdomain
787 * is not set.
788 */
789 mvm->lar_regdom_set = false;
790
791 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
792 if (IS_ERR_OR_NULL(regd))
793 return -EIO;
794
795 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
796 !iwl_get_bios_mcc(mvm->dev, mcc)) {
797 kfree(regd);
798 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
799 MCC_SOURCE_BIOS, NULL);
800 if (IS_ERR_OR_NULL(regd))
801 return -EIO;
802 }
803
804 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
805 kfree(regd);
806 return retval;
807}
808
809void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
810 struct iwl_rx_cmd_buffer *rxb)
811{
812 struct iwl_rx_packet *pkt = rxb_addr(rxb);
813 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
814 enum iwl_mcc_source src;
815 char mcc[3];
816 struct ieee80211_regdomain *regd;
817
818 lockdep_assert_held(&mvm->mutex);
819
820 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
821 return;
822
823 mcc[0] = notif->mcc >> 8;
824 mcc[1] = notif->mcc & 0xff;
825 mcc[2] = '\0';
826 src = notif->source_id;
827
828 IWL_DEBUG_LAR(mvm,
829 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
830 mcc, src);
831 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
832 if (IS_ERR_OR_NULL(regd))
833 return;
834
835 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
836 kfree(regd);
837}