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v4.17
  1/*
  2 * Copyright 2014 Advanced Micro Devices, Inc.
  3 * All Rights Reserved.
  4 *
  5 * Permission is hereby granted, free of charge, to any person obtaining a
  6 * copy of this software and associated documentation files (the
  7 * "Software"), to deal in the Software without restriction, including
  8 * without limitation the rights to use, copy, modify, merge, publish,
  9 * distribute, sub license, and/or sell copies of the Software, and to
 10 * permit persons to whom the Software is furnished to do so, subject to
 11 * the following conditions:
 12 *
 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 20 *
 21 * The above copyright notice and this permission notice (including the
 22 * next paragraph) shall be included in all copies or substantial portions
 23 * of the Software.
 24 *
 25 */
 26/*
 27 * Authors:
 28 *    Christian König <christian.koenig@amd.com>
 29 */
 30
 31#include <linux/firmware.h>
 32#include <linux/module.h>
 33#include <linux/mmu_notifier.h>
 34#include <linux/interval_tree.h>
 35#include <drm/drmP.h>
 36#include <drm/drm.h>
 37
 38#include "amdgpu.h"
 39
 40struct amdgpu_mn {
 41	/* constant after initialisation */
 42	struct amdgpu_device	*adev;
 43	struct mm_struct	*mm;
 44	struct mmu_notifier	mn;
 45
 46	/* only used on destruction */
 47	struct work_struct	work;
 48
 49	/* protected by adev->mn_lock */
 50	struct hlist_node	node;
 51
 52	/* objects protected by lock */
 53	struct rw_semaphore	lock;
 54	struct rb_root_cached	objects;
 55	struct mutex		read_lock;
 56	atomic_t		recursion;
 57};
 58
 59struct amdgpu_mn_node {
 60	struct interval_tree_node	it;
 61	struct list_head		bos;
 62};
 63
 64/**
 65 * amdgpu_mn_destroy - destroy the rmn
 66 *
 67 * @work: previously sheduled work item
 68 *
 69 * Lazy destroys the notifier from a work item
 70 */
 71static void amdgpu_mn_destroy(struct work_struct *work)
 72{
 73	struct amdgpu_mn *rmn = container_of(work, struct amdgpu_mn, work);
 74	struct amdgpu_device *adev = rmn->adev;
 75	struct amdgpu_mn_node *node, *next_node;
 76	struct amdgpu_bo *bo, *next_bo;
 77
 78	mutex_lock(&adev->mn_lock);
 79	down_write(&rmn->lock);
 80	hash_del(&rmn->node);
 81	rbtree_postorder_for_each_entry_safe(node, next_node,
 82					     &rmn->objects.rb_root, it.rb) {
 83		list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) {
 84			bo->mn = NULL;
 85			list_del_init(&bo->mn_list);
 86		}
 87		kfree(node);
 88	}
 89	up_write(&rmn->lock);
 90	mutex_unlock(&adev->mn_lock);
 91	mmu_notifier_unregister_no_release(&rmn->mn, rmn->mm);
 92	kfree(rmn);
 93}
 94
 95/**
 96 * amdgpu_mn_release - callback to notify about mm destruction
 97 *
 98 * @mn: our notifier
 99 * @mn: the mm this callback is about
100 *
101 * Shedule a work item to lazy destroy our notifier.
102 */
103static void amdgpu_mn_release(struct mmu_notifier *mn,
104			      struct mm_struct *mm)
105{
106	struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
107	INIT_WORK(&rmn->work, amdgpu_mn_destroy);
108	schedule_work(&rmn->work);
109}
110
111
112/**
113 * amdgpu_mn_lock - take the write side lock for this mn
114 */
115void amdgpu_mn_lock(struct amdgpu_mn *mn)
116{
117	if (mn)
118		down_write(&mn->lock);
119}
120
121/**
122 * amdgpu_mn_unlock - drop the write side lock for this mn
123 */
124void amdgpu_mn_unlock(struct amdgpu_mn *mn)
125{
126	if (mn)
127		up_write(&mn->lock);
128}
129
130/**
131 * amdgpu_mn_read_lock - take the rmn read lock
132 *
133 * @rmn: our notifier
134 *
135 * Take the rmn read side lock.
136 */
137static void amdgpu_mn_read_lock(struct amdgpu_mn *rmn)
138{
139	mutex_lock(&rmn->read_lock);
140	if (atomic_inc_return(&rmn->recursion) == 1)
141		down_read_non_owner(&rmn->lock);
142	mutex_unlock(&rmn->read_lock);
143}
144
145/**
146 * amdgpu_mn_read_unlock - drop the rmn read lock
147 *
148 * @rmn: our notifier
149 *
150 * Drop the rmn read side lock.
151 */
152static void amdgpu_mn_read_unlock(struct amdgpu_mn *rmn)
153{
154	if (atomic_dec_return(&rmn->recursion) == 0)
155		up_read_non_owner(&rmn->lock);
156}
157
158/**
159 * amdgpu_mn_invalidate_node - unmap all BOs of a node
160 *
161 * @node: the node with the BOs to unmap
162 *
163 * We block for all BOs and unmap them by move them
164 * into system domain again.
165 */
166static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node,
167				      unsigned long start,
168				      unsigned long end)
169{
170	struct amdgpu_bo *bo;
171	long r;
172
173	list_for_each_entry(bo, &node->bos, mn_list) {
174
175		if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start, end))
176			continue;
177
 
 
 
 
 
 
178		r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
179			true, false, MAX_SCHEDULE_TIMEOUT);
180		if (r <= 0)
181			DRM_ERROR("(%ld) failed to wait for user bo\n", r);
182
183		amdgpu_ttm_tt_mark_user_pages(bo->tbo.ttm);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
184	}
 
 
185}
186
187/**
188 * amdgpu_mn_invalidate_range_start - callback to notify about mm change
189 *
190 * @mn: our notifier
191 * @mn: the mm this callback is about
192 * @start: start of updated range
193 * @end: end of updated range
194 *
195 * We block for all BOs between start and end to be idle and
196 * unmap them by move them into system domain again.
197 */
198static void amdgpu_mn_invalidate_range_start(struct mmu_notifier *mn,
199					     struct mm_struct *mm,
200					     unsigned long start,
201					     unsigned long end)
202{
203	struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
204	struct interval_tree_node *it;
205
206	/* notification is exclusive, but interval is inclusive */
207	end -= 1;
208
209	amdgpu_mn_read_lock(rmn);
210
211	it = interval_tree_iter_first(&rmn->objects, start, end);
212	while (it) {
213		struct amdgpu_mn_node *node;
214
215		node = container_of(it, struct amdgpu_mn_node, it);
216		it = interval_tree_iter_next(it, start, end);
217
218		amdgpu_mn_invalidate_node(node, start, end);
219	}
220}
221
222/**
223 * amdgpu_mn_invalidate_range_end - callback to notify about mm change
224 *
225 * @mn: our notifier
226 * @mn: the mm this callback is about
227 * @start: start of updated range
228 * @end: end of updated range
229 *
230 * Release the lock again to allow new command submissions.
231 */
232static void amdgpu_mn_invalidate_range_end(struct mmu_notifier *mn,
233					   struct mm_struct *mm,
234					   unsigned long start,
235					   unsigned long end)
236{
237	struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
238
239	amdgpu_mn_read_unlock(rmn);
240}
241
242static const struct mmu_notifier_ops amdgpu_mn_ops = {
243	.release = amdgpu_mn_release,
 
244	.invalidate_range_start = amdgpu_mn_invalidate_range_start,
245	.invalidate_range_end = amdgpu_mn_invalidate_range_end,
246};
247
248/**
249 * amdgpu_mn_get - create notifier context
250 *
251 * @adev: amdgpu device pointer
252 *
253 * Creates a notifier context for current->mm.
254 */
255struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev)
256{
257	struct mm_struct *mm = current->mm;
258	struct amdgpu_mn *rmn;
259	int r;
260
261	mutex_lock(&adev->mn_lock);
262	if (down_write_killable(&mm->mmap_sem)) {
263		mutex_unlock(&adev->mn_lock);
264		return ERR_PTR(-EINTR);
265	}
266
267	hash_for_each_possible(adev->mn_hash, rmn, node, (unsigned long)mm)
268		if (rmn->mm == mm)
269			goto release_locks;
270
271	rmn = kzalloc(sizeof(*rmn), GFP_KERNEL);
272	if (!rmn) {
273		rmn = ERR_PTR(-ENOMEM);
274		goto release_locks;
275	}
276
277	rmn->adev = adev;
278	rmn->mm = mm;
279	rmn->mn.ops = &amdgpu_mn_ops;
280	init_rwsem(&rmn->lock);
281	rmn->objects = RB_ROOT_CACHED;
282	mutex_init(&rmn->read_lock);
283	atomic_set(&rmn->recursion, 0);
284
285	r = __mmu_notifier_register(&rmn->mn, mm);
286	if (r)
287		goto free_rmn;
288
289	hash_add(adev->mn_hash, &rmn->node, (unsigned long)mm);
290
291release_locks:
292	up_write(&mm->mmap_sem);
293	mutex_unlock(&adev->mn_lock);
294
295	return rmn;
296
297free_rmn:
298	up_write(&mm->mmap_sem);
299	mutex_unlock(&adev->mn_lock);
300	kfree(rmn);
301
302	return ERR_PTR(r);
303}
304
305/**
306 * amdgpu_mn_register - register a BO for notifier updates
307 *
308 * @bo: amdgpu buffer object
309 * @addr: userptr addr we should monitor
310 *
311 * Registers an MMU notifier for the given BO at the specified address.
312 * Returns 0 on success, -ERRNO if anything goes wrong.
313 */
314int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
315{
316	unsigned long end = addr + amdgpu_bo_size(bo) - 1;
317	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
318	struct amdgpu_mn *rmn;
319	struct amdgpu_mn_node *node = NULL;
320	struct list_head bos;
321	struct interval_tree_node *it;
322
323	rmn = amdgpu_mn_get(adev);
324	if (IS_ERR(rmn))
325		return PTR_ERR(rmn);
326
327	INIT_LIST_HEAD(&bos);
328
329	down_write(&rmn->lock);
330
331	while ((it = interval_tree_iter_first(&rmn->objects, addr, end))) {
332		kfree(node);
333		node = container_of(it, struct amdgpu_mn_node, it);
334		interval_tree_remove(&node->it, &rmn->objects);
335		addr = min(it->start, addr);
336		end = max(it->last, end);
337		list_splice(&node->bos, &bos);
338	}
339
340	if (!node) {
341		node = kmalloc(sizeof(struct amdgpu_mn_node), GFP_KERNEL);
342		if (!node) {
343			up_write(&rmn->lock);
344			return -ENOMEM;
345		}
346	}
347
348	bo->mn = rmn;
349
350	node->it.start = addr;
351	node->it.last = end;
352	INIT_LIST_HEAD(&node->bos);
353	list_splice(&bos, &node->bos);
354	list_add(&bo->mn_list, &node->bos);
355
356	interval_tree_insert(&node->it, &rmn->objects);
357
358	up_write(&rmn->lock);
359
360	return 0;
361}
362
363/**
364 * amdgpu_mn_unregister - unregister a BO for notifier updates
365 *
366 * @bo: amdgpu buffer object
367 *
368 * Remove any registration of MMU notifier updates from the buffer object.
369 */
370void amdgpu_mn_unregister(struct amdgpu_bo *bo)
371{
372	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
373	struct amdgpu_mn *rmn;
374	struct list_head *head;
375
376	mutex_lock(&adev->mn_lock);
377
378	rmn = bo->mn;
379	if (rmn == NULL) {
380		mutex_unlock(&adev->mn_lock);
381		return;
382	}
383
384	down_write(&rmn->lock);
385
386	/* save the next list entry for later */
387	head = bo->mn_list.next;
388
389	bo->mn = NULL;
390	list_del_init(&bo->mn_list);
391
392	if (list_empty(head)) {
393		struct amdgpu_mn_node *node;
394		node = container_of(head, struct amdgpu_mn_node, bos);
395		interval_tree_remove(&node->it, &rmn->objects);
396		kfree(node);
397	}
398
399	up_write(&rmn->lock);
400	mutex_unlock(&adev->mn_lock);
401}
402
v4.10.11
  1/*
  2 * Copyright 2014 Advanced Micro Devices, Inc.
  3 * All Rights Reserved.
  4 *
  5 * Permission is hereby granted, free of charge, to any person obtaining a
  6 * copy of this software and associated documentation files (the
  7 * "Software"), to deal in the Software without restriction, including
  8 * without limitation the rights to use, copy, modify, merge, publish,
  9 * distribute, sub license, and/or sell copies of the Software, and to
 10 * permit persons to whom the Software is furnished to do so, subject to
 11 * the following conditions:
 12 *
 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 20 *
 21 * The above copyright notice and this permission notice (including the
 22 * next paragraph) shall be included in all copies or substantial portions
 23 * of the Software.
 24 *
 25 */
 26/*
 27 * Authors:
 28 *    Christian König <christian.koenig@amd.com>
 29 */
 30
 31#include <linux/firmware.h>
 32#include <linux/module.h>
 33#include <linux/mmu_notifier.h>
 
 34#include <drm/drmP.h>
 35#include <drm/drm.h>
 36
 37#include "amdgpu.h"
 38
 39struct amdgpu_mn {
 40	/* constant after initialisation */
 41	struct amdgpu_device	*adev;
 42	struct mm_struct	*mm;
 43	struct mmu_notifier	mn;
 44
 45	/* only used on destruction */
 46	struct work_struct	work;
 47
 48	/* protected by adev->mn_lock */
 49	struct hlist_node	node;
 50
 51	/* objects protected by lock */
 52	struct mutex		lock;
 53	struct rb_root		objects;
 
 
 54};
 55
 56struct amdgpu_mn_node {
 57	struct interval_tree_node	it;
 58	struct list_head		bos;
 59};
 60
 61/**
 62 * amdgpu_mn_destroy - destroy the rmn
 63 *
 64 * @work: previously sheduled work item
 65 *
 66 * Lazy destroys the notifier from a work item
 67 */
 68static void amdgpu_mn_destroy(struct work_struct *work)
 69{
 70	struct amdgpu_mn *rmn = container_of(work, struct amdgpu_mn, work);
 71	struct amdgpu_device *adev = rmn->adev;
 72	struct amdgpu_mn_node *node, *next_node;
 73	struct amdgpu_bo *bo, *next_bo;
 74
 75	mutex_lock(&adev->mn_lock);
 76	mutex_lock(&rmn->lock);
 77	hash_del(&rmn->node);
 78	rbtree_postorder_for_each_entry_safe(node, next_node, &rmn->objects,
 79					     it.rb) {
 80		list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) {
 81			bo->mn = NULL;
 82			list_del_init(&bo->mn_list);
 83		}
 84		kfree(node);
 85	}
 86	mutex_unlock(&rmn->lock);
 87	mutex_unlock(&adev->mn_lock);
 88	mmu_notifier_unregister_no_release(&rmn->mn, rmn->mm);
 89	kfree(rmn);
 90}
 91
 92/**
 93 * amdgpu_mn_release - callback to notify about mm destruction
 94 *
 95 * @mn: our notifier
 96 * @mn: the mm this callback is about
 97 *
 98 * Shedule a work item to lazy destroy our notifier.
 99 */
100static void amdgpu_mn_release(struct mmu_notifier *mn,
101			      struct mm_struct *mm)
102{
103	struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
104	INIT_WORK(&rmn->work, amdgpu_mn_destroy);
105	schedule_work(&rmn->work);
106}
107
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
108/**
109 * amdgpu_mn_invalidate_node - unmap all BOs of a node
110 *
111 * @node: the node with the BOs to unmap
112 *
113 * We block for all BOs and unmap them by move them
114 * into system domain again.
115 */
116static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node,
117				      unsigned long start,
118				      unsigned long end)
119{
120	struct amdgpu_bo *bo;
121	long r;
122
123	list_for_each_entry(bo, &node->bos, mn_list) {
124
125		if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start, end))
126			continue;
127
128		r = amdgpu_bo_reserve(bo, true);
129		if (r) {
130			DRM_ERROR("(%ld) failed to reserve user bo\n", r);
131			continue;
132		}
133
134		r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
135			true, false, MAX_SCHEDULE_TIMEOUT);
136		if (r <= 0)
137			DRM_ERROR("(%ld) failed to wait for user bo\n", r);
138
139		amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
140		r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
141		if (r)
142			DRM_ERROR("(%ld) failed to validate user bo\n", r);
143
144		amdgpu_bo_unreserve(bo);
145	}
146}
147
148/**
149 * amdgpu_mn_invalidate_page - callback to notify about mm change
150 *
151 * @mn: our notifier
152 * @mn: the mm this callback is about
153 * @address: address of invalidate page
154 *
155 * Invalidation of a single page. Blocks for all BOs mapping it
156 * and unmap them by move them into system domain again.
157 */
158static void amdgpu_mn_invalidate_page(struct mmu_notifier *mn,
159				      struct mm_struct *mm,
160				      unsigned long address)
161{
162	struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
163	struct interval_tree_node *it;
164
165	mutex_lock(&rmn->lock);
166
167	it = interval_tree_iter_first(&rmn->objects, address, address);
168	if (it) {
169		struct amdgpu_mn_node *node;
170
171		node = container_of(it, struct amdgpu_mn_node, it);
172		amdgpu_mn_invalidate_node(node, address, address);
173	}
174
175	mutex_unlock(&rmn->lock);
176}
177
178/**
179 * amdgpu_mn_invalidate_range_start - callback to notify about mm change
180 *
181 * @mn: our notifier
182 * @mn: the mm this callback is about
183 * @start: start of updated range
184 * @end: end of updated range
185 *
186 * We block for all BOs between start and end to be idle and
187 * unmap them by move them into system domain again.
188 */
189static void amdgpu_mn_invalidate_range_start(struct mmu_notifier *mn,
190					     struct mm_struct *mm,
191					     unsigned long start,
192					     unsigned long end)
193{
194	struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
195	struct interval_tree_node *it;
196
197	/* notification is exclusive, but interval is inclusive */
198	end -= 1;
199
200	mutex_lock(&rmn->lock);
201
202	it = interval_tree_iter_first(&rmn->objects, start, end);
203	while (it) {
204		struct amdgpu_mn_node *node;
205
206		node = container_of(it, struct amdgpu_mn_node, it);
207		it = interval_tree_iter_next(it, start, end);
208
209		amdgpu_mn_invalidate_node(node, start, end);
210	}
 
211
212	mutex_unlock(&rmn->lock);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
213}
214
215static const struct mmu_notifier_ops amdgpu_mn_ops = {
216	.release = amdgpu_mn_release,
217	.invalidate_page = amdgpu_mn_invalidate_page,
218	.invalidate_range_start = amdgpu_mn_invalidate_range_start,
 
219};
220
221/**
222 * amdgpu_mn_get - create notifier context
223 *
224 * @adev: amdgpu device pointer
225 *
226 * Creates a notifier context for current->mm.
227 */
228static struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev)
229{
230	struct mm_struct *mm = current->mm;
231	struct amdgpu_mn *rmn;
232	int r;
233
234	mutex_lock(&adev->mn_lock);
235	if (down_write_killable(&mm->mmap_sem)) {
236		mutex_unlock(&adev->mn_lock);
237		return ERR_PTR(-EINTR);
238	}
239
240	hash_for_each_possible(adev->mn_hash, rmn, node, (unsigned long)mm)
241		if (rmn->mm == mm)
242			goto release_locks;
243
244	rmn = kzalloc(sizeof(*rmn), GFP_KERNEL);
245	if (!rmn) {
246		rmn = ERR_PTR(-ENOMEM);
247		goto release_locks;
248	}
249
250	rmn->adev = adev;
251	rmn->mm = mm;
252	rmn->mn.ops = &amdgpu_mn_ops;
253	mutex_init(&rmn->lock);
254	rmn->objects = RB_ROOT;
 
 
255
256	r = __mmu_notifier_register(&rmn->mn, mm);
257	if (r)
258		goto free_rmn;
259
260	hash_add(adev->mn_hash, &rmn->node, (unsigned long)mm);
261
262release_locks:
263	up_write(&mm->mmap_sem);
264	mutex_unlock(&adev->mn_lock);
265
266	return rmn;
267
268free_rmn:
269	up_write(&mm->mmap_sem);
270	mutex_unlock(&adev->mn_lock);
271	kfree(rmn);
272
273	return ERR_PTR(r);
274}
275
276/**
277 * amdgpu_mn_register - register a BO for notifier updates
278 *
279 * @bo: amdgpu buffer object
280 * @addr: userptr addr we should monitor
281 *
282 * Registers an MMU notifier for the given BO at the specified address.
283 * Returns 0 on success, -ERRNO if anything goes wrong.
284 */
285int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
286{
287	unsigned long end = addr + amdgpu_bo_size(bo) - 1;
288	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
289	struct amdgpu_mn *rmn;
290	struct amdgpu_mn_node *node = NULL;
291	struct list_head bos;
292	struct interval_tree_node *it;
293
294	rmn = amdgpu_mn_get(adev);
295	if (IS_ERR(rmn))
296		return PTR_ERR(rmn);
297
298	INIT_LIST_HEAD(&bos);
299
300	mutex_lock(&rmn->lock);
301
302	while ((it = interval_tree_iter_first(&rmn->objects, addr, end))) {
303		kfree(node);
304		node = container_of(it, struct amdgpu_mn_node, it);
305		interval_tree_remove(&node->it, &rmn->objects);
306		addr = min(it->start, addr);
307		end = max(it->last, end);
308		list_splice(&node->bos, &bos);
309	}
310
311	if (!node) {
312		node = kmalloc(sizeof(struct amdgpu_mn_node), GFP_KERNEL);
313		if (!node) {
314			mutex_unlock(&rmn->lock);
315			return -ENOMEM;
316		}
317	}
318
319	bo->mn = rmn;
320
321	node->it.start = addr;
322	node->it.last = end;
323	INIT_LIST_HEAD(&node->bos);
324	list_splice(&bos, &node->bos);
325	list_add(&bo->mn_list, &node->bos);
326
327	interval_tree_insert(&node->it, &rmn->objects);
328
329	mutex_unlock(&rmn->lock);
330
331	return 0;
332}
333
334/**
335 * amdgpu_mn_unregister - unregister a BO for notifier updates
336 *
337 * @bo: amdgpu buffer object
338 *
339 * Remove any registration of MMU notifier updates from the buffer object.
340 */
341void amdgpu_mn_unregister(struct amdgpu_bo *bo)
342{
343	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
344	struct amdgpu_mn *rmn;
345	struct list_head *head;
346
347	mutex_lock(&adev->mn_lock);
348
349	rmn = bo->mn;
350	if (rmn == NULL) {
351		mutex_unlock(&adev->mn_lock);
352		return;
353	}
354
355	mutex_lock(&rmn->lock);
356
357	/* save the next list entry for later */
358	head = bo->mn_list.next;
359
360	bo->mn = NULL;
361	list_del(&bo->mn_list);
362
363	if (list_empty(head)) {
364		struct amdgpu_mn_node *node;
365		node = container_of(head, struct amdgpu_mn_node, bos);
366		interval_tree_remove(&node->it, &rmn->objects);
367		kfree(node);
368	}
369
370	mutex_unlock(&rmn->lock);
371	mutex_unlock(&adev->mn_lock);
372}