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v4.17
  1// SPDX-License-Identifier: GPL-2.0
  2/dts-v1/;
  3
  4#include <dt-bindings/input/input.h>
  5#include "tegra20.dtsi"
  6
  7/ {
  8	model = "Compulab TrimSlice board";
  9	compatible = "compulab,trimslice", "nvidia,tegra20";
 10
 11	aliases {
 12		rtc0 = "/i2c@7000c500/rtc@56";
 13		rtc1 = "/rtc@7000e000";
 14		serial0 = &uarta;
 15	};
 16
 17	chosen {
 18		stdout-path = "serial0:115200n8";
 19	};
 20
 21	memory {
 22		reg = <0x00000000 0x40000000>;
 23	};
 24
 25	host1x@50000000 {
 26		hdmi@54280000 {
 27			status = "okay";
 28
 29			vdd-supply = <&hdmi_vdd_reg>;
 30			pll-supply = <&hdmi_pll_reg>;
 31
 32			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
 33			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
 34				GPIO_ACTIVE_HIGH>;
 35		};
 36	};
 37
 38	pinmux@70000014 {
 39		pinctrl-names = "default";
 40		pinctrl-0 = <&state_default>;
 41
 42		state_default: pinmux {
 43			ata {
 44				nvidia,pins = "ata";
 45				nvidia,function = "ide";
 46			};
 47			atb {
 48				nvidia,pins = "atb", "gma";
 49				nvidia,function = "sdio4";
 50			};
 51			atc {
 52				nvidia,pins = "atc", "gmb";
 53				nvidia,function = "nand";
 54			};
 55			atd {
 56				nvidia,pins = "atd", "ate", "gme", "pta";
 57				nvidia,function = "gmi";
 58			};
 59			cdev1 {
 60				nvidia,pins = "cdev1";
 61				nvidia,function = "plla_out";
 62			};
 63			cdev2 {
 64				nvidia,pins = "cdev2";
 65				nvidia,function = "pllp_out4";
 66			};
 67			crtp {
 68				nvidia,pins = "crtp";
 69				nvidia,function = "crt";
 70			};
 71			csus {
 72				nvidia,pins = "csus";
 73				nvidia,function = "vi_sensor_clk";
 74			};
 75			dap1 {
 76				nvidia,pins = "dap1";
 77				nvidia,function = "dap1";
 78			};
 79			dap2 {
 80				nvidia,pins = "dap2";
 81				nvidia,function = "dap2";
 82			};
 83			dap3 {
 84				nvidia,pins = "dap3";
 85				nvidia,function = "dap3";
 86			};
 87			dap4 {
 88				nvidia,pins = "dap4";
 89				nvidia,function = "dap4";
 90			};
 91			ddc {
 92				nvidia,pins = "ddc";
 93				nvidia,function = "i2c2";
 94			};
 95			dta {
 96				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 97				nvidia,function = "vi";
 98			};
 99			dtf {
100				nvidia,pins = "dtf";
101				nvidia,function = "i2c3";
102			};
103			gmc {
104				nvidia,pins = "gmc", "gmd";
105				nvidia,function = "sflash";
106			};
107			gpu {
108				nvidia,pins = "gpu";
109				nvidia,function = "uarta";
110			};
111			gpu7 {
112				nvidia,pins = "gpu7";
113				nvidia,function = "rtck";
114			};
115			gpv {
116				nvidia,pins = "gpv", "slxa", "slxk";
117				nvidia,function = "pcie";
118			};
119			hdint {
120				nvidia,pins = "hdint";
121				nvidia,function = "hdmi";
122			};
123			i2cp {
124				nvidia,pins = "i2cp";
125				nvidia,function = "i2cp";
126			};
127			irrx {
128				nvidia,pins = "irrx", "irtx";
129				nvidia,function = "uartb";
130			};
131			kbca {
132				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
133					"kbce", "kbcf";
134				nvidia,function = "kbc";
135			};
136			lcsn {
137				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
138					"ld3", "ld4", "ld5", "ld6", "ld7",
139					"ld8", "ld9", "ld10", "ld11", "ld12",
140					"ld13", "ld14", "ld15", "ld16", "ld17",
141					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
142					"lhs", "lm0", "lm1", "lpp", "lpw0",
143					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
144					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
145					"lvs";
146				nvidia,function = "displaya";
147			};
148			owc {
149				nvidia,pins = "owc", "uac";
150				nvidia,function = "rsvd2";
151			};
152			pmc {
153				nvidia,pins = "pmc";
154				nvidia,function = "pwr_on";
155			};
156			rm {
157				nvidia,pins = "rm";
158				nvidia,function = "i2c1";
159			};
160			sdb {
161				nvidia,pins = "sdb", "sdc", "sdd";
162				nvidia,function = "pwm";
163			};
164			sdio1 {
165				nvidia,pins = "sdio1";
166				nvidia,function = "sdio1";
167			};
168			slxc {
169				nvidia,pins = "slxc", "slxd";
170				nvidia,function = "sdio3";
171			};
172			spdi {
173				nvidia,pins = "spdi", "spdo";
174				nvidia,function = "spdif";
175			};
176			spia {
177				nvidia,pins = "spia", "spib", "spic";
178				nvidia,function = "spi2";
179			};
180			spid {
181				nvidia,pins = "spid", "spie", "spif";
182				nvidia,function = "spi1";
183			};
184			spig {
185				nvidia,pins = "spig", "spih";
186				nvidia,function = "spi2_alt";
187			};
188			uaa {
189				nvidia,pins = "uaa", "uab", "uda";
190				nvidia,function = "ulpi";
191			};
192			uad {
193				nvidia,pins = "uad";
194				nvidia,function = "irda";
195			};
196			uca {
197				nvidia,pins = "uca", "ucb";
198				nvidia,function = "uartc";
199			};
200			conf_ata {
201				nvidia,pins = "ata", "atc", "atd", "ate",
202					"crtp", "dap2", "dap3", "dap4", "dta",
203					"dtb", "dtc", "dtd", "dte", "gmb",
204					"gme", "i2cp", "pta", "slxc", "slxd",
205					"spdi", "spdo", "uda";
206				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
207				nvidia,tristate = <TEGRA_PIN_ENABLE>;
208			};
209			conf_atb {
210				nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
211					"gma", "gmc", "gmd", "gpu", "gpu7",
212					"gpv", "sdio1", "slxa", "slxk", "uac";
213				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214				nvidia,tristate = <TEGRA_PIN_DISABLE>;
215			};
216			conf_ck32 {
217				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
218					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
219				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220			};
221			conf_csus {
222				nvidia,pins = "csus", "spia", "spib",
223					"spid", "spif";
224				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
225				nvidia,tristate = <TEGRA_PIN_ENABLE>;
226			};
227			conf_ddc {
228				nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
229				nvidia,pull = <TEGRA_PIN_PULL_UP>;
230				nvidia,tristate = <TEGRA_PIN_DISABLE>;
231			};
232			conf_hdint {
233				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
234					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
235					"lvp0", "pmc";
236				nvidia,tristate = <TEGRA_PIN_ENABLE>;
237			};
238			conf_irrx {
239				nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
240					"kbcc", "kbcd", "kbce", "kbcf", "owc",
241					"spic", "spie", "spig", "spih", "uaa",
242					"uab", "uad", "uca", "ucb";
243				nvidia,pull = <TEGRA_PIN_PULL_UP>;
244				nvidia,tristate = <TEGRA_PIN_ENABLE>;
245			};
246			conf_lc {
247				nvidia,pins = "lc", "ls";
248				nvidia,pull = <TEGRA_PIN_PULL_UP>;
249			};
250			conf_ld0 {
251				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
252					"ld5", "ld6", "ld7", "ld8", "ld9",
253					"ld10", "ld11", "ld12", "ld13", "ld14",
254					"ld15", "ld16", "ld17", "ldi", "lhp0",
255					"lhp1", "lhp2", "lhs", "lm0", "lpp",
256					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
257					"lvs", "sdb";
258				nvidia,tristate = <TEGRA_PIN_DISABLE>;
259			};
260			conf_ld17_0 {
261				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
262					"ld23_22";
263				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
264			};
265			conf_spif {
266				nvidia,pins = "spif";
267				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
268				nvidia,tristate = <TEGRA_PIN_DISABLE>;
269			};
270		};
271	};
272
273	i2s@70002800 {
274		status = "okay";
275	};
276
277	serial@70006000 {
278		status = "okay";
279	};
280
281	dvi_ddc: i2c@7000c000 {
282		status = "okay";
283		clock-frequency = <100000>;
284	};
285
286	spi@7000c380 {
287		status = "okay";
288		spi-max-frequency = <48000000>;
289		spi-flash@0 {
290			compatible = "winbond,w25q80bl";
291			reg = <0>;
292			spi-max-frequency = <48000000>;
293		};
294	};
295
296	hdmi_ddc: i2c@7000c400 {
297		status = "okay";
298		clock-frequency = <100000>;
299	};
300
301	i2c@7000c500 {
302		status = "okay";
303		clock-frequency = <400000>;
304
305		codec: codec@1a {
306			compatible = "ti,tlv320aic23";
307			reg = <0x1a>;
308		};
309
310		rtc@56 {
311			compatible = "emmicro,em3027";
312			reg = <0x56>;
313		};
314	};
315
316	pmc@7000e400 {
317		nvidia,suspend-mode = <1>;
318		nvidia,cpu-pwr-good-time = <5000>;
319		nvidia,cpu-pwr-off-time = <5000>;
320		nvidia,core-pwr-good-time = <3845 3845>;
321		nvidia,core-pwr-off-time = <3875>;
322		nvidia,sys-clock-req-active-high;
323	};
324
325	pcie@80003000 {
326		status = "okay";
327
328		avdd-pex-supply = <&pci_vdd_reg>;
329		vdd-pex-supply = <&pci_vdd_reg>;
330		avdd-pex-pll-supply = <&pci_vdd_reg>;
331		avdd-plle-supply = <&pci_vdd_reg>;
332		vddio-pex-clk-supply = <&pci_clk_reg>;
333
334		pci@1,0 {
335			status = "okay";
336		};
337	};
338
339	usb@c5000000 {
340		status = "okay";
341	};
342
343	usb-phy@c5000000 {
344		status = "okay";
345		vbus-supply = <&vbus_reg>;
346	};
347
348	usb@c5004000 {
349		status = "okay";
350		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
351			GPIO_ACTIVE_LOW>;
352	};
353
354	usb-phy@c5004000 {
355		status = "okay";
356		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
357			GPIO_ACTIVE_LOW>;
358	};
359
360	usb@c5008000 {
361		status = "okay";
362	};
363
364	usb-phy@c5008000 {
365		status = "okay";
366	};
367
368	sdhci@c8000000 {
369		status = "okay";
370		broken-cd;
371		bus-width = <4>;
372	};
373
374	sdhci@c8000600 {
375		status = "okay";
376		cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
377		wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
378		bus-width = <4>;
379	};
380
381	clocks {
382		compatible = "simple-bus";
383		#address-cells = <1>;
384		#size-cells = <0>;
385
386		clk32k_in: clock@0 {
387			compatible = "fixed-clock";
388			reg = <0>;
389			#clock-cells = <0>;
390			clock-frequency = <32768>;
391		};
392	};
393
394	gpio-keys {
395		compatible = "gpio-keys";
396
397		power {
398			label = "Power";
399			gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
400			linux,code = <KEY_POWER>;
401			wakeup-source;
402		};
403	};
404
405	poweroff {
406		compatible = "gpio-poweroff";
407		gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
408	};
409
410	regulators {
411		compatible = "simple-bus";
412		#address-cells = <1>;
413		#size-cells = <0>;
414
415		hdmi_vdd_reg: regulator@0 {
416			compatible = "regulator-fixed";
417			reg = <0>;
418			regulator-name = "avdd_hdmi";
419			regulator-min-microvolt = <3300000>;
420			regulator-max-microvolt = <3300000>;
421			regulator-always-on;
422		};
423
424		hdmi_pll_reg: regulator@1 {
425			compatible = "regulator-fixed";
426			reg = <1>;
427			regulator-name = "avdd_hdmi_pll";
428			regulator-min-microvolt = <1800000>;
429			regulator-max-microvolt = <1800000>;
430			regulator-always-on;
431		};
432
433		vbus_reg: regulator@2 {
434			compatible = "regulator-fixed";
435			reg = <2>;
436			regulator-name = "usb1_vbus";
437			regulator-min-microvolt = <5000000>;
438			regulator-max-microvolt = <5000000>;
439			enable-active-high;
440			gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
441			regulator-always-on;
442			regulator-boot-on;
443		};
444
445		pci_clk_reg: regulator@3 {
446			compatible = "regulator-fixed";
447			reg = <3>;
448			regulator-name = "pci_clk";
449			regulator-min-microvolt = <3300000>;
450			regulator-max-microvolt = <3300000>;
451			regulator-always-on;
452		};
453
454		pci_vdd_reg: regulator@4 {
455			compatible = "regulator-fixed";
456			reg = <4>;
457			regulator-name = "pci_vdd";
458			regulator-min-microvolt = <1050000>;
459			regulator-max-microvolt = <1050000>;
460			regulator-always-on;
461		};
462	};
463
464	sound {
465		compatible = "nvidia,tegra-audio-trimslice";
466		nvidia,i2s-controller = <&tegra_i2s1>;
467		nvidia,audio-codec = <&codec>;
468
469		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
470			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
471			 <&tegra_car TEGRA20_CLK_CDEV1>;
472		clock-names = "pll_a", "pll_a_out0", "mclk";
473	};
474};
v4.10.11
 
  1/dts-v1/;
  2
  3#include <dt-bindings/input/input.h>
  4#include "tegra20.dtsi"
  5
  6/ {
  7	model = "Compulab TrimSlice board";
  8	compatible = "compulab,trimslice", "nvidia,tegra20";
  9
 10	aliases {
 11		rtc0 = "/i2c@7000c500/rtc@56";
 12		rtc1 = "/rtc@7000e000";
 13		serial0 = &uarta;
 14	};
 15
 16	chosen {
 17		stdout-path = "serial0:115200n8";
 18	};
 19
 20	memory {
 21		reg = <0x00000000 0x40000000>;
 22	};
 23
 24	host1x@50000000 {
 25		hdmi@54280000 {
 26			status = "okay";
 27
 28			vdd-supply = <&hdmi_vdd_reg>;
 29			pll-supply = <&hdmi_pll_reg>;
 30
 31			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
 32			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
 33				GPIO_ACTIVE_HIGH>;
 34		};
 35	};
 36
 37	pinmux@70000014 {
 38		pinctrl-names = "default";
 39		pinctrl-0 = <&state_default>;
 40
 41		state_default: pinmux {
 42			ata {
 43				nvidia,pins = "ata";
 44				nvidia,function = "ide";
 45			};
 46			atb {
 47				nvidia,pins = "atb", "gma";
 48				nvidia,function = "sdio4";
 49			};
 50			atc {
 51				nvidia,pins = "atc", "gmb";
 52				nvidia,function = "nand";
 53			};
 54			atd {
 55				nvidia,pins = "atd", "ate", "gme", "pta";
 56				nvidia,function = "gmi";
 57			};
 58			cdev1 {
 59				nvidia,pins = "cdev1";
 60				nvidia,function = "plla_out";
 61			};
 62			cdev2 {
 63				nvidia,pins = "cdev2";
 64				nvidia,function = "pllp_out4";
 65			};
 66			crtp {
 67				nvidia,pins = "crtp";
 68				nvidia,function = "crt";
 69			};
 70			csus {
 71				nvidia,pins = "csus";
 72				nvidia,function = "vi_sensor_clk";
 73			};
 74			dap1 {
 75				nvidia,pins = "dap1";
 76				nvidia,function = "dap1";
 77			};
 78			dap2 {
 79				nvidia,pins = "dap2";
 80				nvidia,function = "dap2";
 81			};
 82			dap3 {
 83				nvidia,pins = "dap3";
 84				nvidia,function = "dap3";
 85			};
 86			dap4 {
 87				nvidia,pins = "dap4";
 88				nvidia,function = "dap4";
 89			};
 90			ddc {
 91				nvidia,pins = "ddc";
 92				nvidia,function = "i2c2";
 93			};
 94			dta {
 95				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 96				nvidia,function = "vi";
 97			};
 98			dtf {
 99				nvidia,pins = "dtf";
100				nvidia,function = "i2c3";
101			};
102			gmc {
103				nvidia,pins = "gmc", "gmd";
104				nvidia,function = "sflash";
105			};
106			gpu {
107				nvidia,pins = "gpu";
108				nvidia,function = "uarta";
109			};
110			gpu7 {
111				nvidia,pins = "gpu7";
112				nvidia,function = "rtck";
113			};
114			gpv {
115				nvidia,pins = "gpv", "slxa", "slxk";
116				nvidia,function = "pcie";
117			};
118			hdint {
119				nvidia,pins = "hdint";
120				nvidia,function = "hdmi";
121			};
122			i2cp {
123				nvidia,pins = "i2cp";
124				nvidia,function = "i2cp";
125			};
126			irrx {
127				nvidia,pins = "irrx", "irtx";
128				nvidia,function = "uartb";
129			};
130			kbca {
131				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
132					"kbce", "kbcf";
133				nvidia,function = "kbc";
134			};
135			lcsn {
136				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
137					"ld3", "ld4", "ld5", "ld6", "ld7",
138					"ld8", "ld9", "ld10", "ld11", "ld12",
139					"ld13", "ld14", "ld15", "ld16", "ld17",
140					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
141					"lhs", "lm0", "lm1", "lpp", "lpw0",
142					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
143					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
144					"lvs";
145				nvidia,function = "displaya";
146			};
147			owc {
148				nvidia,pins = "owc", "uac";
149				nvidia,function = "rsvd2";
150			};
151			pmc {
152				nvidia,pins = "pmc";
153				nvidia,function = "pwr_on";
154			};
155			rm {
156				nvidia,pins = "rm";
157				nvidia,function = "i2c1";
158			};
159			sdb {
160				nvidia,pins = "sdb", "sdc", "sdd";
161				nvidia,function = "pwm";
162			};
163			sdio1 {
164				nvidia,pins = "sdio1";
165				nvidia,function = "sdio1";
166			};
167			slxc {
168				nvidia,pins = "slxc", "slxd";
169				nvidia,function = "sdio3";
170			};
171			spdi {
172				nvidia,pins = "spdi", "spdo";
173				nvidia,function = "spdif";
174			};
175			spia {
176				nvidia,pins = "spia", "spib", "spic";
177				nvidia,function = "spi2";
178			};
179			spid {
180				nvidia,pins = "spid", "spie", "spif";
181				nvidia,function = "spi1";
182			};
183			spig {
184				nvidia,pins = "spig", "spih";
185				nvidia,function = "spi2_alt";
186			};
187			uaa {
188				nvidia,pins = "uaa", "uab", "uda";
189				nvidia,function = "ulpi";
190			};
191			uad {
192				nvidia,pins = "uad";
193				nvidia,function = "irda";
194			};
195			uca {
196				nvidia,pins = "uca", "ucb";
197				nvidia,function = "uartc";
198			};
199			conf_ata {
200				nvidia,pins = "ata", "atc", "atd", "ate",
201					"crtp", "dap2", "dap3", "dap4", "dta",
202					"dtb", "dtc", "dtd", "dte", "gmb",
203					"gme", "i2cp", "pta", "slxc", "slxd",
204					"spdi", "spdo", "uda";
205				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
206				nvidia,tristate = <TEGRA_PIN_ENABLE>;
207			};
208			conf_atb {
209				nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
210					"gma", "gmc", "gmd", "gpu", "gpu7",
211					"gpv", "sdio1", "slxa", "slxk", "uac";
212				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213				nvidia,tristate = <TEGRA_PIN_DISABLE>;
214			};
215			conf_ck32 {
216				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
217					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
218				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
219			};
220			conf_csus {
221				nvidia,pins = "csus", "spia", "spib",
222					"spid", "spif";
223				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
224				nvidia,tristate = <TEGRA_PIN_ENABLE>;
225			};
226			conf_ddc {
227				nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
228				nvidia,pull = <TEGRA_PIN_PULL_UP>;
229				nvidia,tristate = <TEGRA_PIN_DISABLE>;
230			};
231			conf_hdint {
232				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
233					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
234					"lvp0", "pmc";
235				nvidia,tristate = <TEGRA_PIN_ENABLE>;
236			};
237			conf_irrx {
238				nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
239					"kbcc", "kbcd", "kbce", "kbcf", "owc",
240					"spic", "spie", "spig", "spih", "uaa",
241					"uab", "uad", "uca", "ucb";
242				nvidia,pull = <TEGRA_PIN_PULL_UP>;
243				nvidia,tristate = <TEGRA_PIN_ENABLE>;
244			};
245			conf_lc {
246				nvidia,pins = "lc", "ls";
247				nvidia,pull = <TEGRA_PIN_PULL_UP>;
248			};
249			conf_ld0 {
250				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
251					"ld5", "ld6", "ld7", "ld8", "ld9",
252					"ld10", "ld11", "ld12", "ld13", "ld14",
253					"ld15", "ld16", "ld17", "ldi", "lhp0",
254					"lhp1", "lhp2", "lhs", "lm0", "lpp",
255					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
256					"lvs", "sdb";
257				nvidia,tristate = <TEGRA_PIN_DISABLE>;
258			};
259			conf_ld17_0 {
260				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
261					"ld23_22";
262				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
263			};
264			conf_spif {
265				nvidia,pins = "spif";
266				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
267				nvidia,tristate = <TEGRA_PIN_DISABLE>;
268			};
269		};
270	};
271
272	i2s@70002800 {
273		status = "okay";
274	};
275
276	serial@70006000 {
277		status = "okay";
278	};
279
280	dvi_ddc: i2c@7000c000 {
281		status = "okay";
282		clock-frequency = <100000>;
283	};
284
285	spi@7000c380 {
286		status = "okay";
287		spi-max-frequency = <48000000>;
288		spi-flash@0 {
289			compatible = "winbond,w25q80bl";
290			reg = <0>;
291			spi-max-frequency = <48000000>;
292		};
293	};
294
295	hdmi_ddc: i2c@7000c400 {
296		status = "okay";
297		clock-frequency = <100000>;
298	};
299
300	i2c@7000c500 {
301		status = "okay";
302		clock-frequency = <400000>;
303
304		codec: codec@1a {
305			compatible = "ti,tlv320aic23";
306			reg = <0x1a>;
307		};
308
309		rtc@56 {
310			compatible = "emmicro,em3027";
311			reg = <0x56>;
312		};
313	};
314
315	pmc@7000e400 {
316		nvidia,suspend-mode = <1>;
317		nvidia,cpu-pwr-good-time = <5000>;
318		nvidia,cpu-pwr-off-time = <5000>;
319		nvidia,core-pwr-good-time = <3845 3845>;
320		nvidia,core-pwr-off-time = <3875>;
321		nvidia,sys-clock-req-active-high;
322	};
323
324	pcie-controller@80003000 {
325		status = "okay";
326
327		avdd-pex-supply = <&pci_vdd_reg>;
328		vdd-pex-supply = <&pci_vdd_reg>;
329		avdd-pex-pll-supply = <&pci_vdd_reg>;
330		avdd-plle-supply = <&pci_vdd_reg>;
331		vddio-pex-clk-supply = <&pci_clk_reg>;
332
333		pci@1,0 {
334			status = "okay";
335		};
336	};
337
338	usb@c5000000 {
339		status = "okay";
340	};
341
342	usb-phy@c5000000 {
343		status = "okay";
344		vbus-supply = <&vbus_reg>;
345	};
346
347	usb@c5004000 {
348		status = "okay";
349		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
350			GPIO_ACTIVE_LOW>;
351	};
352
353	usb-phy@c5004000 {
354		status = "okay";
355		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
356			GPIO_ACTIVE_LOW>;
357	};
358
359	usb@c5008000 {
360		status = "okay";
361	};
362
363	usb-phy@c5008000 {
364		status = "okay";
365	};
366
367	sdhci@c8000000 {
368		status = "okay";
 
369		bus-width = <4>;
370	};
371
372	sdhci@c8000600 {
373		status = "okay";
374		cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
375		wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
376		bus-width = <4>;
377	};
378
379	clocks {
380		compatible = "simple-bus";
381		#address-cells = <1>;
382		#size-cells = <0>;
383
384		clk32k_in: clock@0 {
385			compatible = "fixed-clock";
386			reg = <0>;
387			#clock-cells = <0>;
388			clock-frequency = <32768>;
389		};
390	};
391
392	gpio-keys {
393		compatible = "gpio-keys";
394
395		power {
396			label = "Power";
397			gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
398			linux,code = <KEY_POWER>;
399			wakeup-source;
400		};
401	};
402
403	poweroff {
404		compatible = "gpio-poweroff";
405		gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
406	};
407
408	regulators {
409		compatible = "simple-bus";
410		#address-cells = <1>;
411		#size-cells = <0>;
412
413		hdmi_vdd_reg: regulator@0 {
414			compatible = "regulator-fixed";
415			reg = <0>;
416			regulator-name = "avdd_hdmi";
417			regulator-min-microvolt = <3300000>;
418			regulator-max-microvolt = <3300000>;
419			regulator-always-on;
420		};
421
422		hdmi_pll_reg: regulator@1 {
423			compatible = "regulator-fixed";
424			reg = <1>;
425			regulator-name = "avdd_hdmi_pll";
426			regulator-min-microvolt = <1800000>;
427			regulator-max-microvolt = <1800000>;
428			regulator-always-on;
429		};
430
431		vbus_reg: regulator@2 {
432			compatible = "regulator-fixed";
433			reg = <2>;
434			regulator-name = "usb1_vbus";
435			regulator-min-microvolt = <5000000>;
436			regulator-max-microvolt = <5000000>;
437			enable-active-high;
438			gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
439			regulator-always-on;
440			regulator-boot-on;
441		};
442
443		pci_clk_reg: regulator@3 {
444			compatible = "regulator-fixed";
445			reg = <3>;
446			regulator-name = "pci_clk";
447			regulator-min-microvolt = <3300000>;
448			regulator-max-microvolt = <3300000>;
449			regulator-always-on;
450		};
451
452		pci_vdd_reg: regulator@4 {
453			compatible = "regulator-fixed";
454			reg = <4>;
455			regulator-name = "pci_vdd";
456			regulator-min-microvolt = <1050000>;
457			regulator-max-microvolt = <1050000>;
458			regulator-always-on;
459		};
460	};
461
462	sound {
463		compatible = "nvidia,tegra-audio-trimslice";
464		nvidia,i2s-controller = <&tegra_i2s1>;
465		nvidia,audio-codec = <&codec>;
466
467		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
468			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
469			 <&tegra_car TEGRA20_CLK_CDEV1>;
470		clock-names = "pll_a", "pll_a_out0", "mclk";
471	};
472};