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1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra20.dtsi"
6
7/ {
8 model = "Toshiba AC100 / Dynabook AZ";
9 compatible = "compal,paz00", "nvidia,tegra20";
10
11 aliases {
12 rtc0 = "/i2c@7000d000/tps6586x@34";
13 rtc1 = "/rtc@7000e000";
14 serial0 = &uarta;
15 serial1 = &uartc;
16 };
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
21
22 memory {
23 reg = <0x00000000 0x20000000>;
24 };
25
26 host1x@50000000 {
27 dc@54200000 {
28 rgb {
29 status = "okay";
30
31 nvidia,panel = <&panel>;
32 };
33 };
34
35 hdmi@54280000 {
36 status = "okay";
37
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
40
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
43 GPIO_ACTIVE_HIGH>;
44 };
45 };
46
47 pinmux@70000014 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
50
51 state_default: pinmux {
52 ata {
53 nvidia,pins = "ata", "atc", "atd", "ate",
54 "dap2", "gmb", "gmc", "gmd", "spia",
55 "spib", "spic", "spid", "spie";
56 nvidia,function = "gmi";
57 };
58 atb {
59 nvidia,pins = "atb", "gma", "gme";
60 nvidia,function = "sdio4";
61 };
62 cdev1 {
63 nvidia,pins = "cdev1";
64 nvidia,function = "plla_out";
65 };
66 cdev2 {
67 nvidia,pins = "cdev2";
68 nvidia,function = "pllp_out4";
69 };
70 crtp {
71 nvidia,pins = "crtp";
72 nvidia,function = "crt";
73 };
74 csus {
75 nvidia,pins = "csus";
76 nvidia,function = "pllc_out1";
77 };
78 dap1 {
79 nvidia,pins = "dap1";
80 nvidia,function = "dap1";
81 };
82 dap3 {
83 nvidia,pins = "dap3";
84 nvidia,function = "dap3";
85 };
86 dap4 {
87 nvidia,pins = "dap4";
88 nvidia,function = "dap4";
89 };
90 ddc {
91 nvidia,pins = "ddc";
92 nvidia,function = "i2c2";
93 };
94 dta {
95 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
96 nvidia,function = "rsvd1";
97 };
98 dtf {
99 nvidia,pins = "dtf";
100 nvidia,function = "i2c3";
101 };
102 gpu {
103 nvidia,pins = "gpu", "sdb", "sdd";
104 nvidia,function = "pwm";
105 };
106 gpu7 {
107 nvidia,pins = "gpu7";
108 nvidia,function = "rtck";
109 };
110 gpv {
111 nvidia,pins = "gpv", "slxa", "slxk";
112 nvidia,function = "pcie";
113 };
114 hdint {
115 nvidia,pins = "hdint", "pta";
116 nvidia,function = "hdmi";
117 };
118 i2cp {
119 nvidia,pins = "i2cp";
120 nvidia,function = "i2cp";
121 };
122 irrx {
123 nvidia,pins = "irrx", "irtx";
124 nvidia,function = "uarta";
125 };
126 kbca {
127 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
128 nvidia,function = "kbc";
129 };
130 kbcb {
131 nvidia,pins = "kbcb", "kbcd";
132 nvidia,function = "sdio2";
133 };
134 lcsn {
135 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
136 "ld3", "ld4", "ld5", "ld6", "ld7",
137 "ld8", "ld9", "ld10", "ld11", "ld12",
138 "ld13", "ld14", "ld15", "ld16", "ld17",
139 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
140 "lhs", "lm0", "lm1", "lpp", "lpw0",
141 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
142 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
143 "lvs";
144 nvidia,function = "displaya";
145 };
146 owc {
147 nvidia,pins = "owc";
148 nvidia,function = "owr";
149 };
150 pmc {
151 nvidia,pins = "pmc";
152 nvidia,function = "pwr_on";
153 };
154 rm {
155 nvidia,pins = "rm";
156 nvidia,function = "i2c1";
157 };
158 sdc {
159 nvidia,pins = "sdc";
160 nvidia,function = "twc";
161 };
162 sdio1 {
163 nvidia,pins = "sdio1";
164 nvidia,function = "sdio1";
165 };
166 slxc {
167 nvidia,pins = "slxc", "slxd";
168 nvidia,function = "spi4";
169 };
170 spdi {
171 nvidia,pins = "spdi", "spdo";
172 nvidia,function = "rsvd2";
173 };
174 spif {
175 nvidia,pins = "spif", "uac";
176 nvidia,function = "rsvd4";
177 };
178 spig {
179 nvidia,pins = "spig", "spih";
180 nvidia,function = "spi2_alt";
181 };
182 uaa {
183 nvidia,pins = "uaa", "uab", "uda";
184 nvidia,function = "ulpi";
185 };
186 uad {
187 nvidia,pins = "uad";
188 nvidia,function = "spdif";
189 };
190 uca {
191 nvidia,pins = "uca", "ucb";
192 nvidia,function = "uartc";
193 };
194 conf_ata {
195 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
196 "cdev1", "cdev2", "dap1", "dap2", "dtf",
197 "gma", "gmb", "gmc", "gmd", "gme",
198 "gpu", "gpu7", "gpv", "i2cp", "pta",
199 "rm", "sdio1", "slxk", "spdo", "uac",
200 "uda";
201 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
202 nvidia,tristate = <TEGRA_PIN_DISABLE>;
203 };
204 conf_ck32 {
205 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
206 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
207 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208 };
209 conf_crtp {
210 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
211 "dtc", "dte", "slxa", "slxc", "slxd",
212 "spdi";
213 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 nvidia,tristate = <TEGRA_PIN_ENABLE>;
215 };
216 conf_csus {
217 nvidia,pins = "csus", "spia", "spib", "spid",
218 "spif";
219 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
220 nvidia,tristate = <TEGRA_PIN_ENABLE>;
221 };
222 conf_ddc {
223 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
224 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
225 "spic", "spig", "uaa", "uab";
226 nvidia,pull = <TEGRA_PIN_PULL_UP>;
227 nvidia,tristate = <TEGRA_PIN_DISABLE>;
228 };
229 conf_dta {
230 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
231 "spie", "spih", "uad", "uca", "ucb";
232 nvidia,pull = <TEGRA_PIN_PULL_UP>;
233 nvidia,tristate = <TEGRA_PIN_ENABLE>;
234 };
235 conf_hdint {
236 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
237 "ld3", "ld4", "ld5", "ld6", "ld7",
238 "ld8", "ld9", "ld10", "ld11", "ld12",
239 "ld13", "ld14", "ld15", "ld16", "ld17",
240 "ldc", "ldi", "lhs", "lsc0", "lspi",
241 "lvs", "pmc";
242 nvidia,tristate = <TEGRA_PIN_DISABLE>;
243 };
244 conf_lc {
245 nvidia,pins = "lc", "ls";
246 nvidia,pull = <TEGRA_PIN_PULL_UP>;
247 };
248 conf_lcsn {
249 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
250 "lm0", "lm1", "lpp", "lpw0", "lpw1",
251 "lpw2", "lsc1", "lsck", "lsda", "lsdi",
252 "lvp0", "lvp1", "sdb";
253 nvidia,tristate = <TEGRA_PIN_ENABLE>;
254 };
255 conf_ld17_0 {
256 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
257 "ld23_22";
258 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
259 };
260 };
261 };
262
263 i2s@70002800 {
264 status = "okay";
265 };
266
267 serial@70006000 {
268 status = "okay";
269 };
270
271 serial@70006200 {
272 status = "okay";
273 };
274
275 pwm: pwm@7000a000 {
276 status = "okay";
277 };
278
279 lvds_ddc: i2c@7000c000 {
280 status = "okay";
281 clock-frequency = <400000>;
282
283 alc5632: alc5632@1e {
284 compatible = "realtek,alc5632";
285 reg = <0x1e>;
286 gpio-controller;
287 #gpio-cells = <2>;
288 };
289 };
290
291 hdmi_ddc: i2c@7000c400 {
292 status = "okay";
293 clock-frequency = <100000>;
294 };
295
296 nvec@7000c500 {
297 compatible = "nvidia,nvec";
298 reg = <0x7000c500 0x100>;
299 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
300 #address-cells = <1>;
301 #size-cells = <0>;
302 clock-frequency = <80000>;
303 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
304 slave-addr = <138>;
305 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
306 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
307 clock-names = "div-clk", "fast-clk";
308 resets = <&tegra_car 67>;
309 reset-names = "i2c";
310 };
311
312 i2c@7000d000 {
313 status = "okay";
314 clock-frequency = <400000>;
315
316 pmic: tps6586x@34 {
317 compatible = "ti,tps6586x";
318 reg = <0x34>;
319 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
320
321 #gpio-cells = <2>;
322 gpio-controller;
323
324 sys-supply = <&p5valw_reg>;
325 vin-sm0-supply = <&sys_reg>;
326 vin-sm1-supply = <&sys_reg>;
327 vin-sm2-supply = <&sys_reg>;
328 vinldo01-supply = <&sm2_reg>;
329 vinldo23-supply = <&sm2_reg>;
330 vinldo4-supply = <&sm2_reg>;
331 vinldo678-supply = <&sm2_reg>;
332 vinldo9-supply = <&sm2_reg>;
333
334 regulators {
335 sys_reg: sys {
336 regulator-name = "vdd_sys";
337 regulator-always-on;
338 };
339
340 sm0 {
341 regulator-name = "+1.2vs_sm0,vdd_core";
342 regulator-min-microvolt = <1200000>;
343 regulator-max-microvolt = <1200000>;
344 regulator-always-on;
345 };
346
347 sm1 {
348 regulator-name = "+1.0vs_sm1,vdd_cpu";
349 regulator-min-microvolt = <1000000>;
350 regulator-max-microvolt = <1000000>;
351 regulator-always-on;
352 };
353
354 sm2_reg: sm2 {
355 regulator-name = "+3.7vs_sm2,vin_ldo*";
356 regulator-min-microvolt = <3700000>;
357 regulator-max-microvolt = <3700000>;
358 regulator-always-on;
359 };
360
361 /* LDO0 is not connected to anything */
362
363 ldo1 {
364 regulator-name = "+1.1vs_ldo1,avdd_pll*";
365 regulator-min-microvolt = <1100000>;
366 regulator-max-microvolt = <1100000>;
367 regulator-always-on;
368 };
369
370 ldo2 {
371 regulator-name = "+1.2vs_ldo2,vdd_rtc";
372 regulator-min-microvolt = <1200000>;
373 regulator-max-microvolt = <1200000>;
374 };
375
376 ldo3 {
377 regulator-name = "+3.3vs_ldo3,avdd_usb*";
378 regulator-min-microvolt = <3300000>;
379 regulator-max-microvolt = <3300000>;
380 regulator-always-on;
381 };
382
383 ldo4 {
384 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
385 regulator-min-microvolt = <1800000>;
386 regulator-max-microvolt = <1800000>;
387 regulator-always-on;
388 };
389
390 ldo5 {
391 regulator-name = "+2.85vs_ldo5,vcore_mmc";
392 regulator-min-microvolt = <2850000>;
393 regulator-max-microvolt = <2850000>;
394 regulator-always-on;
395 };
396
397 ldo6 {
398 /*
399 * Research indicates this should be
400 * 1.8v; other boards that use this
401 * rail for the same purpose need it
402 * set to 1.8v. The schematic signal
403 * name is incorrect; perhaps copied
404 * from an incorrect NVIDIA reference.
405 */
406 regulator-name = "+2.85vs_ldo6,avdd_vdac";
407 regulator-min-microvolt = <1800000>;
408 regulator-max-microvolt = <1800000>;
409 };
410
411 hdmi_vdd_reg: ldo7 {
412 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
413 regulator-min-microvolt = <3300000>;
414 regulator-max-microvolt = <3300000>;
415 };
416
417 hdmi_pll_reg: ldo8 {
418 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
419 regulator-min-microvolt = <1800000>;
420 regulator-max-microvolt = <1800000>;
421 };
422
423 ldo9 {
424 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
425 regulator-min-microvolt = <2850000>;
426 regulator-max-microvolt = <2850000>;
427 regulator-always-on;
428 };
429
430 ldo_rtc {
431 regulator-name = "+3.3vs_rtc";
432 regulator-min-microvolt = <3300000>;
433 regulator-max-microvolt = <3300000>;
434 regulator-always-on;
435 };
436 };
437 };
438
439 adt7461@4c {
440 compatible = "adi,adt7461";
441 reg = <0x4c>;
442 };
443 };
444
445 pmc@7000e400 {
446 nvidia,invert-interrupt;
447 nvidia,suspend-mode = <1>;
448 nvidia,cpu-pwr-good-time = <2000>;
449 nvidia,cpu-pwr-off-time = <0>;
450 nvidia,core-pwr-good-time = <3845 3845>;
451 nvidia,core-pwr-off-time = <0>;
452 nvidia,sys-clock-req-active-high;
453 };
454
455 usb@c5000000 {
456 compatible = "nvidia,tegra20-udc";
457 status = "okay";
458 dr_mode = "peripheral";
459 };
460
461 usb-phy@c5000000 {
462 status = "okay";
463 };
464
465 usb@c5004000 {
466 status = "okay";
467 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
468 GPIO_ACTIVE_LOW>;
469 };
470
471 usb-phy@c5004000 {
472 status = "okay";
473 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
474 GPIO_ACTIVE_LOW>;
475 };
476
477 usb@c5008000 {
478 status = "okay";
479 };
480
481 usb-phy@c5008000 {
482 status = "okay";
483 };
484
485 sdhci@c8000000 {
486 status = "okay";
487 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
488 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
489 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
490 bus-width = <4>;
491 };
492
493 sdhci@c8000600 {
494 status = "okay";
495 bus-width = <8>;
496 non-removable;
497 };
498
499 backlight: backlight {
500 compatible = "pwm-backlight";
501
502 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
503 pwms = <&pwm 0 5000000>;
504
505 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
506 default-brightness-level = <10>;
507
508 backlight-boot-off;
509 };
510
511 clocks {
512 compatible = "simple-bus";
513 #address-cells = <1>;
514 #size-cells = <0>;
515
516 clk32k_in: clock@0 {
517 compatible = "fixed-clock";
518 reg = <0>;
519 #clock-cells = <0>;
520 clock-frequency = <32768>;
521 };
522 };
523
524 gpio-keys {
525 compatible = "gpio-keys";
526
527 power {
528 label = "Power";
529 gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
530 linux,code = <KEY_POWER>;
531 wakeup-source;
532 };
533 };
534
535 gpio-leds {
536 compatible = "gpio-leds";
537
538 wifi {
539 label = "wifi-led";
540 gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
541 linux,default-trigger = "rfkill0";
542 };
543 };
544
545 panel: panel {
546 compatible = "samsung,ltn101nt05", "simple-panel";
547
548 ddc-i2c-bus = <&lvds_ddc>;
549 power-supply = <&vdd_pnl_reg>;
550 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
551
552 backlight = <&backlight>;
553 };
554
555 regulators {
556 compatible = "simple-bus";
557 #address-cells = <1>;
558 #size-cells = <0>;
559
560 p5valw_reg: regulator@0 {
561 compatible = "regulator-fixed";
562 reg = <0>;
563 regulator-name = "+5valw";
564 regulator-min-microvolt = <5000000>;
565 regulator-max-microvolt = <5000000>;
566 regulator-always-on;
567 };
568
569 vdd_pnl_reg: regulator@1 {
570 compatible = "regulator-fixed";
571 reg = <1>;
572 regulator-name = "+3VS,vdd_pnl";
573 regulator-min-microvolt = <3300000>;
574 regulator-max-microvolt = <3300000>;
575 regulator-boot-on;
576 gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
577 enable-active-high;
578 };
579 };
580
581 sound {
582 compatible = "nvidia,tegra-audio-alc5632-paz00",
583 "nvidia,tegra-audio-alc5632";
584
585 nvidia,model = "Compal PAZ00";
586
587 nvidia,audio-routing =
588 "Int Spk", "SPKOUT",
589 "Int Spk", "SPKOUTN",
590 "Headset Mic", "MICBIAS1",
591 "MIC1", "Headset Mic",
592 "Headset Stereophone", "HPR",
593 "Headset Stereophone", "HPL",
594 "DMICDAT", "Digital Mic";
595
596 nvidia,audio-codec = <&alc5632>;
597 nvidia,i2s-controller = <&tegra_i2s1>;
598 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
599 GPIO_ACTIVE_HIGH>;
600
601 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
602 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
603 <&tegra_car TEGRA20_CLK_CDEV1>;
604 clock-names = "pll_a", "pll_a_out0", "mclk";
605 };
606};
1/dts-v1/;
2
3#include <dt-bindings/input/input.h>
4#include "tegra20.dtsi"
5
6/ {
7 model = "Toshiba AC100 / Dynabook AZ";
8 compatible = "compal,paz00", "nvidia,tegra20";
9
10 aliases {
11 rtc0 = "/i2c@7000d000/tps6586x@34";
12 rtc1 = "/rtc@7000e000";
13 serial0 = &uarta;
14 serial1 = &uartc;
15 };
16
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
20
21 memory {
22 reg = <0x00000000 0x20000000>;
23 };
24
25 host1x@50000000 {
26 dc@54200000 {
27 rgb {
28 status = "okay";
29
30 nvidia,panel = <&panel>;
31 };
32 };
33
34 hdmi@54280000 {
35 status = "okay";
36
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39
40 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
41 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
42 GPIO_ACTIVE_HIGH>;
43 };
44 };
45
46 pinmux@70000014 {
47 pinctrl-names = "default";
48 pinctrl-0 = <&state_default>;
49
50 state_default: pinmux {
51 ata {
52 nvidia,pins = "ata", "atc", "atd", "ate",
53 "dap2", "gmb", "gmc", "gmd", "spia",
54 "spib", "spic", "spid", "spie";
55 nvidia,function = "gmi";
56 };
57 atb {
58 nvidia,pins = "atb", "gma", "gme";
59 nvidia,function = "sdio4";
60 };
61 cdev1 {
62 nvidia,pins = "cdev1";
63 nvidia,function = "plla_out";
64 };
65 cdev2 {
66 nvidia,pins = "cdev2";
67 nvidia,function = "pllp_out4";
68 };
69 crtp {
70 nvidia,pins = "crtp";
71 nvidia,function = "crt";
72 };
73 csus {
74 nvidia,pins = "csus";
75 nvidia,function = "pllc_out1";
76 };
77 dap1 {
78 nvidia,pins = "dap1";
79 nvidia,function = "dap1";
80 };
81 dap3 {
82 nvidia,pins = "dap3";
83 nvidia,function = "dap3";
84 };
85 dap4 {
86 nvidia,pins = "dap4";
87 nvidia,function = "dap4";
88 };
89 ddc {
90 nvidia,pins = "ddc";
91 nvidia,function = "i2c2";
92 };
93 dta {
94 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
95 nvidia,function = "rsvd1";
96 };
97 dtf {
98 nvidia,pins = "dtf";
99 nvidia,function = "i2c3";
100 };
101 gpu {
102 nvidia,pins = "gpu", "sdb", "sdd";
103 nvidia,function = "pwm";
104 };
105 gpu7 {
106 nvidia,pins = "gpu7";
107 nvidia,function = "rtck";
108 };
109 gpv {
110 nvidia,pins = "gpv", "slxa", "slxk";
111 nvidia,function = "pcie";
112 };
113 hdint {
114 nvidia,pins = "hdint", "pta";
115 nvidia,function = "hdmi";
116 };
117 i2cp {
118 nvidia,pins = "i2cp";
119 nvidia,function = "i2cp";
120 };
121 irrx {
122 nvidia,pins = "irrx", "irtx";
123 nvidia,function = "uarta";
124 };
125 kbca {
126 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
127 nvidia,function = "kbc";
128 };
129 kbcb {
130 nvidia,pins = "kbcb", "kbcd";
131 nvidia,function = "sdio2";
132 };
133 lcsn {
134 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
135 "ld3", "ld4", "ld5", "ld6", "ld7",
136 "ld8", "ld9", "ld10", "ld11", "ld12",
137 "ld13", "ld14", "ld15", "ld16", "ld17",
138 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
139 "lhs", "lm0", "lm1", "lpp", "lpw0",
140 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
141 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
142 "lvs";
143 nvidia,function = "displaya";
144 };
145 owc {
146 nvidia,pins = "owc";
147 nvidia,function = "owr";
148 };
149 pmc {
150 nvidia,pins = "pmc";
151 nvidia,function = "pwr_on";
152 };
153 rm {
154 nvidia,pins = "rm";
155 nvidia,function = "i2c1";
156 };
157 sdc {
158 nvidia,pins = "sdc";
159 nvidia,function = "twc";
160 };
161 sdio1 {
162 nvidia,pins = "sdio1";
163 nvidia,function = "sdio1";
164 };
165 slxc {
166 nvidia,pins = "slxc", "slxd";
167 nvidia,function = "spi4";
168 };
169 spdi {
170 nvidia,pins = "spdi", "spdo";
171 nvidia,function = "rsvd2";
172 };
173 spif {
174 nvidia,pins = "spif", "uac";
175 nvidia,function = "rsvd4";
176 };
177 spig {
178 nvidia,pins = "spig", "spih";
179 nvidia,function = "spi2_alt";
180 };
181 uaa {
182 nvidia,pins = "uaa", "uab", "uda";
183 nvidia,function = "ulpi";
184 };
185 uad {
186 nvidia,pins = "uad";
187 nvidia,function = "spdif";
188 };
189 uca {
190 nvidia,pins = "uca", "ucb";
191 nvidia,function = "uartc";
192 };
193 conf_ata {
194 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
195 "cdev1", "cdev2", "dap1", "dap2", "dtf",
196 "gma", "gmb", "gmc", "gmd", "gme",
197 "gpu", "gpu7", "gpv", "i2cp", "pta",
198 "rm", "sdio1", "slxk", "spdo", "uac",
199 "uda";
200 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
201 nvidia,tristate = <TEGRA_PIN_DISABLE>;
202 };
203 conf_ck32 {
204 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
205 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
206 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
207 };
208 conf_crtp {
209 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
210 "dtc", "dte", "slxa", "slxc", "slxd",
211 "spdi";
212 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213 nvidia,tristate = <TEGRA_PIN_ENABLE>;
214 };
215 conf_csus {
216 nvidia,pins = "csus", "spia", "spib", "spid",
217 "spif";
218 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
219 nvidia,tristate = <TEGRA_PIN_ENABLE>;
220 };
221 conf_ddc {
222 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
223 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
224 "spic", "spig", "uaa", "uab";
225 nvidia,pull = <TEGRA_PIN_PULL_UP>;
226 nvidia,tristate = <TEGRA_PIN_DISABLE>;
227 };
228 conf_dta {
229 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
230 "spie", "spih", "uad", "uca", "ucb";
231 nvidia,pull = <TEGRA_PIN_PULL_UP>;
232 nvidia,tristate = <TEGRA_PIN_ENABLE>;
233 };
234 conf_hdint {
235 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
236 "ld3", "ld4", "ld5", "ld6", "ld7",
237 "ld8", "ld9", "ld10", "ld11", "ld12",
238 "ld13", "ld14", "ld15", "ld16", "ld17",
239 "ldc", "ldi", "lhs", "lsc0", "lspi",
240 "lvs", "pmc";
241 nvidia,tristate = <TEGRA_PIN_DISABLE>;
242 };
243 conf_lc {
244 nvidia,pins = "lc", "ls";
245 nvidia,pull = <TEGRA_PIN_PULL_UP>;
246 };
247 conf_lcsn {
248 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
249 "lm0", "lm1", "lpp", "lpw0", "lpw1",
250 "lpw2", "lsc1", "lsck", "lsda", "lsdi",
251 "lvp0", "lvp1", "sdb";
252 nvidia,tristate = <TEGRA_PIN_ENABLE>;
253 };
254 conf_ld17_0 {
255 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
256 "ld23_22";
257 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
258 };
259 };
260 };
261
262 i2s@70002800 {
263 status = "okay";
264 };
265
266 serial@70006000 {
267 status = "okay";
268 };
269
270 serial@70006200 {
271 status = "okay";
272 };
273
274 pwm: pwm@7000a000 {
275 status = "okay";
276 };
277
278 lvds_ddc: i2c@7000c000 {
279 status = "okay";
280 clock-frequency = <400000>;
281
282 alc5632: alc5632@1e {
283 compatible = "realtek,alc5632";
284 reg = <0x1e>;
285 gpio-controller;
286 #gpio-cells = <2>;
287 };
288 };
289
290 hdmi_ddc: i2c@7000c400 {
291 status = "okay";
292 clock-frequency = <100000>;
293 };
294
295 nvec@7000c500 {
296 compatible = "nvidia,nvec";
297 reg = <0x7000c500 0x100>;
298 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
299 #address-cells = <1>;
300 #size-cells = <0>;
301 clock-frequency = <80000>;
302 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
303 slave-addr = <138>;
304 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
305 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
306 clock-names = "div-clk", "fast-clk";
307 resets = <&tegra_car 67>;
308 reset-names = "i2c";
309 };
310
311 i2c@7000d000 {
312 status = "okay";
313 clock-frequency = <400000>;
314
315 pmic: tps6586x@34 {
316 compatible = "ti,tps6586x";
317 reg = <0x34>;
318 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
319
320 #gpio-cells = <2>;
321 gpio-controller;
322
323 sys-supply = <&p5valw_reg>;
324 vin-sm0-supply = <&sys_reg>;
325 vin-sm1-supply = <&sys_reg>;
326 vin-sm2-supply = <&sys_reg>;
327 vinldo01-supply = <&sm2_reg>;
328 vinldo23-supply = <&sm2_reg>;
329 vinldo4-supply = <&sm2_reg>;
330 vinldo678-supply = <&sm2_reg>;
331 vinldo9-supply = <&sm2_reg>;
332
333 regulators {
334 sys_reg: sys {
335 regulator-name = "vdd_sys";
336 regulator-always-on;
337 };
338
339 sm0 {
340 regulator-name = "+1.2vs_sm0,vdd_core";
341 regulator-min-microvolt = <1200000>;
342 regulator-max-microvolt = <1200000>;
343 regulator-always-on;
344 };
345
346 sm1 {
347 regulator-name = "+1.0vs_sm1,vdd_cpu";
348 regulator-min-microvolt = <1000000>;
349 regulator-max-microvolt = <1000000>;
350 regulator-always-on;
351 };
352
353 sm2_reg: sm2 {
354 regulator-name = "+3.7vs_sm2,vin_ldo*";
355 regulator-min-microvolt = <3700000>;
356 regulator-max-microvolt = <3700000>;
357 regulator-always-on;
358 };
359
360 /* LDO0 is not connected to anything */
361
362 ldo1 {
363 regulator-name = "+1.1vs_ldo1,avdd_pll*";
364 regulator-min-microvolt = <1100000>;
365 regulator-max-microvolt = <1100000>;
366 regulator-always-on;
367 };
368
369 ldo2 {
370 regulator-name = "+1.2vs_ldo2,vdd_rtc";
371 regulator-min-microvolt = <1200000>;
372 regulator-max-microvolt = <1200000>;
373 };
374
375 ldo3 {
376 regulator-name = "+3.3vs_ldo3,avdd_usb*";
377 regulator-min-microvolt = <3300000>;
378 regulator-max-microvolt = <3300000>;
379 regulator-always-on;
380 };
381
382 ldo4 {
383 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
384 regulator-min-microvolt = <1800000>;
385 regulator-max-microvolt = <1800000>;
386 regulator-always-on;
387 };
388
389 ldo5 {
390 regulator-name = "+2.85vs_ldo5,vcore_mmc";
391 regulator-min-microvolt = <2850000>;
392 regulator-max-microvolt = <2850000>;
393 regulator-always-on;
394 };
395
396 ldo6 {
397 /*
398 * Research indicates this should be
399 * 1.8v; other boards that use this
400 * rail for the same purpose need it
401 * set to 1.8v. The schematic signal
402 * name is incorrect; perhaps copied
403 * from an incorrect NVIDIA reference.
404 */
405 regulator-name = "+2.85vs_ldo6,avdd_vdac";
406 regulator-min-microvolt = <1800000>;
407 regulator-max-microvolt = <1800000>;
408 };
409
410 hdmi_vdd_reg: ldo7 {
411 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
412 regulator-min-microvolt = <3300000>;
413 regulator-max-microvolt = <3300000>;
414 };
415
416 hdmi_pll_reg: ldo8 {
417 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
418 regulator-min-microvolt = <1800000>;
419 regulator-max-microvolt = <1800000>;
420 };
421
422 ldo9 {
423 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
424 regulator-min-microvolt = <2850000>;
425 regulator-max-microvolt = <2850000>;
426 regulator-always-on;
427 };
428
429 ldo_rtc {
430 regulator-name = "+3.3vs_rtc";
431 regulator-min-microvolt = <3300000>;
432 regulator-max-microvolt = <3300000>;
433 regulator-always-on;
434 };
435 };
436 };
437
438 adt7461@4c {
439 compatible = "adi,adt7461";
440 reg = <0x4c>;
441 };
442 };
443
444 pmc@7000e400 {
445 nvidia,invert-interrupt;
446 nvidia,suspend-mode = <1>;
447 nvidia,cpu-pwr-good-time = <2000>;
448 nvidia,cpu-pwr-off-time = <0>;
449 nvidia,core-pwr-good-time = <3845 3845>;
450 nvidia,core-pwr-off-time = <0>;
451 nvidia,sys-clock-req-active-high;
452 };
453
454 usb@c5000000 {
455 status = "okay";
456 };
457
458 usb-phy@c5000000 {
459 status = "okay";
460 };
461
462 usb@c5004000 {
463 status = "okay";
464 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
465 GPIO_ACTIVE_LOW>;
466 };
467
468 usb-phy@c5004000 {
469 status = "okay";
470 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
471 GPIO_ACTIVE_LOW>;
472 };
473
474 usb@c5008000 {
475 status = "okay";
476 };
477
478 usb-phy@c5008000 {
479 status = "okay";
480 };
481
482 sdhci@c8000000 {
483 status = "okay";
484 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
485 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
486 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
487 bus-width = <4>;
488 };
489
490 sdhci@c8000600 {
491 status = "okay";
492 bus-width = <8>;
493 non-removable;
494 };
495
496 backlight: backlight {
497 compatible = "pwm-backlight";
498
499 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
500 pwms = <&pwm 0 5000000>;
501
502 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
503 default-brightness-level = <10>;
504
505 backlight-boot-off;
506 };
507
508 clocks {
509 compatible = "simple-bus";
510 #address-cells = <1>;
511 #size-cells = <0>;
512
513 clk32k_in: clock@0 {
514 compatible = "fixed-clock";
515 reg = <0>;
516 #clock-cells = <0>;
517 clock-frequency = <32768>;
518 };
519 };
520
521 gpio-keys {
522 compatible = "gpio-keys";
523
524 power {
525 label = "Power";
526 gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
527 linux,code = <KEY_POWER>;
528 wakeup-source;
529 };
530 };
531
532 gpio-leds {
533 compatible = "gpio-leds";
534
535 wifi {
536 label = "wifi-led";
537 gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
538 linux,default-trigger = "rfkill0";
539 };
540 };
541
542 panel: panel {
543 compatible = "samsung,ltn101nt05", "simple-panel";
544
545 ddc-i2c-bus = <&lvds_ddc>;
546 power-supply = <&vdd_pnl_reg>;
547 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
548
549 backlight = <&backlight>;
550 };
551
552 regulators {
553 compatible = "simple-bus";
554 #address-cells = <1>;
555 #size-cells = <0>;
556
557 p5valw_reg: regulator@0 {
558 compatible = "regulator-fixed";
559 reg = <0>;
560 regulator-name = "+5valw";
561 regulator-min-microvolt = <5000000>;
562 regulator-max-microvolt = <5000000>;
563 regulator-always-on;
564 };
565
566 vdd_pnl_reg: regulator@1 {
567 compatible = "regulator-fixed";
568 reg = <1>;
569 regulator-name = "+3VS,vdd_pnl";
570 regulator-min-microvolt = <3300000>;
571 regulator-max-microvolt = <3300000>;
572 gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
573 enable-active-high;
574 };
575 };
576
577 sound {
578 compatible = "nvidia,tegra-audio-alc5632-paz00",
579 "nvidia,tegra-audio-alc5632";
580
581 nvidia,model = "Compal PAZ00";
582
583 nvidia,audio-routing =
584 "Int Spk", "SPKOUT",
585 "Int Spk", "SPKOUTN",
586 "Headset Mic", "MICBIAS1",
587 "MIC1", "Headset Mic",
588 "Headset Stereophone", "HPR",
589 "Headset Stereophone", "HPL",
590 "DMICDAT", "Digital Mic";
591
592 nvidia,audio-codec = <&alc5632>;
593 nvidia,i2s-controller = <&tegra_i2s1>;
594 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
595 GPIO_ACTIVE_HIGH>;
596
597 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
598 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
599 <&tegra_car TEGRA20_CLK_CDEV1>;
600 clock-names = "pll_a", "pll_a_out0", "mclk";
601 };
602};