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1/*
2 * Copyright 2013 CompuLab Ltd.
3 *
4 * Author: Valentin Raevsky <valentin@compulab.co.il>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include <dt-bindings/gpio/gpio.h>
46#include <dt-bindings/sound/fsl-imx-audmux.h>
47#include "imx6q.dtsi"
48
49/ {
50 model = "CompuLab CM-FX6";
51 compatible = "compulab,cm-fx6", "fsl,imx6q";
52
53 memory@10000000 {
54 reg = <0x10000000 0x80000000>;
55 };
56
57 leds {
58 compatible = "gpio-leds";
59
60 heartbeat-led {
61 label = "Heartbeat";
62 gpios = <&gpio2 31 0>;
63 linux,default-trigger = "heartbeat";
64 };
65 };
66
67 awnh387_pwrseq: pwrseq {
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_pwrseq>;
70 compatible = "mmc-pwrseq-sd8787";
71 powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
72 reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
73 };
74
75 reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
76 compatible = "regulator-fixed";
77 regulator-name = "regulator-pcie-power-on-gpio";
78 regulator-min-microvolt = <3300000>;
79 regulator-max-microvolt = <3300000>;
80 gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
81 };
82
83 reg_usb_h1_vbus: usb_h1_vbus {
84 compatible = "regulator-fixed";
85 regulator-name = "usb_h1_vbus";
86 regulator-min-microvolt = <5000000>;
87 regulator-max-microvolt = <5000000>;
88 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
89 enable-active-high;
90 };
91
92 reg_usb_otg_vbus: usb_otg_vbus {
93 compatible = "regulator-fixed";
94 regulator-name = "usb_otg_vbus";
95 regulator-min-microvolt = <5000000>;
96 regulator-max-microvolt = <5000000>;
97 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
98 enable-active-high;
99 };
100
101 sound-analog {
102 compatible = "simple-audio-card";
103 simple-audio-card,name = "On-board analog audio";
104 simple-audio-card,widgets =
105 "Headphone", "Headphone Jack",
106 "Line", "Line Out",
107 "Microphone", "Mic Jack",
108 "Line", "Line In";
109 simple-audio-card,routing =
110 "Headphone Jack", "RHPOUT",
111 "Headphone Jack", "LHPOUT",
112 "MICIN", "Mic Bias",
113 "Mic Bias", "Mic Jack";
114 simple-audio-card,format = "i2s";
115 simple-audio-card,bitclock-master = <&sound_master>;
116 simple-audio-card,frame-master = <&sound_master>;
117 simple-audio-card,bitclock-inversion;
118
119 sound_master: simple-audio-card,cpu {
120 sound-dai = <&ssi2>;
121 system-clock-frequency = <2822400>;
122 };
123
124 simple-audio-card,codec {
125 sound-dai = <&wm8731>;
126 };
127 };
128
129 sound-spdif {
130 compatible = "fsl,imx-audio-spdif";
131 model = "imx-spdif";
132 spdif-controller = <&spdif>;
133 spdif-out;
134 spdif-in;
135 };
136};
137
138&audmux {
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_audmux>;
141 status = "okay";
142
143 ssi2 {
144 fsl,audmux-port = <1>;
145 fsl,port-config = <
146 (IMX_AUDMUX_V2_PTCR_RCLKDIR |
147 IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) |
148 IMX_AUDMUX_V2_PTCR_TCLKDIR |
149 IMX_AUDMUX_V2_PTCR_TCSEL(3))
150 IMX_AUDMUX_V2_PDCR_RXDSEL(3)
151 >;
152 };
153
154 audmux4 {
155 fsl,audmux-port = <3>;
156 fsl,port-config = <
157 (IMX_AUDMUX_V2_PTCR_TFSDIR |
158 IMX_AUDMUX_V2_PTCR_TFSEL(1) |
159 IMX_AUDMUX_V2_PTCR_RCLKDIR |
160 IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) |
161 IMX_AUDMUX_V2_PTCR_TCLKDIR |
162 IMX_AUDMUX_V2_PTCR_TCSEL(1))
163 IMX_AUDMUX_V2_PDCR_RXDSEL(1)
164 >;
165 };
166};
167
168&cpu0 {
169 /*
170 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
171 * the module behaves unstable at this frequency. Hence, remove the
172 * 1.2GHz operation point here.
173 */
174 operating-points = <
175 /* kHz uV */
176 996000 1250000
177 852000 1250000
178 792000 1175000
179 396000 975000
180 >;
181 fsl,soc-operating-points = <
182 /* ARM kHz SOC-PU uV */
183 996000 1250000
184 852000 1250000
185 792000 1175000
186 396000 1175000
187 >;
188};
189
190&ecspi1 {
191 cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_ecspi1>;
194 status = "okay";
195
196 m25p80@0 {
197 #address-cells = <1>;
198 #size-cells = <1>;
199 compatible = "st,m25p", "jedec,spi-nor";
200 spi-max-frequency = <20000000>;
201 reg = <0>;
202 };
203};
204
205&fec {
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_enet>;
208 phy-mode = "rgmii";
209 status = "okay";
210};
211
212&gpmi {
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_gpmi_nand>;
215 status = "okay";
216};
217
218&i2c3 {
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_i2c3>;
221 status = "okay";
222 clock-frequency = <100000>;
223
224 eeprom@50 {
225 compatible = "atmel,24c02";
226 reg = <0x50>;
227 pagesize = <16>;
228 };
229
230 wm8731: codec@1a {
231 #sound-dai-cells = <0>;
232 compatible = "wlf,wm8731";
233 reg = <0x1a>;
234 };
235};
236
237&iomuxc {
238 pinctrl_audmux: audmuxgrp {
239 fsl,pins = <
240 MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
241 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
242 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
243 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
244 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
245 >;
246 };
247
248 pinctrl_ecspi1: ecspi1grp {
249 fsl,pins = <
250 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
251 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
252 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
253 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
254 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
255 >;
256 };
257
258 pinctrl_enet: enetgrp {
259 fsl,pins = <
260 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
261 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
262 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
263 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
264 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
265 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
266 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
267 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
268 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
269 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
270 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
271 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
272 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
273 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
274 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
275 >;
276 };
277
278 pinctrl_gpmi_nand: gpminandgrp {
279 fsl,pins = <
280 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
281 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
282 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
283 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
284 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
285 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
286 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
287 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
288 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
289 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
290 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
291 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
292 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
293 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
294 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
295 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
296 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
297 >;
298 };
299
300 pinctrl_i2c3: i2c3grp {
301 fsl,pins = <
302 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
303 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
304 >;
305 };
306
307 pinctrl_pcie: pciegrp {
308 fsl,pins = <
309 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
310 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
311 >;
312 };
313
314 pinctrl_pwrseq: pwrseqgrp {
315 fsl,pins = <
316 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
317 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
318 >;
319 };
320
321 pinctrl_spdif: spdifgrp {
322 fsl,pins = <
323 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
324 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
325 >;
326 };
327
328 pinctrl_uart4: uart4grp {
329 fsl,pins = <
330 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
331 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
332 >;
333 };
334
335 pinctrl_usbh1: usbh1grp {
336 fsl,pins = <
337 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
338 >;
339 };
340
341 pinctrl_usbotg: usbotggrp {
342 fsl,pins = <
343 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
344 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
345 >;
346 };
347
348 pinctrl_usdhc1: usdhc1grp {
349 fsl,pins = <
350 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
351 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
352 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
353 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
354 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
355 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
356 >;
357 };
358};
359
360&pcie {
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_pcie>;
363 reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
364 vpcie-supply = <®_pcie_power_on_gpio>;
365 status = "okay";
366};
367
368&sata {
369 status = "okay";
370};
371
372&snvs_poweroff {
373 status = "okay";
374};
375
376&spdif {
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_spdif>;
379 status = "okay";
380};
381
382&ssi2 {
383 assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
384 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
385 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
386 assigned-clock-rates = <0>, <786432000>;
387 status = "okay";
388};
389
390&uart4 {
391 pinctrl-names = "default";
392 pinctrl-0 = <&pinctrl_uart4>;
393 status = "okay";
394};
395
396&usbh1 {
397 vbus-supply = <®_usb_h1_vbus>;
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_usbh1>;
400 status = "okay";
401};
402
403&usbotg {
404 vbus-supply = <®_usb_otg_vbus>;
405 pinctrl-names = "default";
406 pinctrl-0 = <&pinctrl_usbotg>;
407 dr_mode = "otg";
408 status = "okay";
409};
410
411&usdhc1 {
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_usdhc1>;
414 mmc-pwrseq = <&awnh387_pwrseq>;
415 non-removable;
416 /*
417 * If the OS probes the Bluetooth AMP function advertised on this bus
418 * but the firmware in place does not support it, the WiFi/BT module
419 * gets unresponsive.
420 * Users who configured their OS properly can enable this node to gain
421 * WiFi and/or plain Bluetooth support.
422 */
423 status = "disabled";
424};
1/*
2 * Copyright 2013 CompuLab Ltd.
3 *
4 * Author: Valentin Raevsky <valentin@compulab.co.il>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This file is distributed in the hope that it will be useful
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44/dts-v1/;
45#include <dt-bindings/gpio/gpio.h>
46#include "imx6q.dtsi"
47
48/ {
49 model = "CompuLab CM-FX6";
50 compatible = "compulab,cm-fx6", "fsl,imx6q";
51
52 memory {
53 reg = <0x10000000 0x80000000>;
54 };
55
56 leds {
57 compatible = "gpio-leds";
58
59 heartbeat-led {
60 label = "Heartbeat";
61 gpios = <&gpio2 31 0>;
62 linux,default-trigger = "heartbeat";
63 };
64 };
65
66 reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
67 compatible = "regulator-fixed";
68 regulator-name = "regulator-pcie-power-on-gpio";
69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <3300000>;
71 gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>;
72 enable-active-high;
73 };
74
75 reg_usb_h1_vbus: usb_h1_vbus {
76 compatible = "regulator-fixed";
77 regulator-name = "usb_h1_vbus";
78 regulator-min-microvolt = <5000000>;
79 regulator-max-microvolt = <5000000>;
80 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
81 enable-active-high;
82 };
83
84 reg_usb_otg_vbus: usb_otg_vbus {
85 compatible = "regulator-fixed";
86 regulator-name = "usb_otg_vbus";
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
90 enable-active-high;
91 };
92};
93
94&cpu0 {
95 /*
96 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
97 * the module behaves unstable at this frequency. Hence, remove the
98 * 1.2GHz operation point here.
99 */
100 operating-points = <
101 /* kHz uV */
102 996000 1250000
103 852000 1250000
104 792000 1175000
105 396000 975000
106 >;
107 fsl,soc-operating-points = <
108 /* ARM kHz SOC-PU uV */
109 996000 1250000
110 852000 1250000
111 792000 1175000
112 396000 1175000
113 >;
114};
115
116&ecspi1 {
117 fsl,spi-num-chipselects = <2>;
118 cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_ecspi1>;
121 status = "okay";
122
123 m25p80@0 {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 compatible = "st,m25p", "jedec,spi-nor";
127 spi-max-frequency = <20000000>;
128 reg = <0>;
129 };
130};
131
132&fec {
133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_enet>;
135 phy-mode = "rgmii";
136 status = "okay";
137};
138
139&gpmi {
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_gpmi_nand>;
142 status = "okay";
143};
144
145&i2c3 {
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_i2c3>;
148 status = "okay";
149 clock-frequency = <100000>;
150
151 eeprom@50 {
152 compatible = "at24,24c02";
153 reg = <0x50>;
154 pagesize = <16>;
155 };
156};
157
158&iomuxc {
159 pinctrl_ecspi1: ecspi1grp {
160 fsl,pins = <
161 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
162 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
163 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
164 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
165 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
166 >;
167 };
168
169 pinctrl_enet: enetgrp {
170 fsl,pins = <
171 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
172 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
173 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
174 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
175 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
176 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
177 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
178 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
179 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
180 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
181 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
182 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
183 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
184 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
185 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
186 >;
187 };
188
189 pinctrl_gpmi_nand: gpminandgrp {
190 fsl,pins = <
191 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
192 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
193 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
194 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
195 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
196 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
197 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
198 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
199 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
200 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
201 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
202 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
203 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
204 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
205 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
206 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
207 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
208 >;
209 };
210
211 pinctrl_i2c3: i2c3grp {
212 fsl,pins = <
213 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
214 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
215 >;
216 };
217
218 pinctrl_pcie: pciegrp {
219 fsl,pins = <
220 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
221 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
222 >;
223 };
224
225 pinctrl_uart4: uart4grp {
226 fsl,pins = <
227 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
228 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
229 >;
230 };
231
232 pinctrl_usbh1: usbh1grp {
233 fsl,pins = <
234 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
235 >;
236 };
237
238 pinctrl_usbotg: usbotggrp {
239 fsl,pins = <
240 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
241 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
242 >;
243 };
244};
245
246&pcie {
247 pinctrl-names = "default";
248 pinctrl-0 = <&pinctrl_pcie>;
249 reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
250 vdd-supply = <®_pcie_power_on_gpio>;
251 status = "okay";
252};
253
254&sata {
255 status = "okay";
256};
257
258&snvs_poweroff {
259 status = "okay";
260};
261
262&uart4 {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_uart4>;
265 status = "okay";
266};
267
268&usbh1 {
269 vbus-supply = <®_usb_h1_vbus>;
270 pinctrl-names = "default";
271 pinctrl-0 = <&pinctrl_usbh1>;
272 status = "okay";
273};
274
275&usbotg {
276 vbus-supply = <®_usb_otg_vbus>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_usbotg>;
279 dr_mode = "otg";
280 status = "okay";
281};