1// SPDX-License-Identifier: GPL-2.0
 2#include "bcm283x.dtsi"
 3
 4/ {
 5	compatible = "brcm,bcm2836";
 6
 7	soc {
 8		ranges = <0x7e000000 0x3f000000 0x1000000>,
 9			 <0x40000000 0x40000000 0x00001000>;
10		dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
11
12		local_intc: local_intc@40000000 {
13			compatible = "brcm,bcm2836-l1-intc";
14			reg = <0x40000000 0x100>;
15			interrupt-controller;
16			#interrupt-cells = <2>;
17			interrupt-parent = <&local_intc>;
18		};
19	};
20
21	arm-pmu {
22		compatible = "arm,cortex-a7-pmu";
23		interrupt-parent = <&local_intc>;
24		interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
 
25	};
26
27	timer {
28		compatible = "arm,armv7-timer";
29		interrupt-parent = <&local_intc>;
30		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
31			     <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
32			     <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
33			     <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
34		always-on;
35	};
36
37	cpus: cpus {
38		#address-cells = <1>;
39		#size-cells = <0>;
40		enable-method = "brcm,bcm2836-smp";
41
42		v7_cpu0: cpu@0 {
43			device_type = "cpu";
44			compatible = "arm,cortex-a7";
45			reg = <0xf00>;
46			clock-frequency = <800000000>;
47		};
48
49		v7_cpu1: cpu@1 {
50			device_type = "cpu";
51			compatible = "arm,cortex-a7";
52			reg = <0xf01>;
53			clock-frequency = <800000000>;
54		};
55
56		v7_cpu2: cpu@2 {
57			device_type = "cpu";
58			compatible = "arm,cortex-a7";
59			reg = <0xf02>;
60			clock-frequency = <800000000>;
61		};
62
63		v7_cpu3: cpu@3 {
64			device_type = "cpu";
65			compatible = "arm,cortex-a7";
66			reg = <0xf03>;
67			clock-frequency = <800000000>;
68		};
69	};
70};
71
72/* Make the BCM2835-style global interrupt controller be a child of the
73 * CPU-local interrupt controller.
74 */
75&intc {
76	compatible = "brcm,bcm2836-armctrl-ic";
77	reg = <0x7e00b200 0x200>;
78	interrupt-parent = <&local_intc>;
79	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
80};
81
82&cpu_thermal {
83	coefficients = <(-538)	407000>;
84};
85
86/* enable thermal sensor with the correct compatible property set */
87&thermal {
88	compatible = "brcm,bcm2836-thermal";
89	status = "okay";
90};

 
 1#include "bcm283x.dtsi"
 2
 3/ {
 4	compatible = "brcm,bcm2836";
 5
 6	soc {
 7		ranges = <0x7e000000 0x3f000000 0x1000000>,
 8			 <0x40000000 0x40000000 0x00001000>;
 9		dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
10
11		local_intc: local_intc {
12			compatible = "brcm,bcm2836-l1-intc";
13			reg = <0x40000000 0x100>;
14			interrupt-controller;
15			#interrupt-cells = <1>;
16			interrupt-parent = <&local_intc>;
17		};
 
18
19		arm-pmu {
20			compatible = "arm,cortex-a7-pmu";
21			interrupt-parent = <&local_intc>;
22			interrupts = <9>;
23		};
24	};
25
26	timer {
27		compatible = "arm,armv7-timer";
28		interrupt-parent = <&local_intc>;
29		interrupts = <0>, // PHYS_SECURE_PPI
30			     <1>, // PHYS_NONSECURE_PPI
31			     <3>, // VIRT_PPI
32			     <2>; // HYP_PPI
33		always-on;
34	};
35
36	cpus: cpus {
37		#address-cells = <1>;
38		#size-cells = <0>;
 
39
40		v7_cpu0: cpu@0 {
41			device_type = "cpu";
42			compatible = "arm,cortex-a7";
43			reg = <0xf00>;
44			clock-frequency = <800000000>;
45		};
46
47		v7_cpu1: cpu@1 {
48			device_type = "cpu";
49			compatible = "arm,cortex-a7";
50			reg = <0xf01>;
51			clock-frequency = <800000000>;
52		};
53
54		v7_cpu2: cpu@2 {
55			device_type = "cpu";
56			compatible = "arm,cortex-a7";
57			reg = <0xf02>;
58			clock-frequency = <800000000>;
59		};
60
61		v7_cpu3: cpu@3 {
62			device_type = "cpu";
63			compatible = "arm,cortex-a7";
64			reg = <0xf03>;
65			clock-frequency = <800000000>;
66		};
67	};
68};
69
70/* Make the BCM2835-style global interrupt controller be a child of the
71 * CPU-local interrupt controller.
72 */
73&intc {
74	compatible = "brcm,bcm2836-armctrl-ic";
75	reg = <0x7e00b200 0x200>;
76	interrupt-parent = <&local_intc>;
77	interrupts = <8>;
 
 
 
 
78};
79
80/* enable thermal sensor with the correct compatible property set */
81&thermal {
82	compatible = "brcm,bcm2836-thermal";
83	status = "okay";
84};