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1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Device Tree include file for Armada 385 based Linksys boards
4 *
5 * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10#include "armada-385.dtsi"
11
12/ {
13 model = "Linksys boards based on Armada 385";
14 compatible = "linksys,armada385", "marvell,armada385",
15 "marvell,armada380";
16
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
20
21 memory {
22 device_type = "memory";
23 reg = <0x00000000 0x20000000>; /* 512 MiB */
24 };
25
26 soc {
27 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
28 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
29 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
30 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
31 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
32 };
33
34 usb3_1_phy: usb3_1-phy {
35 compatible = "usb-nop-xceiv";
36 vcc-supply = <&usb3_1_vbus>;
37 #phy-cells = <0>;
38 };
39
40 usb3_1_vbus: usb3_1-vbus {
41 compatible = "regulator-fixed";
42 pinctrl-names = "default";
43 pinctrl-0 = <&usb3_1_vbus_pins>;
44 regulator-name = "usb3_1-vbus";
45 regulator-min-microvolt = <5000000>;
46 regulator-max-microvolt = <5000000>;
47 enable-active-high;
48 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
49 };
50
51 gpio_keys: gpio-keys {
52 compatible = "gpio-keys";
53 pinctrl-0 = <&gpio_keys_pins>;
54 pinctrl-names = "default";
55
56 wps {
57 label = "WPS";
58 linux,code = <KEY_WPS_BUTTON>;
59 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
60 };
61
62 reset {
63 label = "Factory Reset Button";
64 linux,code = <KEY_RESTART>;
65 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
66 };
67 };
68
69 gpio_leds: gpio-leds {
70 compatible = "gpio-leds";
71 pinctrl-0 = <&gpio_leds_pins>;
72 pinctrl-names = "default";
73
74 power {
75 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
76 default-state = "on";
77 };
78
79 sata {
80 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
81 default-state = "off";
82 linux,default-trigger = "disk-activity";
83 };
84 };
85};
86
87&ahci0 {
88 status = "okay";
89};
90
91&bm {
92 status = "okay";
93};
94
95&bm_bppi {
96 status = "okay";
97};
98
99ð0 {
100 status = "okay";
101 phy-mode = "rgmii-id";
102 buffer-manager = <&bm>;
103 bm,pool-long = <0>;
104 bm,pool-short = <1>;
105 fixed-link {
106 speed = <1000>;
107 full-duplex;
108 };
109};
110
111ð2 {
112 status = "okay";
113 phy-mode = "sgmii";
114 buffer-manager = <&bm>;
115 bm,pool-long = <2>;
116 bm,pool-short = <3>;
117 fixed-link {
118 speed = <1000>;
119 full-duplex;
120 };
121};
122
123&i2c0 {
124 pinctrl-names = "default";
125 pinctrl-0 = <&i2c0_pins>;
126 status = "okay";
127
128 tmp421@4c {
129 compatible = "ti,tmp421";
130 reg = <0x4c>;
131 };
132
133 expander0: pca9635@68 {
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "nxp,pca9635";
137 reg = <0x68>;
138 };
139};
140
141&nand {
142 /* 128MiB or 256MiB */
143 status = "okay";
144 num-cs = <1>;
145 marvell,nand-keep-config;
146 marvell,nand-enable-arbiter;
147 nand-on-flash-bbt;
148};
149
150&mdio {
151 status = "okay";
152
153 switch@0 {
154 compatible = "marvell,mv88e6085";
155 #address-cells = <1>;
156 #size-cells = <0>;
157 reg = <0>;
158
159 ports {
160 #address-cells = <1>;
161 #size-cells = <0>;
162
163 port@0 {
164 reg = <0>;
165 label = "lan4";
166 };
167
168 port@1 {
169 reg = <1>;
170 label = "lan3";
171 };
172
173 port@2 {
174 reg = <2>;
175 label = "lan2";
176 };
177
178 port@3 {
179 reg = <3>;
180 label = "lan1";
181 };
182
183 port@4 {
184 reg = <4>;
185 label = "wan";
186 };
187
188 port@5 {
189 reg = <5>;
190 label = "cpu";
191 ethernet = <ð2>;
192
193 fixed-link {
194 speed = <1000>;
195 full-duplex;
196 };
197 };
198 };
199 };
200};
201
202&pciec {
203 status = "okay";
204};
205
206&pcie1 {
207 /* Marvell 88W8864, 5GHz-only */
208 status = "okay";
209};
210
211&pcie2 {
212 /* Marvell 88W8864, 2GHz-only */
213 status = "okay";
214};
215
216&pinctrl {
217 gpio_keys_pins: gpio-keys-pins {
218 /* mpp24: wps, mpp29: reset */
219 marvell,pins = "mpp24", "mpp29";
220 marvell,function = "gpio";
221 };
222
223 gpio_leds_pins: gpio-leds-pins {
224 /* mpp54: sata, mpp55: power */
225 marvell,pins = "mpp54", "mpp55";
226 marvell,function = "gpio";
227 };
228
229 usb3_1_vbus_pins: usb3_1-vbus-pins {
230 marvell,pins = "mpp50";
231 marvell,function = "gpio";
232 };
233};
234
235&spi0 {
236 status = "disabled";
237};
238
239&uart0 {
240 /* J10: VCC, NC, RX, NC, TX, GND */
241 status = "okay";
242};
243
244&usb0 {
245 /* USB part of the eSATA/USB 2.0 port */
246 status = "okay";
247};
248
249&usb3_1 {
250 status = "okay";
251 usb-phy = <&usb3_1_phy>;
252};
253
254&rtc {
255 /* No crystal connected to the internal RTC */
256 status = "disabled";
257};
1/*
2 * Device Tree include file for Armada 385 based Linksys boards
3 *
4 * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
5 *
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without
14 * any warranty of any kind, whether express or implied.
15 *
16 * Or, alternatively,
17 *
18 * b) Permission is hereby granted, free of charge, to any person
19 * obtaining a copy of this software and associated documentation
20 * files (the "Software"), to deal in the Software without
21 * restriction, including without limitation the rights to use,
22 * copy, modify, merge, publish, distribute, sublicense, and/or
23 * sell copies of the Software, and to permit persons to whom the
24 * Software is furnished to do so, subject to the following
25 * conditions:
26 *
27 * The above copyright notice and this permission notice shall be
28 * included in all copies or substantial portions of the Software.
29 *
30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
31 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
32 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
33 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
34 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
35 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
36 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
37 * OTHER DEALINGS IN THE SOFTWARE.
38 */
39
40#include <dt-bindings/gpio/gpio.h>
41#include <dt-bindings/input/input.h>
42#include "armada-385.dtsi"
43
44/ {
45 model = "Linksys boards based on Armada 385";
46 compatible = "linksys,armada385", "marvell,armada385",
47 "marvell,armada380";
48
49 chosen {
50 stdout-path = "serial0:115200n8";
51 };
52
53 memory {
54 device_type = "memory";
55 reg = <0x00000000 0x20000000>; /* 512 MB */
56 };
57
58 soc {
59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
61 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
62 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
63
64 internal-regs {
65 i2c@11000 {
66 pinctrl-names = "default";
67 pinctrl-0 = <&i2c0_pins>;
68 status = "okay";
69
70 tmp421@4c {
71 compatible = "ti,tmp421";
72 reg = <0x4c>;
73 };
74
75 pca9635@68 {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 compatible = "nxp,pca9635";
79 reg = <0x68>;
80 };
81 };
82
83 /* J10: VCC, NC, RX, NC, TX, GND */
84 serial@12000 {
85 status = "okay";
86 };
87
88 ethernet@70000 {
89 status = "okay";
90 phy-mode = "rgmii-id";
91 fixed-link {
92 speed = <1000>;
93 full-duplex;
94 };
95 };
96
97 ethernet@34000 {
98 status = "okay";
99 phy-mode = "sgmii";
100 fixed-link {
101 speed = <1000>;
102 full-duplex;
103 };
104 };
105
106 mdio {
107 status = "okay";
108 };
109
110 sata@a8000 {
111 status = "okay";
112 };
113
114 /* USB part of the eSATA/USB 2.0 port */
115 usb@58000 {
116 status = "okay";
117 };
118
119 usb3@f8000 {
120 status = "okay";
121 usb-phy = <&usb3_phy>;
122 };
123
124 flash@d0000 {
125 status = "okay";
126 num-cs = <1>;
127 marvell,nand-keep-config;
128 marvell,nand-enable-arbiter;
129 nand-on-flash-bbt;
130
131 partition@0 {
132 label = "u-boot";
133 reg = <0x0000000 0x200000>; /* 2MB */
134 read-only;
135 };
136
137 partition@100000 {
138 label = "u_env";
139 reg = <0x200000 0x40000>; /* 256KB */
140 };
141
142 partition@140000 {
143 label = "s_env";
144 reg = <0x240000 0x40000>; /* 256KB */
145 };
146
147 partition@900000 {
148 label = "devinfo";
149 reg = <0x900000 0x100000>; /* 1MB */
150 read-only;
151 };
152
153 /* kernel1 overlaps with rootfs1 by design */
154 partition@a00000 {
155 label = "kernel1";
156 reg = <0xa00000 0x2800000>; /* 40MB */
157 };
158
159 partition@1000000 {
160 label = "rootfs1";
161 reg = <0x1000000 0x2200000>; /* 34MB */
162 };
163
164 /* kernel2 overlaps with rootfs2 by design */
165 partition@3200000 {
166 label = "kernel2";
167 reg = <0x3200000 0x2800000>; /* 40MB */
168 };
169
170 partition@3800000 {
171 label = "rootfs2";
172 reg = <0x3800000 0x2200000>; /* 34MB */
173 };
174
175 /*
176 * 38MB, last MB is for the BBT, not writable
177 */
178 partition@5a00000 {
179 label = "syscfg";
180 reg = <0x5a00000 0x2600000>;
181 };
182
183 /*
184 * Unused area between "s_env" and "devinfo".
185 * Moved here because otherwise the renumbered
186 * partitions would break the bootloader
187 * supplied bootargs
188 */
189 partition@180000 {
190 label = "unused_area";
191 reg = <0x280000 0x680000>; /* 6.5MB */
192 };
193 };
194 };
195
196 pcie-controller {
197 status = "okay";
198
199 pcie@1,0 {
200 /* Marvell 88W8864, 5GHz-only */
201 status = "okay";
202 };
203
204 pcie@2,0 {
205 /* Marvell 88W8864, 2GHz-only */
206 status = "okay";
207 };
208 };
209 };
210
211 usb3_phy: usb3_phy {
212 compatible = "usb-nop-xceiv";
213 vcc-supply = <®_xhci0_vbus>;
214 };
215
216 reg_xhci0_vbus: xhci0-vbus {
217 compatible = "regulator-fixed";
218 pinctrl-names = "default";
219 pinctrl-0 = <&xhci0_vbus_pins>;
220 regulator-name = "xhci0-vbus";
221 regulator-min-microvolt = <5000000>;
222 regulator-max-microvolt = <5000000>;
223 enable-active-high;
224 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
225 };
226
227 gpio_keys {
228 compatible = "gpio-keys";
229 #address-cells = <1>;
230 #size-cells = <0>;
231 pinctrl-0 = <&keys_pin>;
232 pinctrl-names = "default";
233
234 button@1 {
235 label = "WPS";
236 linux,code = <KEY_WPS_BUTTON>;
237 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
238 };
239
240 button@2 {
241 label = "Factory Reset Button";
242 linux,code = <KEY_RESTART>;
243 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
244 };
245 };
246
247 gpio-leds {
248 compatible = "gpio-leds";
249 pinctrl-0 = <&power_led_pin &sata_led_pin>;
250 pinctrl-names = "default";
251
252 power {
253 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
254 default-state = "on";
255 };
256
257 sata {
258 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
259 default-state = "off";
260 };
261 };
262
263 dsa@0 {
264 compatible = "marvell,dsa";
265 #address-cells = <2>;
266 #size-cells = <0>;
267
268 dsa,ethernet = <ð2>;
269 dsa,mii-bus = <&mdio>;
270
271 switch@0 {
272 #address-cells = <1>;
273 #size-cells = <0>;
274 reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */
275
276 port@0 {
277 reg = <0>;
278 label = "lan4";
279 };
280
281 port@1 {
282 reg = <1>;
283 label = "lan3";
284 };
285
286 port@2 {
287 reg = <2>;
288 label = "lan2";
289 };
290
291 port@3 {
292 reg = <3>;
293 label = "lan1";
294 };
295
296 port@4 {
297 reg = <4>;
298 label = "wan";
299 };
300
301 port@5 {
302 reg = <5>;
303 label = "cpu";
304 };
305 };
306 };
307};
308
309&pinctrl {
310 keys_pin: keys-pin {
311 marvell,pins = "mpp24", "mpp29";
312 marvell,function = "gpio";
313 };
314
315 power_led_pin: power-led-pin {
316 marvell,pins = "mpp55";
317 marvell,function = "gpio";
318 };
319
320 sata_led_pin: sata-led-pin {
321 marvell,pins = "mpp54";
322 marvell,function = "gpio";
323 };
324
325 xhci0_vbus_pins: xhci0-vbus-pins {
326 marvell,pins = "mpp50";
327 marvell,function = "gpio";
328 };
329};
330
331&spi0 {
332 status = "disabled";
333};