1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * IDT Winchip specific Machine Check Exception Reporting
 4 * (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>
 5 */
 6#include <linux/interrupt.h>
 7#include <linux/kernel.h>
 8#include <linux/types.h>
 
 9
10#include <asm/processor.h>
11#include <asm/traps.h>
12#include <asm/tlbflush.h>
13#include <asm/mce.h>
14#include <asm/msr.h>
15
16/* Machine check handler for WinChip C6: */
17static void winchip_machine_check(struct pt_regs *regs, long error_code)
18{
19	ist_enter(regs);
20
21	pr_emerg("CPU0: Machine Check Exception.\n");
22	add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
23
24	ist_exit(regs);
25}
26
27/* Set up machine check reporting on the Winchip C6 series */
28void winchip_mcheck_init(struct cpuinfo_x86 *c)
29{
30	u32 lo, hi;
31
32	machine_check_vector = winchip_machine_check;
33	/* Make sure the vector pointer is visible before we enable MCEs: */
34	wmb();
35
36	rdmsr(MSR_IDT_FCR1, lo, hi);
37	lo |= (1<<2);	/* Enable EIERRINT (int 18 MCE) */
38	lo &= ~(1<<4);	/* Enable MCE */
39	wrmsr(MSR_IDT_FCR1, lo, hi);
40
41	cr4_set_bits(X86_CR4_MCE);
42
43	pr_info("Winchip machine check reporting enabled on CPU#0.\n");
 
44}

 
 1/*
 2 * IDT Winchip specific Machine Check Exception Reporting
 3 * (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>
 4 */
 5#include <linux/interrupt.h>
 6#include <linux/kernel.h>
 7#include <linux/types.h>
 8#include <linux/init.h>
 9
10#include <asm/processor.h>
 
 
11#include <asm/mce.h>
12#include <asm/msr.h>
13
14/* Machine check handler for WinChip C6: */
15static void winchip_machine_check(struct pt_regs *regs, long error_code)
16{
17	printk(KERN_EMERG "CPU0: Machine Check Exception.\n");
18	add_taint(TAINT_MACHINE_CHECK);
 
 
 
 
19}
20
21/* Set up machine check reporting on the Winchip C6 series */
22void winchip_mcheck_init(struct cpuinfo_x86 *c)
23{
24	u32 lo, hi;
25
26	machine_check_vector = winchip_machine_check;
27	/* Make sure the vector pointer is visible before we enable MCEs: */
28	wmb();
29
30	rdmsr(MSR_IDT_FCR1, lo, hi);
31	lo |= (1<<2);	/* Enable EIERRINT (int 18 MCE) */
32	lo &= ~(1<<4);	/* Enable MCE */
33	wrmsr(MSR_IDT_FCR1, lo, hi);
34
35	set_in_cr4(X86_CR4_MCE);
36
37	printk(KERN_INFO
38	       "Winchip machine check reporting enabled on CPU#0.\n");
39}