1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef __ASM_SH_CACHE_INSNS_32_H
 3#define __ASM_SH_CACHE_INSNS_32_H
 4
 5#include <linux/types.h>
 6
 7#if defined(CONFIG_CPU_SH4A)
 8#define __icbi(addr)	__asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr))
 9#else
10#define __icbi(addr)	mb()
11#endif
12
13#define __ocbp(addr)	__asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr))
14#define __ocbi(addr)	__asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr))
15#define __ocbwb(addr)	__asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr))
16
17static inline reg_size_t register_align(void *val)
18{
19	return (unsigned long)(signed long)val;
20}
21
22#endif /* __ASM_SH_CACHE_INSNS_32_H */

 
 1#ifndef __ASM_SH_CACHE_INSNS_32_H
 2#define __ASM_SH_CACHE_INSNS_32_H
 3
 4#include <linux/types.h>
 5
 6#if defined(CONFIG_CPU_SH4A)
 7#define __icbi(addr)	__asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr))
 8#else
 9#define __icbi(addr)	mb()
10#endif
11
12#define __ocbp(addr)	__asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr))
13#define __ocbi(addr)	__asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr))
14#define __ocbwb(addr)	__asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr))
15
16static inline reg_size_t register_align(void *val)
17{
18	return (unsigned long)(signed long)val;
19}
20
21#endif /* __ASM_SH_CACHE_INSNS_32_H */