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1/*
2 * Blackfin architecture-dependent process handling
3 *
4 * Copyright 2004-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later
7 */
8
9#include <linux/module.h>
10#include <linux/unistd.h>
11#include <linux/user.h>
12#include <linux/uaccess.h>
13#include <linux/slab.h>
14#include <linux/sched.h>
15#include <linux/tick.h>
16#include <linux/fs.h>
17#include <linux/err.h>
18
19#include <asm/blackfin.h>
20#include <asm/fixed_code.h>
21#include <asm/mem_map.h>
22#include <asm/irq.h>
23
24asmlinkage void ret_from_fork(void);
25
26/* Points to the SDRAM backup memory for the stack that is currently in
27 * L1 scratchpad memory.
28 */
29void *current_l1_stack_save;
30
31/* The number of tasks currently using a L1 stack area. The SRAM is
32 * allocated/deallocated whenever this changes from/to zero.
33 */
34int nr_l1stack_tasks;
35
36/* Start and length of the area in L1 scratchpad memory which we've allocated
37 * for process stacks.
38 */
39void *l1_stack_base;
40unsigned long l1_stack_len;
41
42/*
43 * Powermanagement idle function, if any..
44 */
45void (*pm_idle)(void) = NULL;
46EXPORT_SYMBOL(pm_idle);
47
48void (*pm_power_off)(void) = NULL;
49EXPORT_SYMBOL(pm_power_off);
50
51/*
52 * The idle loop on BFIN
53 */
54#ifdef CONFIG_IDLE_L1
55static void default_idle(void)__attribute__((l1_text));
56void cpu_idle(void)__attribute__((l1_text));
57#endif
58
59/*
60 * This is our default idle handler. We need to disable
61 * interrupts here to ensure we don't miss a wakeup call.
62 */
63static void default_idle(void)
64{
65#ifdef CONFIG_IPIPE
66 ipipe_suspend_domain();
67#endif
68 hard_local_irq_disable();
69 if (!need_resched())
70 idle_with_irq_disabled();
71
72 hard_local_irq_enable();
73}
74
75/*
76 * The idle thread. We try to conserve power, while trying to keep
77 * overall latency low. The architecture specific idle is passed
78 * a value to indicate the level of "idleness" of the system.
79 */
80void cpu_idle(void)
81{
82 /* endless idle loop with no priority at all */
83 while (1) {
84 void (*idle)(void) = pm_idle;
85
86#ifdef CONFIG_HOTPLUG_CPU
87 if (cpu_is_offline(smp_processor_id()))
88 cpu_die();
89#endif
90 if (!idle)
91 idle = default_idle;
92 tick_nohz_idle_enter();
93 rcu_idle_enter();
94 while (!need_resched())
95 idle();
96 rcu_idle_exit();
97 tick_nohz_idle_exit();
98 preempt_enable_no_resched();
99 schedule();
100 preempt_disable();
101 }
102}
103
104/*
105 * This gets run with P1 containing the
106 * function to call, and R1 containing
107 * the "args". Note P0 is clobbered on the way here.
108 */
109void kernel_thread_helper(void);
110__asm__(".section .text\n"
111 ".align 4\n"
112 "_kernel_thread_helper:\n\t"
113 "\tsp += -12;\n\t"
114 "\tr0 = r1;\n\t" "\tcall (p1);\n\t" "\tcall _do_exit;\n" ".previous");
115
116/*
117 * Create a kernel thread.
118 */
119pid_t kernel_thread(int (*fn) (void *), void *arg, unsigned long flags)
120{
121 struct pt_regs regs;
122
123 memset(®s, 0, sizeof(regs));
124
125 regs.r1 = (unsigned long)arg;
126 regs.p1 = (unsigned long)fn;
127 regs.pc = (unsigned long)kernel_thread_helper;
128 regs.orig_p0 = -1;
129 /* Set bit 2 to tell ret_from_fork we should be returning to kernel
130 mode. */
131 regs.ipend = 0x8002;
132 __asm__ __volatile__("%0 = syscfg;":"=da"(regs.syscfg):);
133 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL,
134 NULL);
135}
136EXPORT_SYMBOL(kernel_thread);
137
138/*
139 * Do necessary setup to start up a newly executed thread.
140 *
141 * pass the data segment into user programs if it exists,
142 * it can't hurt anything as far as I can tell
143 */
144void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
145{
146 regs->pc = new_ip;
147 if (current->mm)
148 regs->p5 = current->mm->start_data;
149#ifndef CONFIG_SMP
150 task_thread_info(current)->l1_task_info.stack_start =
151 (void *)current->mm->context.stack_start;
152 task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
153 memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
154 sizeof(*L1_SCRATCH_TASK_INFO));
155#endif
156 wrusp(new_sp);
157}
158EXPORT_SYMBOL_GPL(start_thread);
159
160void flush_thread(void)
161{
162}
163
164asmlinkage int bfin_vfork(struct pt_regs *regs)
165{
166 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL,
167 NULL);
168}
169
170asmlinkage int bfin_clone(struct pt_regs *regs)
171{
172 unsigned long clone_flags;
173 unsigned long newsp;
174
175#ifdef __ARCH_SYNC_CORE_DCACHE
176 if (current->nr_cpus_allowed == num_possible_cpus())
177 set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id()));
178#endif
179
180 /* syscall2 puts clone_flags in r0 and usp in r1 */
181 clone_flags = regs->r0;
182 newsp = regs->r1;
183 if (!newsp)
184 newsp = rdusp();
185 else
186 newsp -= 12;
187 return do_fork(clone_flags, newsp, regs, 0, NULL, NULL);
188}
189
190int
191copy_thread(unsigned long clone_flags,
192 unsigned long usp, unsigned long topstk,
193 struct task_struct *p, struct pt_regs *regs)
194{
195 struct pt_regs *childregs;
196
197 childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
198 *childregs = *regs;
199 childregs->r0 = 0;
200
201 p->thread.usp = usp;
202 p->thread.ksp = (unsigned long)childregs;
203 p->thread.pc = (unsigned long)ret_from_fork;
204
205 return 0;
206}
207
208/*
209 * sys_execve() executes a new program.
210 */
211asmlinkage int sys_execve(const char __user *name,
212 const char __user *const __user *argv,
213 const char __user *const __user *envp)
214{
215 int error;
216 char *filename;
217 struct pt_regs *regs = (struct pt_regs *)((&name) + 6);
218
219 filename = getname(name);
220 error = PTR_ERR(filename);
221 if (IS_ERR(filename))
222 return error;
223 error = do_execve(filename, argv, envp, regs);
224 putname(filename);
225 return error;
226}
227
228unsigned long get_wchan(struct task_struct *p)
229{
230 unsigned long fp, pc;
231 unsigned long stack_page;
232 int count = 0;
233 if (!p || p == current || p->state == TASK_RUNNING)
234 return 0;
235
236 stack_page = (unsigned long)p;
237 fp = p->thread.usp;
238 do {
239 if (fp < stack_page + sizeof(struct thread_info) ||
240 fp >= 8184 + stack_page)
241 return 0;
242 pc = ((unsigned long *)fp)[1];
243 if (!in_sched_functions(pc))
244 return pc;
245 fp = *(unsigned long *)fp;
246 }
247 while (count++ < 16);
248 return 0;
249}
250
251void finish_atomic_sections (struct pt_regs *regs)
252{
253 int __user *up0 = (int __user *)regs->p0;
254
255 switch (regs->pc) {
256 default:
257 /* not in middle of an atomic step, so resume like normal */
258 return;
259
260 case ATOMIC_XCHG32 + 2:
261 put_user(regs->r1, up0);
262 break;
263
264 case ATOMIC_CAS32 + 2:
265 case ATOMIC_CAS32 + 4:
266 if (regs->r0 == regs->r1)
267 case ATOMIC_CAS32 + 6:
268 put_user(regs->r2, up0);
269 break;
270
271 case ATOMIC_ADD32 + 2:
272 regs->r0 = regs->r1 + regs->r0;
273 /* fall through */
274 case ATOMIC_ADD32 + 4:
275 put_user(regs->r0, up0);
276 break;
277
278 case ATOMIC_SUB32 + 2:
279 regs->r0 = regs->r1 - regs->r0;
280 /* fall through */
281 case ATOMIC_SUB32 + 4:
282 put_user(regs->r0, up0);
283 break;
284
285 case ATOMIC_IOR32 + 2:
286 regs->r0 = regs->r1 | regs->r0;
287 /* fall through */
288 case ATOMIC_IOR32 + 4:
289 put_user(regs->r0, up0);
290 break;
291
292 case ATOMIC_AND32 + 2:
293 regs->r0 = regs->r1 & regs->r0;
294 /* fall through */
295 case ATOMIC_AND32 + 4:
296 put_user(regs->r0, up0);
297 break;
298
299 case ATOMIC_XOR32 + 2:
300 regs->r0 = regs->r1 ^ regs->r0;
301 /* fall through */
302 case ATOMIC_XOR32 + 4:
303 put_user(regs->r0, up0);
304 break;
305 }
306
307 /*
308 * We've finished the atomic section, and the only thing left for
309 * userspace is to do a RTS, so we might as well handle that too
310 * since we need to update the PC anyways.
311 */
312 regs->pc = regs->rets;
313}
314
315static inline
316int in_mem(unsigned long addr, unsigned long size,
317 unsigned long start, unsigned long end)
318{
319 return addr >= start && addr + size <= end;
320}
321static inline
322int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
323 unsigned long const_addr, unsigned long const_size)
324{
325 return const_size &&
326 in_mem(addr, size, const_addr + off, const_addr + const_size);
327}
328static inline
329int in_mem_const(unsigned long addr, unsigned long size,
330 unsigned long const_addr, unsigned long const_size)
331{
332 return in_mem_const_off(addr, size, 0, const_addr, const_size);
333}
334#ifdef CONFIG_BF60x
335#define ASYNC_ENABLED(bnum, bctlnum) 1
336#else
337#define ASYNC_ENABLED(bnum, bctlnum) \
338({ \
339 (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
340 bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
341 1; \
342})
343#endif
344/*
345 * We can't read EBIU banks that aren't enabled or we end up hanging
346 * on the access to the async space. Make sure we validate accesses
347 * that cross async banks too.
348 * 0 - found, but unusable
349 * 1 - found & usable
350 * 2 - not found
351 */
352static
353int in_async(unsigned long addr, unsigned long size)
354{
355 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
356 if (!ASYNC_ENABLED(0, 0))
357 return 0;
358 if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
359 return 1;
360 size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
361 addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
362 }
363 if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
364 if (!ASYNC_ENABLED(1, 0))
365 return 0;
366 if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
367 return 1;
368 size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
369 addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
370 }
371 if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
372 if (!ASYNC_ENABLED(2, 1))
373 return 0;
374 if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
375 return 1;
376 size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
377 addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
378 }
379 if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
380 if (ASYNC_ENABLED(3, 1))
381 return 0;
382 if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
383 return 1;
384 return 0;
385 }
386
387 /* not within async bounds */
388 return 2;
389}
390
391int bfin_mem_access_type(unsigned long addr, unsigned long size)
392{
393 int cpu = raw_smp_processor_id();
394
395 /* Check that things do not wrap around */
396 if (addr > ULONG_MAX - size)
397 return -EFAULT;
398
399 if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
400 return BFIN_MEM_ACCESS_CORE;
401
402 if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
403 return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
404 if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
405 return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
406 if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
407 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
408 if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
409 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
410#ifdef COREB_L1_CODE_START
411 if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
412 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
413 if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
414 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
415 if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
416 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
417 if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
418 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
419#endif
420 if (in_mem_const(addr, size, L2_START, L2_LENGTH))
421 return BFIN_MEM_ACCESS_CORE;
422
423 if (addr >= SYSMMR_BASE)
424 return BFIN_MEM_ACCESS_CORE_ONLY;
425
426 switch (in_async(addr, size)) {
427 case 0: return -EFAULT;
428 case 1: return BFIN_MEM_ACCESS_CORE;
429 case 2: /* fall through */;
430 }
431
432 if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
433 return BFIN_MEM_ACCESS_CORE;
434 if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
435 return BFIN_MEM_ACCESS_DMA;
436
437 return -EFAULT;
438}
439
440#if defined(CONFIG_ACCESS_CHECK)
441#ifdef CONFIG_ACCESS_OK_L1
442__attribute__((l1_text))
443#endif
444/* Return 1 if access to memory range is OK, 0 otherwise */
445int _access_ok(unsigned long addr, unsigned long size)
446{
447 int aret;
448
449 if (size == 0)
450 return 1;
451 /* Check that things do not wrap around */
452 if (addr > ULONG_MAX - size)
453 return 0;
454 if (segment_eq(get_fs(), KERNEL_DS))
455 return 1;
456#ifdef CONFIG_MTD_UCLINUX
457 if (1)
458#else
459 if (0)
460#endif
461 {
462 if (in_mem(addr, size, memory_start, memory_end))
463 return 1;
464 if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
465 return 1;
466# ifndef CONFIG_ROMFS_ON_MTD
467 if (0)
468# endif
469 /* For XIP, allow user space to use pointers within the ROMFS. */
470 if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
471 return 1;
472 } else {
473 if (in_mem(addr, size, memory_start, physical_mem_end))
474 return 1;
475 }
476
477 if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
478 return 1;
479
480 if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
481 return 1;
482 if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
483 return 1;
484 if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
485 return 1;
486 if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
487 return 1;
488#ifdef COREB_L1_CODE_START
489 if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
490 return 1;
491 if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
492 return 1;
493 if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
494 return 1;
495 if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
496 return 1;
497#endif
498
499#ifndef CONFIG_EXCEPTION_L1_SCRATCH
500 if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len))
501 return 1;
502#endif
503
504 aret = in_async(addr, size);
505 if (aret < 2)
506 return aret;
507
508 if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
509 return 1;
510
511 if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
512 return 1;
513 if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
514 return 1;
515
516 return 0;
517}
518EXPORT_SYMBOL(_access_ok);
519#endif /* CONFIG_ACCESS_CHECK */