1/*
  2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
  3 */
  4
  5/*
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License version 2 as
  8 * published by the Free Software Foundation.
  9 */
 10
 11#ifndef __ASM_ARCH_MXC_COMMON_H__
 12#define __ASM_ARCH_MXC_COMMON_H__
 13
 14#include <linux/reboot.h>
 15
 16struct irq_data;
 17struct platform_device;
 18struct pt_regs;
 19struct clk;
 20struct device_node;
 21enum mxc_cpu_pwr_mode;
 22struct of_device_id;
 23
 24void mx21_map_io(void);
 25void mx27_map_io(void);
 26void mx31_map_io(void);
 27void mx35_map_io(void);
 28void imx21_init_early(void);
 29void imx27_init_early(void);
 30void imx31_init_early(void);
 31void imx35_init_early(void);
 32void mxc_init_irq(void __iomem *);
 33void mx21_init_irq(void);
 34void mx27_init_irq(void);
 35void mx31_init_irq(void);
 36void mx35_init_irq(void);
 37void imx21_soc_init(void);
 38void imx27_soc_init(void);
 39void imx31_soc_init(void);
 40void imx35_soc_init(void);
 41void epit_timer_init(void __iomem *base, int irq);
 42int mx21_clocks_init(unsigned long lref, unsigned long fref);
 43int mx27_clocks_init(unsigned long fref);
 44int mx31_clocks_init(unsigned long fref);
 45int mx35_clocks_init(void);
 46struct platform_device *mxc_register_gpio(char *name, int id,
 47	resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
 48void mxc_set_cpu_type(unsigned int type);
 49void mxc_restart(enum reboot_mode, const char *);
 50void mxc_arch_reset_init(void __iomem *);
 51void imx1_reset_init(void __iomem *);
 52void imx_set_aips(void __iomem *);
 53void imx_aips_allow_unprivileged_access(const char *compat);
 54int mxc_device_init(void);
 55void imx_set_soc_revision(unsigned int rev);
 56void imx_init_revision_from_anatop(void);
 57struct device *imx_soc_device_init(void);
 58void imx6_enable_rbc(bool enable);
 59void imx_gpc_check_dt(void);
 60void imx_gpc_set_arm_power_in_lpm(bool power_off);
 61void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
 62void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
 63void imx25_pm_init(void);
 64void imx27_pm_init(void);
 65
 66enum mxc_cpu_pwr_mode {
 67	WAIT_CLOCKED,		/* wfi only */
 68	WAIT_UNCLOCKED,		/* WAIT */
 69	WAIT_UNCLOCKED_POWER_OFF,	/* WAIT + SRPG */
 70	STOP_POWER_ON,		/* just STOP */
 71	STOP_POWER_OFF,		/* STOP + SRPG */
 72};
 73
 74void imx_enable_cpu(int cpu, bool enable);
 75void imx_set_cpu_jump(int cpu, void *jump_addr);
 76u32 imx_get_cpu_arg(int cpu);
 77void imx_set_cpu_arg(int cpu, u32 arg);
 78#ifdef CONFIG_SMP
 79void v7_secondary_startup(void);
 80void imx_scu_map_io(void);
 81void imx_smp_prepare(void);
 82#else
 83static inline void imx_scu_map_io(void) {}
 84static inline void imx_smp_prepare(void) {}
 85#endif
 86void imx_src_init(void);
 87void imx_gpc_pre_suspend(bool arm_power_off);
 88void imx_gpc_post_resume(void);
 89void imx_gpc_mask_all(void);
 90void imx_gpc_restore_all(void);
 91void imx_gpc_hwirq_mask(unsigned int hwirq);
 92void imx_gpc_hwirq_unmask(unsigned int hwirq);
 93void imx_anatop_init(void);
 94void imx_anatop_pre_suspend(void);
 95void imx_anatop_post_resume(void);
 96int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
 97void imx6_set_int_mem_clk_lpm(bool enable);
 98void imx6sl_set_wait_clk(bool enter);
 99int imx_mmdc_get_ddr_type(void);
100
101void imx_cpu_die(unsigned int cpu);
102int imx_cpu_kill(unsigned int cpu);
103
104#ifdef CONFIG_SUSPEND
105void v7_cpu_resume(void);
106void imx53_suspend(void __iomem *ocram_vbase);
107extern const u32 imx53_suspend_sz;
108void imx6_suspend(void __iomem *ocram_vbase);
109#else
110static inline void v7_cpu_resume(void) {}
111static inline void imx53_suspend(void __iomem *ocram_vbase) {}
112static const u32 imx53_suspend_sz;
113static inline void imx6_suspend(void __iomem *ocram_vbase) {}
114#endif
115
116void imx6_pm_ccm_init(const char *ccm_compat);
117void imx6q_pm_init(void);
118void imx6dl_pm_init(void);
119void imx6sl_pm_init(void);
120void imx6sx_pm_init(void);
121void imx6ul_pm_init(void);
122
123#ifdef CONFIG_PM
124void imx51_pm_init(void);
125void imx53_pm_init(void);
126#else
127static inline void imx51_pm_init(void) {}
128static inline void imx53_pm_init(void) {}
129#endif
130
131#ifdef CONFIG_NEON
132int mx51_neon_fixup(void);
133#else
134static inline int mx51_neon_fixup(void) { return 0; }
135#endif
136
137#ifdef CONFIG_CACHE_L2X0
138void imx_init_l2cache(void);
139#else
140static inline void imx_init_l2cache(void) {}
141#endif
142
143extern const struct smp_operations imx_smp_ops;
144extern const struct smp_operations ls1021a_smp_ops;
145
146#endif