1/*
  2 * vt8500.dtsi - Device tree file for VIA VT8500 SoC
  3 *
  4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
  5 *
  6 * Licensed under GPLv2 or later
  7 */
  8
  9/include/ "skeleton.dtsi"
 10
 11/ {
 12	compatible = "via,vt8500";
 13
 14	cpus {
 15		#address-cells = <0>;
 16		#size-cells = <0>;
 17
 18		cpu {
 19			device_type = "cpu";
 20			compatible = "arm,arm926ej-s";
 21		};
 22	};
 23
 24	aliases {
 25		serial0 = &uart0;
 26		serial1 = &uart1;
 27		serial2 = &uart2;
 28		serial3 = &uart3;
 29	};
 30
 31	soc {
 32		#address-cells = <1>;
 33		#size-cells = <1>;
 34		compatible = "simple-bus";
 35		ranges;
 36		interrupt-parent = <&intc>;
 37
 38		intc: interrupt-controller@d8140000 {
 39			compatible = "via,vt8500-intc";
 40			interrupt-controller;
 41			reg = <0xd8140000 0x10000>;
 42			#interrupt-cells = <1>;
 43		};
 44
 45		pinctrl: pinctrl@d8110000 {
 46			compatible = "via,vt8500-pinctrl";
 47			reg = <0xd8110000 0x10000>;
 48			interrupt-controller;
 49			#interrupt-cells = <2>;
 50			gpio-controller;
 51			#gpio-cells = <2>;
 52		};
 53
 54		pmc@d8130000 {
 55			compatible = "via,vt8500-pmc";
 56			reg = <0xd8130000 0x1000>;
 57
 58			clocks {
 59				#address-cells = <1>;
 60				#size-cells = <0>;
 61
 62				ref24: ref24M {
 63					#clock-cells = <0>;
 64					compatible = "fixed-clock";
 65					clock-frequency = <24000000>;
 66				};
 67
 68				clkuart0: uart0 {
 69					#clock-cells = <0>;
 70					compatible = "via,vt8500-device-clock";
 71					clocks = <&ref24>;
 72					enable-reg = <0x250>;
 73					enable-bit = <1>;
 74				};
 75
 76				clkuart1: uart1 {
 77					#clock-cells = <0>;
 78					compatible = "via,vt8500-device-clock";
 79					clocks = <&ref24>;
 80					enable-reg = <0x250>;
 81					enable-bit = <2>;
 82				};
 83
 84				clkuart2: uart2 {
 85					#clock-cells = <0>;
 86					compatible = "via,vt8500-device-clock";
 87					clocks = <&ref24>;
 88					enable-reg = <0x250>;
 89					enable-bit = <3>;
 90				};
 91
 92				clkuart3: uart3 {
 93					#clock-cells = <0>;
 94					compatible = "via,vt8500-device-clock";
 95					clocks = <&ref24>;
 96					enable-reg = <0x250>;
 97					enable-bit = <4>;
 98				};
 99			};
100		};
101
102		timer@d8130100 {
103			compatible = "via,vt8500-timer";
104			reg = <0xd8130100 0x28>;
105			interrupts = <36>;
106		};
107
108		ehci@d8007900 {
109			compatible = "via,vt8500-ehci";
110			reg = <0xd8007900 0x200>;
111			interrupts = <43>;
112		};
113
114		uhci@d8007b00 {
115			compatible = "platform-uhci";
116			reg = <0xd8007b00 0x200>;
117			interrupts = <43>;
118		};
119
120		fb: fb@d8050800 {
121			compatible = "via,vt8500-fb";
122			reg = <0xd800e400 0x400>;
123			interrupts = <12>;
124		};
125
126		ge_rops@d8050400 {
127			compatible = "wm,prizm-ge-rops";
128			reg = <0xd8050400 0x100>;
129		};
130
131		uart0: serial@d8200000 {
132			compatible = "via,vt8500-uart";
133			reg = <0xd8200000 0x1040>;
134			interrupts = <32>;
135			clocks = <&clkuart0>;
136			status = "disabled";
137		};
138
139		uart1: serial@d82b0000 {
140			compatible = "via,vt8500-uart";
141			reg = <0xd82b0000 0x1040>;
142			interrupts = <33>;
143			clocks = <&clkuart1>;
144			status = "disabled";
145		};
146
147		uart2: serial@d8210000 {
148			compatible = "via,vt8500-uart";
149			reg = <0xd8210000 0x1040>;
150			interrupts = <47>;
151			clocks = <&clkuart2>;
152			status = "disabled";
153		};
154
155		uart3: serial@d82c0000 {
156			compatible = "via,vt8500-uart";
157			reg = <0xd82c0000 0x1040>;
158			interrupts = <50>;
159			clocks = <&clkuart3>;
160			status = "disabled";
161		};
162
163		rtc@d8100000 {
164			compatible = "via,vt8500-rtc";
165			reg = <0xd8100000 0x10000>;
166			interrupts = <48>;
167		};
168
169		ethernet@d8004000 {
170			compatible = "via,vt8500-rhine";
171			reg = <0xd8004000 0x100>;
172			interrupts = <10>;
173		};
174	};
175};