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1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include "imx23-pinfunc.h"
13
14/ {
15 #address-cells = <1>;
16 #size-cells = <1>;
17
18 interrupt-parent = <&icoll>;
19 /*
20 * The decompressor and also some bootloaders rely on a
21 * pre-existing /chosen node to be available to insert the
22 * command line and merge other ATAGS info.
23 * Also for U-Boot there must be a pre-existing /memory node.
24 */
25 chosen {};
26 memory { device_type = "memory"; };
27
28 aliases {
29 gpio0 = &gpio0;
30 gpio1 = &gpio1;
31 gpio2 = &gpio2;
32 serial0 = &auart0;
33 serial1 = &auart1;
34 spi0 = &ssp0;
35 spi1 = &ssp1;
36 usbphy0 = &usbphy0;
37 };
38
39 cpus {
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 cpu@0 {
44 compatible = "arm,arm926ej-s";
45 device_type = "cpu";
46 reg = <0>;
47 };
48 };
49
50 apb@80000000 {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 reg = <0x80000000 0x80000>;
55 ranges;
56
57 apbh@80000000 {
58 compatible = "simple-bus";
59 #address-cells = <1>;
60 #size-cells = <1>;
61 reg = <0x80000000 0x40000>;
62 ranges;
63
64 icoll: interrupt-controller@80000000 {
65 compatible = "fsl,imx23-icoll", "fsl,icoll";
66 interrupt-controller;
67 #interrupt-cells = <1>;
68 reg = <0x80000000 0x2000>;
69 };
70
71 dma_apbh: dma-apbh@80004000 {
72 compatible = "fsl,imx23-dma-apbh";
73 reg = <0x80004000 0x2000>;
74 interrupts = <0 14 20 0
75 13 13 13 13>;
76 interrupt-names = "empty", "ssp0", "ssp1", "empty",
77 "gpmi0", "gpmi1", "gpmi2", "gpmi3";
78 #dma-cells = <1>;
79 dma-channels = <8>;
80 clocks = <&clks 15>;
81 };
82
83 ecc@80008000 {
84 reg = <0x80008000 0x2000>;
85 status = "disabled";
86 };
87
88 gpmi-nand@8000c000 {
89 compatible = "fsl,imx23-gpmi-nand";
90 #address-cells = <1>;
91 #size-cells = <1>;
92 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
93 reg-names = "gpmi-nand", "bch";
94 interrupts = <56>;
95 interrupt-names = "bch";
96 clocks = <&clks 34>;
97 clock-names = "gpmi_io";
98 dmas = <&dma_apbh 4>;
99 dma-names = "rx-tx";
100 status = "disabled";
101 };
102
103 ssp0: ssp@80010000 {
104 reg = <0x80010000 0x2000>;
105 interrupts = <15>;
106 clocks = <&clks 33>;
107 dmas = <&dma_apbh 1>;
108 dma-names = "rx-tx";
109 status = "disabled";
110 };
111
112 etm@80014000 {
113 reg = <0x80014000 0x2000>;
114 status = "disabled";
115 };
116
117 pinctrl@80018000 {
118 #address-cells = <1>;
119 #size-cells = <0>;
120 compatible = "fsl,imx23-pinctrl", "simple-bus";
121 reg = <0x80018000 0x2000>;
122
123 gpio0: gpio@0 {
124 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
125 reg = <0>;
126 interrupts = <16>;
127 gpio-controller;
128 #gpio-cells = <2>;
129 interrupt-controller;
130 #interrupt-cells = <2>;
131 };
132
133 gpio1: gpio@1 {
134 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
135 reg = <1>;
136 interrupts = <17>;
137 gpio-controller;
138 #gpio-cells = <2>;
139 interrupt-controller;
140 #interrupt-cells = <2>;
141 };
142
143 gpio2: gpio@2 {
144 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
145 reg = <2>;
146 interrupts = <18>;
147 gpio-controller;
148 #gpio-cells = <2>;
149 interrupt-controller;
150 #interrupt-cells = <2>;
151 };
152
153 duart_pins_a: duart@0 {
154 reg = <0>;
155 fsl,pinmux-ids = <
156 MX23_PAD_PWM0__DUART_RX
157 MX23_PAD_PWM1__DUART_TX
158 >;
159 fsl,drive-strength = <MXS_DRIVE_4mA>;
160 fsl,voltage = <MXS_VOLTAGE_HIGH>;
161 fsl,pull-up = <MXS_PULL_DISABLE>;
162 };
163
164 auart0_pins_a: auart0@0 {
165 reg = <0>;
166 fsl,pinmux-ids = <
167 MX23_PAD_AUART1_RX__AUART1_RX
168 MX23_PAD_AUART1_TX__AUART1_TX
169 MX23_PAD_AUART1_CTS__AUART1_CTS
170 MX23_PAD_AUART1_RTS__AUART1_RTS
171 >;
172 fsl,drive-strength = <MXS_DRIVE_4mA>;
173 fsl,voltage = <MXS_VOLTAGE_HIGH>;
174 fsl,pull-up = <MXS_PULL_DISABLE>;
175 };
176
177 auart0_2pins_a: auart0-2pins@0 {
178 reg = <0>;
179 fsl,pinmux-ids = <
180 MX23_PAD_I2C_SCL__AUART1_TX
181 MX23_PAD_I2C_SDA__AUART1_RX
182 >;
183 fsl,drive-strength = <MXS_DRIVE_4mA>;
184 fsl,voltage = <MXS_VOLTAGE_HIGH>;
185 fsl,pull-up = <MXS_PULL_DISABLE>;
186 };
187
188 auart1_2pins_a: auart1-2pins@0 {
189 reg = <0>;
190 fsl,pinmux-ids = <
191 MX23_PAD_GPMI_D14__AUART2_RX
192 MX23_PAD_GPMI_D15__AUART2_TX
193 >;
194 fsl,drive-strength = <MXS_DRIVE_4mA>;
195 fsl,voltage = <MXS_VOLTAGE_HIGH>;
196 fsl,pull-up = <MXS_PULL_DISABLE>;
197 };
198
199 gpmi_pins_a: gpmi-nand@0 {
200 reg = <0>;
201 fsl,pinmux-ids = <
202 MX23_PAD_GPMI_D00__GPMI_D00
203 MX23_PAD_GPMI_D01__GPMI_D01
204 MX23_PAD_GPMI_D02__GPMI_D02
205 MX23_PAD_GPMI_D03__GPMI_D03
206 MX23_PAD_GPMI_D04__GPMI_D04
207 MX23_PAD_GPMI_D05__GPMI_D05
208 MX23_PAD_GPMI_D06__GPMI_D06
209 MX23_PAD_GPMI_D07__GPMI_D07
210 MX23_PAD_GPMI_CLE__GPMI_CLE
211 MX23_PAD_GPMI_ALE__GPMI_ALE
212 MX23_PAD_GPMI_RDY0__GPMI_RDY0
213 MX23_PAD_GPMI_RDY1__GPMI_RDY1
214 MX23_PAD_GPMI_WPN__GPMI_WPN
215 MX23_PAD_GPMI_WRN__GPMI_WRN
216 MX23_PAD_GPMI_RDN__GPMI_RDN
217 MX23_PAD_GPMI_CE1N__GPMI_CE1N
218 MX23_PAD_GPMI_CE0N__GPMI_CE0N
219 >;
220 fsl,drive-strength = <MXS_DRIVE_4mA>;
221 fsl,voltage = <MXS_VOLTAGE_HIGH>;
222 fsl,pull-up = <MXS_PULL_DISABLE>;
223 };
224
225 gpmi_pins_fixup: gpmi-pins-fixup@0 {
226 reg = <0>;
227 fsl,pinmux-ids = <
228 MX23_PAD_GPMI_WPN__GPMI_WPN
229 MX23_PAD_GPMI_WRN__GPMI_WRN
230 MX23_PAD_GPMI_RDN__GPMI_RDN
231 >;
232 fsl,drive-strength = <MXS_DRIVE_12mA>;
233 };
234
235 mmc0_4bit_pins_a: mmc0-4bit@0 {
236 reg = <0>;
237 fsl,pinmux-ids = <
238 MX23_PAD_SSP1_DATA0__SSP1_DATA0
239 MX23_PAD_SSP1_DATA1__SSP1_DATA1
240 MX23_PAD_SSP1_DATA2__SSP1_DATA2
241 MX23_PAD_SSP1_DATA3__SSP1_DATA3
242 MX23_PAD_SSP1_CMD__SSP1_CMD
243 MX23_PAD_SSP1_SCK__SSP1_SCK
244 >;
245 fsl,drive-strength = <MXS_DRIVE_8mA>;
246 fsl,voltage = <MXS_VOLTAGE_HIGH>;
247 fsl,pull-up = <MXS_PULL_ENABLE>;
248 };
249
250 mmc0_8bit_pins_a: mmc0-8bit@0 {
251 reg = <0>;
252 fsl,pinmux-ids = <
253 MX23_PAD_SSP1_DATA0__SSP1_DATA0
254 MX23_PAD_SSP1_DATA1__SSP1_DATA1
255 MX23_PAD_SSP1_DATA2__SSP1_DATA2
256 MX23_PAD_SSP1_DATA3__SSP1_DATA3
257 MX23_PAD_GPMI_D08__SSP1_DATA4
258 MX23_PAD_GPMI_D09__SSP1_DATA5
259 MX23_PAD_GPMI_D10__SSP1_DATA6
260 MX23_PAD_GPMI_D11__SSP1_DATA7
261 MX23_PAD_SSP1_CMD__SSP1_CMD
262 MX23_PAD_SSP1_DETECT__SSP1_DETECT
263 MX23_PAD_SSP1_SCK__SSP1_SCK
264 >;
265 fsl,drive-strength = <MXS_DRIVE_8mA>;
266 fsl,voltage = <MXS_VOLTAGE_HIGH>;
267 fsl,pull-up = <MXS_PULL_ENABLE>;
268 };
269
270 mmc0_pins_fixup: mmc0-pins-fixup@0 {
271 reg = <0>;
272 fsl,pinmux-ids = <
273 MX23_PAD_SSP1_DETECT__SSP1_DETECT
274 MX23_PAD_SSP1_SCK__SSP1_SCK
275 >;
276 fsl,pull-up = <MXS_PULL_DISABLE>;
277 };
278
279 mmc1_4bit_pins_a: mmc1-4bit@0 {
280 reg = <0>;
281 fsl,pinmux-ids = <
282 MX23_PAD_GPMI_D00__SSP2_DATA0
283 MX23_PAD_GPMI_D01__SSP2_DATA1
284 MX23_PAD_GPMI_D02__SSP2_DATA2
285 MX23_PAD_GPMI_D03__SSP2_DATA3
286 MX23_PAD_GPMI_RDY1__SSP2_CMD
287 MX23_PAD_GPMI_WRN__SSP2_SCK
288 >;
289 fsl,drive-strength = <MXS_DRIVE_8mA>;
290 fsl,voltage = <MXS_VOLTAGE_HIGH>;
291 fsl,pull-up = <MXS_PULL_ENABLE>;
292 };
293
294 mmc1_8bit_pins_a: mmc1-8bit@0 {
295 reg = <0>;
296 fsl,pinmux-ids = <
297 MX23_PAD_GPMI_D00__SSP2_DATA0
298 MX23_PAD_GPMI_D01__SSP2_DATA1
299 MX23_PAD_GPMI_D02__SSP2_DATA2
300 MX23_PAD_GPMI_D03__SSP2_DATA3
301 MX23_PAD_GPMI_D04__SSP2_DATA4
302 MX23_PAD_GPMI_D05__SSP2_DATA5
303 MX23_PAD_GPMI_D06__SSP2_DATA6
304 MX23_PAD_GPMI_D07__SSP2_DATA7
305 MX23_PAD_GPMI_RDY1__SSP2_CMD
306 MX23_PAD_GPMI_WRN__SSP2_SCK
307 >;
308 fsl,drive-strength = <MXS_DRIVE_8mA>;
309 fsl,voltage = <MXS_VOLTAGE_HIGH>;
310 fsl,pull-up = <MXS_PULL_ENABLE>;
311 };
312
313 pwm2_pins_a: pwm2@0 {
314 reg = <0>;
315 fsl,pinmux-ids = <
316 MX23_PAD_PWM2__PWM2
317 >;
318 fsl,drive-strength = <MXS_DRIVE_4mA>;
319 fsl,voltage = <MXS_VOLTAGE_HIGH>;
320 fsl,pull-up = <MXS_PULL_DISABLE>;
321 };
322
323 lcdif_24bit_pins_a: lcdif-24bit@0 {
324 reg = <0>;
325 fsl,pinmux-ids = <
326 MX23_PAD_LCD_D00__LCD_D00
327 MX23_PAD_LCD_D01__LCD_D01
328 MX23_PAD_LCD_D02__LCD_D02
329 MX23_PAD_LCD_D03__LCD_D03
330 MX23_PAD_LCD_D04__LCD_D04
331 MX23_PAD_LCD_D05__LCD_D05
332 MX23_PAD_LCD_D06__LCD_D06
333 MX23_PAD_LCD_D07__LCD_D07
334 MX23_PAD_LCD_D08__LCD_D08
335 MX23_PAD_LCD_D09__LCD_D09
336 MX23_PAD_LCD_D10__LCD_D10
337 MX23_PAD_LCD_D11__LCD_D11
338 MX23_PAD_LCD_D12__LCD_D12
339 MX23_PAD_LCD_D13__LCD_D13
340 MX23_PAD_LCD_D14__LCD_D14
341 MX23_PAD_LCD_D15__LCD_D15
342 MX23_PAD_LCD_D16__LCD_D16
343 MX23_PAD_LCD_D17__LCD_D17
344 MX23_PAD_GPMI_D08__LCD_D18
345 MX23_PAD_GPMI_D09__LCD_D19
346 MX23_PAD_GPMI_D10__LCD_D20
347 MX23_PAD_GPMI_D11__LCD_D21
348 MX23_PAD_GPMI_D12__LCD_D22
349 MX23_PAD_GPMI_D13__LCD_D23
350 MX23_PAD_LCD_DOTCK__LCD_DOTCK
351 MX23_PAD_LCD_ENABLE__LCD_ENABLE
352 MX23_PAD_LCD_HSYNC__LCD_HSYNC
353 MX23_PAD_LCD_VSYNC__LCD_VSYNC
354 >;
355 fsl,drive-strength = <MXS_DRIVE_4mA>;
356 fsl,voltage = <MXS_VOLTAGE_HIGH>;
357 fsl,pull-up = <MXS_PULL_DISABLE>;
358 };
359
360 spi2_pins_a: spi2@0 {
361 reg = <0>;
362 fsl,pinmux-ids = <
363 MX23_PAD_GPMI_WRN__SSP2_SCK
364 MX23_PAD_GPMI_RDY1__SSP2_CMD
365 MX23_PAD_GPMI_D00__SSP2_DATA0
366 MX23_PAD_GPMI_D03__SSP2_DATA3
367 >;
368 fsl,drive-strength = <MXS_DRIVE_8mA>;
369 fsl,voltage = <MXS_VOLTAGE_HIGH>;
370 fsl,pull-up = <MXS_PULL_ENABLE>;
371 };
372
373 i2c_pins_a: i2c@0 {
374 reg = <0>;
375 fsl,pinmux-ids = <
376 MX23_PAD_I2C_SCL__I2C_SCL
377 MX23_PAD_I2C_SDA__I2C_SDA
378 >;
379 fsl,drive-strength = <MXS_DRIVE_8mA>;
380 fsl,voltage = <MXS_VOLTAGE_HIGH>;
381 fsl,pull-up = <MXS_PULL_ENABLE>;
382 };
383
384 i2c_pins_b: i2c@1 {
385 reg = <1>;
386 fsl,pinmux-ids = <
387 MX23_PAD_LCD_ENABLE__I2C_SCL
388 MX23_PAD_LCD_HSYNC__I2C_SDA
389 >;
390 fsl,drive-strength = <MXS_DRIVE_8mA>;
391 fsl,voltage = <MXS_VOLTAGE_HIGH>;
392 fsl,pull-up = <MXS_PULL_ENABLE>;
393 };
394
395 i2c_pins_c: i2c@2 {
396 reg = <2>;
397 fsl,pinmux-ids = <
398 MX23_PAD_SSP1_DATA1__I2C_SCL
399 MX23_PAD_SSP1_DATA2__I2C_SDA
400 >;
401 fsl,drive-strength = <MXS_DRIVE_8mA>;
402 fsl,voltage = <MXS_VOLTAGE_HIGH>;
403 fsl,pull-up = <MXS_PULL_ENABLE>;
404 };
405 };
406
407 digctl@8001c000 {
408 compatible = "fsl,imx23-digctl";
409 reg = <0x8001c000 2000>;
410 status = "disabled";
411 };
412
413 emi@80020000 {
414 reg = <0x80020000 0x2000>;
415 status = "disabled";
416 };
417
418 dma_apbx: dma-apbx@80024000 {
419 compatible = "fsl,imx23-dma-apbx";
420 reg = <0x80024000 0x2000>;
421 interrupts = <7 5 9 26
422 19 0 25 23
423 60 58 9 0
424 0 0 0 0>;
425 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
426 "saif0", "empty", "auart0-rx", "auart0-tx",
427 "auart1-rx", "auart1-tx", "saif1", "empty",
428 "empty", "empty", "empty", "empty";
429 #dma-cells = <1>;
430 dma-channels = <16>;
431 clocks = <&clks 16>;
432 };
433
434 dcp@80028000 {
435 compatible = "fsl,imx23-dcp";
436 reg = <0x80028000 0x2000>;
437 interrupts = <53 54>;
438 status = "okay";
439 };
440
441 pxp@8002a000 {
442 reg = <0x8002a000 0x2000>;
443 status = "disabled";
444 };
445
446 ocotp@8002c000 {
447 compatible = "fsl,imx23-ocotp", "fsl,ocotp";
448 #address-cells = <1>;
449 #size-cells = <1>;
450 reg = <0x8002c000 0x2000>;
451 clocks = <&clks 15>;
452 };
453
454 axi-ahb@8002e000 {
455 reg = <0x8002e000 0x2000>;
456 status = "disabled";
457 };
458
459 lcdif@80030000 {
460 compatible = "fsl,imx23-lcdif";
461 reg = <0x80030000 2000>;
462 interrupts = <46 45>;
463 clocks = <&clks 38>;
464 status = "disabled";
465 };
466
467 ssp1: ssp@80034000 {
468 reg = <0x80034000 0x2000>;
469 interrupts = <2>;
470 clocks = <&clks 33>;
471 dmas = <&dma_apbh 2>;
472 dma-names = "rx-tx";
473 status = "disabled";
474 };
475
476 tvenc@80038000 {
477 reg = <0x80038000 0x2000>;
478 status = "disabled";
479 };
480 };
481
482 apbx@80040000 {
483 compatible = "simple-bus";
484 #address-cells = <1>;
485 #size-cells = <1>;
486 reg = <0x80040000 0x40000>;
487 ranges;
488
489 clks: clkctrl@80040000 {
490 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
491 reg = <0x80040000 0x2000>;
492 #clock-cells = <1>;
493 };
494
495 saif0: saif@80042000 {
496 reg = <0x80042000 0x2000>;
497 dmas = <&dma_apbx 4>;
498 dma-names = "rx-tx";
499 status = "disabled";
500 };
501
502 power@80044000 {
503 reg = <0x80044000 0x2000>;
504 status = "disabled";
505 };
506
507 saif1: saif@80046000 {
508 reg = <0x80046000 0x2000>;
509 dmas = <&dma_apbx 10>;
510 dma-names = "rx-tx";
511 status = "disabled";
512 };
513
514 audio-out@80048000 {
515 reg = <0x80048000 0x2000>;
516 dmas = <&dma_apbx 1>;
517 dma-names = "tx";
518 status = "disabled";
519 };
520
521 audio-in@8004c000 {
522 reg = <0x8004c000 0x2000>;
523 dmas = <&dma_apbx 0>;
524 dma-names = "rx";
525 status = "disabled";
526 };
527
528 lradc: lradc@80050000 {
529 compatible = "fsl,imx23-lradc";
530 reg = <0x80050000 0x2000>;
531 interrupts = <36 37 38 39 40 41 42 43 44>;
532 status = "disabled";
533 clocks = <&clks 26>;
534 #io-channel-cells = <1>;
535 };
536
537 spdif@80054000 {
538 reg = <0x80054000 2000>;
539 dmas = <&dma_apbx 2>;
540 dma-names = "tx";
541 status = "disabled";
542 };
543
544 i2c: i2c@80058000 {
545 #address-cells = <1>;
546 #size-cells = <0>;
547 compatible = "fsl,imx23-i2c";
548 reg = <0x80058000 0x2000>;
549 interrupts = <27>;
550 clock-frequency = <100000>;
551 dmas = <&dma_apbx 3>;
552 dma-names = "rx-tx";
553 status = "disabled";
554 };
555
556 rtc@8005c000 {
557 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
558 reg = <0x8005c000 0x2000>;
559 interrupts = <22>;
560 };
561
562 pwm: pwm@80064000 {
563 compatible = "fsl,imx23-pwm";
564 reg = <0x80064000 0x2000>;
565 clocks = <&clks 30>;
566 #pwm-cells = <2>;
567 fsl,pwm-number = <5>;
568 status = "disabled";
569 };
570
571 timrot@80068000 {
572 compatible = "fsl,imx23-timrot", "fsl,timrot";
573 reg = <0x80068000 0x2000>;
574 interrupts = <28 29 30 31>;
575 clocks = <&clks 28>;
576 };
577
578 auart0: serial@8006c000 {
579 compatible = "fsl,imx23-auart";
580 reg = <0x8006c000 0x2000>;
581 interrupts = <24>;
582 clocks = <&clks 32>;
583 dmas = <&dma_apbx 6>, <&dma_apbx 7>;
584 dma-names = "rx", "tx";
585 status = "disabled";
586 };
587
588 auart1: serial@8006e000 {
589 compatible = "fsl,imx23-auart";
590 reg = <0x8006e000 0x2000>;
591 interrupts = <59>;
592 clocks = <&clks 32>;
593 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
594 dma-names = "rx", "tx";
595 status = "disabled";
596 };
597
598 duart: serial@80070000 {
599 compatible = "arm,pl011", "arm,primecell";
600 reg = <0x80070000 0x2000>;
601 interrupts = <0>;
602 clocks = <&clks 32>, <&clks 16>;
603 clock-names = "uart", "apb_pclk";
604 status = "disabled";
605 };
606
607 usbphy0: usbphy@8007c000 {
608 compatible = "fsl,imx23-usbphy";
609 reg = <0x8007c000 0x2000>;
610 clocks = <&clks 41>;
611 status = "disabled";
612 };
613 };
614 };
615
616 ahb@80080000 {
617 compatible = "simple-bus";
618 #address-cells = <1>;
619 #size-cells = <1>;
620 reg = <0x80080000 0x80000>;
621 ranges;
622
623 usb0: usb@80080000 {
624 compatible = "fsl,imx23-usb", "fsl,imx27-usb";
625 reg = <0x80080000 0x40000>;
626 interrupts = <11>;
627 fsl,usbphy = <&usbphy0>;
628 clocks = <&clks 40>;
629 status = "disabled";
630 };
631 };
632
633 iio-hwmon {
634 compatible = "iio-hwmon";
635 io-channels = <&lradc 8>;
636 };
637};
1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 interrupt-parent = <&icoll>;
16
17 aliases {
18 gpio0 = &gpio0;
19 gpio1 = &gpio1;
20 gpio2 = &gpio2;
21 };
22
23 cpus {
24 cpu@0 {
25 compatible = "arm,arm926ejs";
26 };
27 };
28
29 apb@80000000 {
30 compatible = "simple-bus";
31 #address-cells = <1>;
32 #size-cells = <1>;
33 reg = <0x80000000 0x80000>;
34 ranges;
35
36 apbh@80000000 {
37 compatible = "simple-bus";
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x80000000 0x40000>;
41 ranges;
42
43 icoll: interrupt-controller@80000000 {
44 compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";
45 interrupt-controller;
46 #interrupt-cells = <1>;
47 reg = <0x80000000 0x2000>;
48 };
49
50 dma-apbh@80004000 {
51 compatible = "fsl,imx23-dma-apbh";
52 reg = <0x80004000 2000>;
53 };
54
55 ecc@80008000 {
56 reg = <0x80008000 2000>;
57 status = "disabled";
58 };
59
60 bch@8000a000 {
61 reg = <0x8000a000 2000>;
62 status = "disabled";
63 };
64
65 gpmi@8000c000 {
66 reg = <0x8000c000 2000>;
67 status = "disabled";
68 };
69
70 ssp0: ssp@80010000 {
71 reg = <0x80010000 2000>;
72 interrupts = <15 14>;
73 fsl,ssp-dma-channel = <1>;
74 status = "disabled";
75 };
76
77 etm@80014000 {
78 reg = <0x80014000 2000>;
79 status = "disabled";
80 };
81
82 pinctrl@80018000 {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 compatible = "fsl,imx23-pinctrl", "simple-bus";
86 reg = <0x80018000 2000>;
87
88 gpio0: gpio@0 {
89 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
90 interrupts = <16>;
91 gpio-controller;
92 #gpio-cells = <2>;
93 interrupt-controller;
94 #interrupt-cells = <2>;
95 };
96
97 gpio1: gpio@1 {
98 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
99 interrupts = <17>;
100 gpio-controller;
101 #gpio-cells = <2>;
102 interrupt-controller;
103 #interrupt-cells = <2>;
104 };
105
106 gpio2: gpio@2 {
107 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
108 interrupts = <18>;
109 gpio-controller;
110 #gpio-cells = <2>;
111 interrupt-controller;
112 #interrupt-cells = <2>;
113 };
114
115 duart_pins_a: duart@0 {
116 reg = <0>;
117 fsl,pinmux-ids = <0x11a2 0x11b2>;
118 fsl,drive-strength = <0>;
119 fsl,voltage = <1>;
120 fsl,pull-up = <0>;
121 };
122
123 mmc0_8bit_pins_a: mmc0-8bit@0 {
124 reg = <0>;
125 fsl,pinmux-ids = <0x2020 0x2030 0x2040
126 0x2050 0x0082 0x0092 0x00a2
127 0x00b2 0x2000 0x2010 0x2060>;
128 fsl,drive-strength = <1>;
129 fsl,voltage = <1>;
130 fsl,pull-up = <1>;
131 };
132
133 mmc0_pins_fixup: mmc0-pins-fixup {
134 fsl,pinmux-ids = <0x2010 0x2060>;
135 fsl,pull-up = <0>;
136 };
137 };
138
139 digctl@8001c000 {
140 reg = <0x8001c000 2000>;
141 status = "disabled";
142 };
143
144 emi@80020000 {
145 reg = <0x80020000 2000>;
146 status = "disabled";
147 };
148
149 dma-apbx@80024000 {
150 compatible = "fsl,imx23-dma-apbx";
151 reg = <0x80024000 2000>;
152 };
153
154 dcp@80028000 {
155 reg = <0x80028000 2000>;
156 status = "disabled";
157 };
158
159 pxp@8002a000 {
160 reg = <0x8002a000 2000>;
161 status = "disabled";
162 };
163
164 ocotp@8002c000 {
165 reg = <0x8002c000 2000>;
166 status = "disabled";
167 };
168
169 axi-ahb@8002e000 {
170 reg = <0x8002e000 2000>;
171 status = "disabled";
172 };
173
174 lcdif@80030000 {
175 reg = <0x80030000 2000>;
176 status = "disabled";
177 };
178
179 ssp1: ssp@80034000 {
180 reg = <0x80034000 2000>;
181 interrupts = <2 20>;
182 fsl,ssp-dma-channel = <2>;
183 status = "disabled";
184 };
185
186 tvenc@80038000 {
187 reg = <0x80038000 2000>;
188 status = "disabled";
189 };
190 };
191
192 apbx@80040000 {
193 compatible = "simple-bus";
194 #address-cells = <1>;
195 #size-cells = <1>;
196 reg = <0x80040000 0x40000>;
197 ranges;
198
199 clkctl@80040000 {
200 reg = <0x80040000 2000>;
201 status = "disabled";
202 };
203
204 saif0: saif@80042000 {
205 reg = <0x80042000 2000>;
206 status = "disabled";
207 };
208
209 power@80044000 {
210 reg = <0x80044000 2000>;
211 status = "disabled";
212 };
213
214 saif1: saif@80046000 {
215 reg = <0x80046000 2000>;
216 status = "disabled";
217 };
218
219 audio-out@80048000 {
220 reg = <0x80048000 2000>;
221 status = "disabled";
222 };
223
224 audio-in@8004c000 {
225 reg = <0x8004c000 2000>;
226 status = "disabled";
227 };
228
229 lradc@80050000 {
230 reg = <0x80050000 2000>;
231 status = "disabled";
232 };
233
234 spdif@80054000 {
235 reg = <0x80054000 2000>;
236 status = "disabled";
237 };
238
239 i2c@80058000 {
240 reg = <0x80058000 2000>;
241 status = "disabled";
242 };
243
244 rtc@8005c000 {
245 reg = <0x8005c000 2000>;
246 status = "disabled";
247 };
248
249 pwm@80064000 {
250 reg = <0x80064000 2000>;
251 status = "disabled";
252 };
253
254 timrot@80068000 {
255 reg = <0x80068000 2000>;
256 status = "disabled";
257 };
258
259 auart0: serial@8006c000 {
260 reg = <0x8006c000 0x2000>;
261 status = "disabled";
262 };
263
264 auart1: serial@8006e000 {
265 reg = <0x8006e000 0x2000>;
266 status = "disabled";
267 };
268
269 duart: serial@80070000 {
270 compatible = "arm,pl011", "arm,primecell";
271 reg = <0x80070000 0x2000>;
272 interrupts = <0>;
273 status = "disabled";
274 };
275
276 usbphy@8007c000 {
277 reg = <0x8007c000 0x2000>;
278 status = "disabled";
279 };
280 };
281 };
282
283 ahb@80080000 {
284 compatible = "simple-bus";
285 #address-cells = <1>;
286 #size-cells = <1>;
287 reg = <0x80080000 0x80000>;
288 ranges;
289
290 usbctrl@80080000 {
291 reg = <0x80080000 0x10000>;
292 status = "disabled";
293 };
294 };
295};