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v4.17
  1/*
  2 * An i2c driver for the Xicor/Intersil X1205 RTC
  3 * Copyright 2004 Karen Spearel
  4 * Copyright 2005 Alessandro Zummo
  5 *
  6 * please send all reports to:
  7 *	Karen Spearel <kas111 at gmail dot com>
  8 *	Alessandro Zummo <a.zummo@towertech.it>
  9 *
 10 * based on a lot of other RTC drivers.
 11 *
 12 * Information and datasheet:
 13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
 14 *
 15 * This program is free software; you can redistribute it and/or modify
 16 * it under the terms of the GNU General Public License version 2 as
 17 * published by the Free Software Foundation.
 18 */
 19
 20#include <linux/i2c.h>
 21#include <linux/bcd.h>
 22#include <linux/rtc.h>
 23#include <linux/delay.h>
 24#include <linux/module.h>
 25#include <linux/bitops.h>
 
 26
 27/* offsets into CCR area */
 28
 29#define CCR_SEC			0
 30#define CCR_MIN			1
 31#define CCR_HOUR		2
 32#define CCR_MDAY		3
 33#define CCR_MONTH		4
 34#define CCR_YEAR		5
 35#define CCR_WDAY		6
 36#define CCR_Y2K			7
 37
 38#define X1205_REG_SR		0x3F	/* status register */
 39#define X1205_REG_Y2K		0x37
 40#define X1205_REG_DW		0x36
 41#define X1205_REG_YR		0x35
 42#define X1205_REG_MO		0x34
 43#define X1205_REG_DT		0x33
 44#define X1205_REG_HR		0x32
 45#define X1205_REG_MN		0x31
 46#define X1205_REG_SC		0x30
 47#define X1205_REG_DTR		0x13
 48#define X1205_REG_ATR		0x12
 49#define X1205_REG_INT		0x11
 50#define X1205_REG_0		0x10
 51#define X1205_REG_Y2K1		0x0F
 52#define X1205_REG_DWA1		0x0E
 53#define X1205_REG_YRA1		0x0D
 54#define X1205_REG_MOA1		0x0C
 55#define X1205_REG_DTA1		0x0B
 56#define X1205_REG_HRA1		0x0A
 57#define X1205_REG_MNA1		0x09
 58#define X1205_REG_SCA1		0x08
 59#define X1205_REG_Y2K0		0x07
 60#define X1205_REG_DWA0		0x06
 61#define X1205_REG_YRA0		0x05
 62#define X1205_REG_MOA0		0x04
 63#define X1205_REG_DTA0		0x03
 64#define X1205_REG_HRA0		0x02
 65#define X1205_REG_MNA0		0x01
 66#define X1205_REG_SCA0		0x00
 67
 68#define X1205_CCR_BASE		0x30	/* Base address of CCR */
 69#define X1205_ALM0_BASE		0x00	/* Base address of ALARM0 */
 70
 71#define X1205_SR_RTCF		0x01	/* Clock failure */
 72#define X1205_SR_WEL		0x02	/* Write Enable Latch */
 73#define X1205_SR_RWEL		0x04	/* Register Write Enable */
 74#define X1205_SR_AL0		0x20	/* Alarm 0 match */
 75
 76#define X1205_DTR_DTR0		0x01
 77#define X1205_DTR_DTR1		0x02
 78#define X1205_DTR_DTR2		0x04
 79
 80#define X1205_HR_MIL		0x80	/* Set in ccr.hour for 24 hr mode */
 81
 82#define X1205_INT_AL0E		0x20	/* Alarm 0 enable */
 83
 84static struct i2c_driver x1205_driver;
 85
 86/*
 87 * In the routines that deal directly with the x1205 hardware, we use
 88 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
 89 * Epoch is initialized as 2000. Time is set to UTC.
 90 */
 91static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
 92				unsigned char reg_base)
 93{
 94	unsigned char dt_addr[2] = { 0, reg_base };
 95	unsigned char buf[8];
 96	int i;
 97
 98	struct i2c_msg msgs[] = {
 99		{/* setup read ptr */
100			.addr = client->addr,
101			.len = 2,
102			.buf = dt_addr
103		},
104		{/* read date */
105			.addr = client->addr,
106			.flags = I2C_M_RD,
107			.len = 8,
108			.buf = buf
109		},
110	};
111
112	/* read date registers */
113	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
114		dev_err(&client->dev, "%s: read error\n", __func__);
115		return -EIO;
116	}
117
118	dev_dbg(&client->dev,
119		"%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
120		"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
121		__func__,
122		buf[0], buf[1], buf[2], buf[3],
123		buf[4], buf[5], buf[6], buf[7]);
124
125	/* Mask out the enable bits if these are alarm registers */
126	if (reg_base < X1205_CCR_BASE)
127		for (i = 0; i <= 4; i++)
128			buf[i] &= 0x7F;
129
130	tm->tm_sec = bcd2bin(buf[CCR_SEC]);
131	tm->tm_min = bcd2bin(buf[CCR_MIN]);
132	tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
133	tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
134	tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
135	tm->tm_year = bcd2bin(buf[CCR_YEAR])
136			+ (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
137	tm->tm_wday = buf[CCR_WDAY];
138
139	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
140		"mday=%d, mon=%d, year=%d, wday=%d\n",
141		__func__,
142		tm->tm_sec, tm->tm_min, tm->tm_hour,
143		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
144
145	return 0;
146}
147
148static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
149{
150	static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
151
152	struct i2c_msg msgs[] = {
153		{     /* setup read ptr */
154			.addr = client->addr,
155			.len = 2,
156			.buf = sr_addr
157		},
158		{    /* read status */
159			.addr = client->addr,
160			.flags = I2C_M_RD,
161			.len = 1,
162			.buf = sr
163		},
164	};
165
166	/* read status register */
167	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
168		dev_err(&client->dev, "%s: read error\n", __func__);
169		return -EIO;
170	}
171
172	return 0;
173}
174
175static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
176			u8 reg_base, unsigned char alm_enable)
177{
178	int i, xfer;
179	unsigned char rdata[10] = { 0, reg_base };
180	unsigned char *buf = rdata + 2;
181
182	static const unsigned char wel[3] = { 0, X1205_REG_SR,
183						X1205_SR_WEL };
184
185	static const unsigned char rwel[3] = { 0, X1205_REG_SR,
186						X1205_SR_WEL | X1205_SR_RWEL };
187
188	static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
189
190	dev_dbg(&client->dev,
191		"%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
192		__func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
193		tm->tm_mon, tm->tm_year, tm->tm_wday);
194
195	buf[CCR_SEC] = bin2bcd(tm->tm_sec);
196	buf[CCR_MIN] = bin2bcd(tm->tm_min);
197
198	/* set hour and 24hr bit */
199	buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
200
201	buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
202
203	/* month, 1 - 12 */
204	buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
205
206	/* year, since the rtc epoch*/
207	buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
208	buf[CCR_WDAY] = tm->tm_wday & 0x07;
209	buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
210
211	/* If writing alarm registers, set compare bits on registers 0-4 */
212	if (reg_base < X1205_CCR_BASE)
213		for (i = 0; i <= 4; i++)
214			buf[i] |= 0x80;
215
216	/* this sequence is required to unlock the chip */
217	xfer = i2c_master_send(client, wel, 3);
218	if (xfer != 3) {
219		dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
220		return -EIO;
221	}
222
223	xfer = i2c_master_send(client, rwel, 3);
224	if (xfer != 3) {
225		dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
226		return -EIO;
227	}
228
229	xfer = i2c_master_send(client, rdata, sizeof(rdata));
230	if (xfer != sizeof(rdata)) {
231		dev_err(&client->dev,
232			"%s: result=%d addr=%02x, data=%02x\n",
233			__func__,
234			 xfer, rdata[1], rdata[2]);
235		return -EIO;
236	}
237
238	/* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
239	if (reg_base < X1205_CCR_BASE) {
240		unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
241
242		msleep(10);
243
244		/* ...and set or clear the AL0E bit in the INT register */
245
246		/* Need to set RWEL again as the write has cleared it */
247		xfer = i2c_master_send(client, rwel, 3);
248		if (xfer != 3) {
249			dev_err(&client->dev,
250				"%s: aloe rwel - %d\n",
251				__func__,
252				xfer);
253			return -EIO;
254		}
255
256		if (alm_enable)
257			al0e[2] = X1205_INT_AL0E;
258
259		xfer = i2c_master_send(client, al0e, 3);
260		if (xfer != 3) {
261			dev_err(&client->dev,
262				"%s: al0e - %d\n",
263				__func__,
264				xfer);
265			return -EIO;
266		}
267
268		/* and wait 10msec again for this write to complete */
269		msleep(10);
270	}
271
272	/* disable further writes */
273	xfer = i2c_master_send(client, diswe, 3);
274	if (xfer != 3) {
275		dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
276		return -EIO;
277	}
278
279	return 0;
280}
281
282static int x1205_fix_osc(struct i2c_client *client)
283{
284	int err;
285	struct rtc_time tm;
286
287	memset(&tm, 0, sizeof(tm));
288
289	err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
290	if (err < 0)
291		dev_err(&client->dev, "unable to restart the oscillator\n");
292
293	return err;
294}
295
296static int x1205_get_dtrim(struct i2c_client *client, int *trim)
297{
298	unsigned char dtr;
299	static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
300
301	struct i2c_msg msgs[] = {
302		{	/* setup read ptr */
303			.addr = client->addr,
304			.len = 2,
305			.buf = dtr_addr
306		},
307		{      /* read dtr */
308			.addr = client->addr,
309			.flags = I2C_M_RD,
310			.len = 1,
311			.buf = &dtr
312		},
313	};
314
315	/* read dtr register */
316	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
317		dev_err(&client->dev, "%s: read error\n", __func__);
318		return -EIO;
319	}
320
321	dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
322
323	*trim = 0;
324
325	if (dtr & X1205_DTR_DTR0)
326		*trim += 20;
327
328	if (dtr & X1205_DTR_DTR1)
329		*trim += 10;
330
331	if (dtr & X1205_DTR_DTR2)
332		*trim = -*trim;
333
334	return 0;
335}
336
337static int x1205_get_atrim(struct i2c_client *client, int *trim)
338{
339	s8 atr;
340	static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
341
342	struct i2c_msg msgs[] = {
343		{/* setup read ptr */
344			.addr = client->addr,
345			.len = 2,
346			.buf = atr_addr
347		},
348		{/* read atr */
349			.addr = client->addr,
350			.flags = I2C_M_RD,
351			.len = 1,
352			.buf = &atr
353		},
354	};
355
356	/* read atr register */
357	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
358		dev_err(&client->dev, "%s: read error\n", __func__);
359		return -EIO;
360	}
361
362	dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
363
364	/* atr is a two's complement value on 6 bits,
365	 * perform sign extension. The formula is
366	 * Catr = (atr * 0.25pF) + 11.00pF.
367	 */
368	atr = sign_extend32(atr, 5);
 
369
370	dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
371
372	*trim = (atr * 250) + 11000;
373
374	dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
375
376	return 0;
377}
378
379struct x1205_limit {
380	unsigned char reg, mask, min, max;
381};
382
383static int x1205_validate_client(struct i2c_client *client)
384{
385	int i, xfer;
386
387	/* Probe array. We will read the register at the specified
388	 * address and check if the given bits are zero.
389	 */
390	static const unsigned char probe_zero_pattern[] = {
391		/* register, mask */
392		X1205_REG_SR,	0x18,
393		X1205_REG_DTR,	0xF8,
394		X1205_REG_ATR,	0xC0,
395		X1205_REG_INT,	0x18,
396		X1205_REG_0,	0xFF,
397	};
398
399	static const struct x1205_limit probe_limits_pattern[] = {
400		/* register, mask, min, max */
401		{ X1205_REG_Y2K,	0xFF,	19,	20	},
402		{ X1205_REG_DW,		0xFF,	0,	6	},
403		{ X1205_REG_YR,		0xFF,	0,	99	},
404		{ X1205_REG_MO,		0xFF,	0,	12	},
405		{ X1205_REG_DT,		0xFF,	0,	31	},
406		{ X1205_REG_HR,		0x7F,	0,	23	},
407		{ X1205_REG_MN,		0xFF,	0,	59	},
408		{ X1205_REG_SC,		0xFF,	0,	59	},
409		{ X1205_REG_Y2K1,	0xFF,	19,	20	},
410		{ X1205_REG_Y2K0,	0xFF,	19,	20	},
411	};
412
413	/* check that registers have bits a 0 where expected */
414	for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
415		unsigned char buf;
416
417		unsigned char addr[2] = { 0, probe_zero_pattern[i] };
418
419		struct i2c_msg msgs[2] = {
420			{
421				.addr = client->addr,
422				.len = 2,
423				.buf = addr
424			},
425			{
426				.addr = client->addr,
427				.flags = I2C_M_RD,
428				.len = 1,
429				.buf = &buf
430			},
431		};
432
433		xfer = i2c_transfer(client->adapter, msgs, 2);
434		if (xfer != 2) {
435			dev_err(&client->dev,
436				"%s: could not read register %x\n",
437				__func__, probe_zero_pattern[i]);
438
439			return -EIO;
440		}
441
442		if ((buf & probe_zero_pattern[i+1]) != 0) {
443			dev_err(&client->dev,
444				"%s: register=%02x, zero pattern=%d, value=%x\n",
445				__func__, probe_zero_pattern[i], i, buf);
446
447			return -ENODEV;
448		}
449	}
450
451	/* check limits (only registers with bcd values) */
452	for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
453		unsigned char reg, value;
454
455		unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
456
457		struct i2c_msg msgs[2] = {
458			{
459				.addr = client->addr,
460				.len = 2,
461				.buf = addr
462			},
463			{
464				.addr = client->addr,
465				.flags = I2C_M_RD,
466				.len = 1,
467				.buf = &reg
468			},
469		};
470
471		xfer = i2c_transfer(client->adapter, msgs, 2);
472		if (xfer != 2) {
473			dev_err(&client->dev,
474				"%s: could not read register %x\n",
475				__func__, probe_limits_pattern[i].reg);
476
477			return -EIO;
478		}
479
480		value = bcd2bin(reg & probe_limits_pattern[i].mask);
481
482		if (value > probe_limits_pattern[i].max ||
483			value < probe_limits_pattern[i].min) {
484			dev_dbg(&client->dev,
485				"%s: register=%x, lim pattern=%d, value=%d\n",
486				__func__, probe_limits_pattern[i].reg,
487				i, value);
488
489			return -ENODEV;
490		}
491	}
492
493	return 0;
494}
495
496static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
497{
498	int err;
499	unsigned char intreg, status;
500	static unsigned char int_addr[2] = { 0, X1205_REG_INT };
501	struct i2c_client *client = to_i2c_client(dev);
502	struct i2c_msg msgs[] = {
503		{ /* setup read ptr */
504			.addr = client->addr,
505			.len = 2,
506			.buf = int_addr
507		},
508		{/* read INT register */
509
510			.addr = client->addr,
511			.flags = I2C_M_RD,
512			.len = 1,
513			.buf = &intreg
514		},
515	};
516
517	/* read interrupt register and status register */
518	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
519		dev_err(&client->dev, "%s: read error\n", __func__);
520		return -EIO;
521	}
522	err = x1205_get_status(client, &status);
523	if (err == 0) {
524		alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
525		alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
526		err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
527	}
528	return err;
529}
530
531static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
532{
533	return x1205_set_datetime(to_i2c_client(dev),
534		&alrm->time, X1205_ALM0_BASE, alrm->enabled);
535}
536
537static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
538{
539	return x1205_get_datetime(to_i2c_client(dev),
540		tm, X1205_CCR_BASE);
541}
542
543static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
544{
545	return x1205_set_datetime(to_i2c_client(dev),
546		tm, X1205_CCR_BASE, 0);
547}
548
549static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
550{
551	int err, dtrim, atrim;
552
553	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
554	if (!err)
555		seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
556
557	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
558	if (!err)
559		seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
560			atrim / 1000, atrim % 1000);
561	return 0;
562}
563
564static const struct rtc_class_ops x1205_rtc_ops = {
565	.proc		= x1205_rtc_proc,
566	.read_time	= x1205_rtc_read_time,
567	.set_time	= x1205_rtc_set_time,
568	.read_alarm	= x1205_rtc_read_alarm,
569	.set_alarm	= x1205_rtc_set_alarm,
570};
571
572static ssize_t x1205_sysfs_show_atrim(struct device *dev,
573				struct device_attribute *attr, char *buf)
574{
575	int err, atrim;
576
577	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
578	if (err)
579		return err;
580
581	return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
582}
583static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
584
585static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
586				struct device_attribute *attr, char *buf)
587{
588	int err, dtrim;
589
590	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
591	if (err)
592		return err;
593
594	return sprintf(buf, "%d ppm\n", dtrim);
595}
596static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
597
598static int x1205_sysfs_register(struct device *dev)
599{
600	int err;
601
602	err = device_create_file(dev, &dev_attr_atrim);
603	if (err)
604		return err;
605
606	err = device_create_file(dev, &dev_attr_dtrim);
607	if (err)
608		device_remove_file(dev, &dev_attr_atrim);
609
610	return err;
611}
612
613static void x1205_sysfs_unregister(struct device *dev)
614{
615	device_remove_file(dev, &dev_attr_atrim);
616	device_remove_file(dev, &dev_attr_dtrim);
617}
618
619
620static int x1205_probe(struct i2c_client *client,
621			const struct i2c_device_id *id)
622{
623	int err = 0;
624	unsigned char sr;
625	struct rtc_device *rtc;
626
627	dev_dbg(&client->dev, "%s\n", __func__);
628
629	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
630		return -ENODEV;
631
632	if (x1205_validate_client(client) < 0)
633		return -ENODEV;
634
 
 
635	rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name,
636					&x1205_rtc_ops, THIS_MODULE);
637
638	if (IS_ERR(rtc))
639		return PTR_ERR(rtc);
640
641	i2c_set_clientdata(client, rtc);
642
643	/* Check for power failures and eventually enable the osc */
644	err = x1205_get_status(client, &sr);
645	if (!err) {
646		if (sr & X1205_SR_RTCF) {
647			dev_err(&client->dev,
648				"power failure detected, "
649				"please set the clock\n");
650			udelay(50);
651			x1205_fix_osc(client);
652		}
653	} else {
654		dev_err(&client->dev, "couldn't read status\n");
655	}
656
657	err = x1205_sysfs_register(&client->dev);
658	if (err)
659		dev_err(&client->dev, "Unable to create sysfs entries\n");
660
661	return 0;
662}
663
664static int x1205_remove(struct i2c_client *client)
665{
666	x1205_sysfs_unregister(&client->dev);
667	return 0;
668}
669
670static const struct i2c_device_id x1205_id[] = {
671	{ "x1205", 0 },
672	{ }
673};
674MODULE_DEVICE_TABLE(i2c, x1205_id);
675
676static struct i2c_driver x1205_driver = {
677	.driver		= {
678		.name	= "rtc-x1205",
679	},
680	.probe		= x1205_probe,
681	.remove		= x1205_remove,
682	.id_table	= x1205_id,
683};
684
685module_i2c_driver(x1205_driver);
686
687MODULE_AUTHOR(
688	"Karen Spearel <kas111 at gmail dot com>, "
689	"Alessandro Zummo <a.zummo@towertech.it>");
690MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
691MODULE_LICENSE("GPL");
v3.15
  1/*
  2 * An i2c driver for the Xicor/Intersil X1205 RTC
  3 * Copyright 2004 Karen Spearel
  4 * Copyright 2005 Alessandro Zummo
  5 *
  6 * please send all reports to:
  7 *	Karen Spearel <kas111 at gmail dot com>
  8 *	Alessandro Zummo <a.zummo@towertech.it>
  9 *
 10 * based on a lot of other RTC drivers.
 11 *
 12 * Information and datasheet:
 13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
 14 *
 15 * This program is free software; you can redistribute it and/or modify
 16 * it under the terms of the GNU General Public License version 2 as
 17 * published by the Free Software Foundation.
 18 */
 19
 20#include <linux/i2c.h>
 21#include <linux/bcd.h>
 22#include <linux/rtc.h>
 23#include <linux/delay.h>
 24#include <linux/module.h>
 25
 26#define DRV_VERSION "1.0.8"
 27
 28/* offsets into CCR area */
 29
 30#define CCR_SEC			0
 31#define CCR_MIN			1
 32#define CCR_HOUR		2
 33#define CCR_MDAY		3
 34#define CCR_MONTH		4
 35#define CCR_YEAR		5
 36#define CCR_WDAY		6
 37#define CCR_Y2K			7
 38
 39#define X1205_REG_SR		0x3F	/* status register */
 40#define X1205_REG_Y2K		0x37
 41#define X1205_REG_DW		0x36
 42#define X1205_REG_YR		0x35
 43#define X1205_REG_MO		0x34
 44#define X1205_REG_DT		0x33
 45#define X1205_REG_HR		0x32
 46#define X1205_REG_MN		0x31
 47#define X1205_REG_SC		0x30
 48#define X1205_REG_DTR		0x13
 49#define X1205_REG_ATR		0x12
 50#define X1205_REG_INT		0x11
 51#define X1205_REG_0		0x10
 52#define X1205_REG_Y2K1		0x0F
 53#define X1205_REG_DWA1		0x0E
 54#define X1205_REG_YRA1		0x0D
 55#define X1205_REG_MOA1		0x0C
 56#define X1205_REG_DTA1		0x0B
 57#define X1205_REG_HRA1		0x0A
 58#define X1205_REG_MNA1		0x09
 59#define X1205_REG_SCA1		0x08
 60#define X1205_REG_Y2K0		0x07
 61#define X1205_REG_DWA0		0x06
 62#define X1205_REG_YRA0		0x05
 63#define X1205_REG_MOA0		0x04
 64#define X1205_REG_DTA0		0x03
 65#define X1205_REG_HRA0		0x02
 66#define X1205_REG_MNA0		0x01
 67#define X1205_REG_SCA0		0x00
 68
 69#define X1205_CCR_BASE		0x30	/* Base address of CCR */
 70#define X1205_ALM0_BASE		0x00	/* Base address of ALARM0 */
 71
 72#define X1205_SR_RTCF		0x01	/* Clock failure */
 73#define X1205_SR_WEL		0x02	/* Write Enable Latch */
 74#define X1205_SR_RWEL		0x04	/* Register Write Enable */
 75#define X1205_SR_AL0		0x20	/* Alarm 0 match */
 76
 77#define X1205_DTR_DTR0		0x01
 78#define X1205_DTR_DTR1		0x02
 79#define X1205_DTR_DTR2		0x04
 80
 81#define X1205_HR_MIL		0x80	/* Set in ccr.hour for 24 hr mode */
 82
 83#define X1205_INT_AL0E		0x20	/* Alarm 0 enable */
 84
 85static struct i2c_driver x1205_driver;
 86
 87/*
 88 * In the routines that deal directly with the x1205 hardware, we use
 89 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
 90 * Epoch is initialized as 2000. Time is set to UTC.
 91 */
 92static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
 93				unsigned char reg_base)
 94{
 95	unsigned char dt_addr[2] = { 0, reg_base };
 96	unsigned char buf[8];
 97	int i;
 98
 99	struct i2c_msg msgs[] = {
100		{/* setup read ptr */
101			.addr = client->addr,
102			.len = 2,
103			.buf = dt_addr
104		},
105		{/* read date */
106			.addr = client->addr,
107			.flags = I2C_M_RD,
108			.len = 8,
109			.buf = buf
110		},
111	};
112
113	/* read date registers */
114	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
115		dev_err(&client->dev, "%s: read error\n", __func__);
116		return -EIO;
117	}
118
119	dev_dbg(&client->dev,
120		"%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
121		"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
122		__func__,
123		buf[0], buf[1], buf[2], buf[3],
124		buf[4], buf[5], buf[6], buf[7]);
125
126	/* Mask out the enable bits if these are alarm registers */
127	if (reg_base < X1205_CCR_BASE)
128		for (i = 0; i <= 4; i++)
129			buf[i] &= 0x7F;
130
131	tm->tm_sec = bcd2bin(buf[CCR_SEC]);
132	tm->tm_min = bcd2bin(buf[CCR_MIN]);
133	tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
134	tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
135	tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
136	tm->tm_year = bcd2bin(buf[CCR_YEAR])
137			+ (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
138	tm->tm_wday = buf[CCR_WDAY];
139
140	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
141		"mday=%d, mon=%d, year=%d, wday=%d\n",
142		__func__,
143		tm->tm_sec, tm->tm_min, tm->tm_hour,
144		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
145
146	return 0;
147}
148
149static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
150{
151	static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
152
153	struct i2c_msg msgs[] = {
154		{     /* setup read ptr */
155			.addr = client->addr,
156			.len = 2,
157			.buf = sr_addr
158		},
159		{    /* read status */
160			.addr = client->addr,
161			.flags = I2C_M_RD,
162			.len = 1,
163			.buf = sr
164		},
165	};
166
167	/* read status register */
168	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
169		dev_err(&client->dev, "%s: read error\n", __func__);
170		return -EIO;
171	}
172
173	return 0;
174}
175
176static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
177			u8 reg_base, unsigned char alm_enable)
178{
179	int i, xfer;
180	unsigned char rdata[10] = { 0, reg_base };
181	unsigned char *buf = rdata + 2;
182
183	static const unsigned char wel[3] = { 0, X1205_REG_SR,
184						X1205_SR_WEL };
185
186	static const unsigned char rwel[3] = { 0, X1205_REG_SR,
187						X1205_SR_WEL | X1205_SR_RWEL };
188
189	static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
190
191	dev_dbg(&client->dev,
192		"%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
193		__func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
194		tm->tm_mon, tm->tm_year, tm->tm_wday);
195
196	buf[CCR_SEC] = bin2bcd(tm->tm_sec);
197	buf[CCR_MIN] = bin2bcd(tm->tm_min);
198
199	/* set hour and 24hr bit */
200	buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
201
202	buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
203
204	/* month, 1 - 12 */
205	buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
206
207	/* year, since the rtc epoch*/
208	buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
209	buf[CCR_WDAY] = tm->tm_wday & 0x07;
210	buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
211
212	/* If writing alarm registers, set compare bits on registers 0-4 */
213	if (reg_base < X1205_CCR_BASE)
214		for (i = 0; i <= 4; i++)
215			buf[i] |= 0x80;
216
217	/* this sequence is required to unlock the chip */
218	xfer = i2c_master_send(client, wel, 3);
219	if (xfer != 3) {
220		dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
221		return -EIO;
222	}
223
224	xfer = i2c_master_send(client, rwel, 3);
225	if (xfer != 3) {
226		dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
227		return -EIO;
228	}
229
230	xfer = i2c_master_send(client, rdata, sizeof(rdata));
231	if (xfer != sizeof(rdata)) {
232		dev_err(&client->dev,
233			"%s: result=%d addr=%02x, data=%02x\n",
234			__func__,
235			 xfer, rdata[1], rdata[2]);
236		return -EIO;
237	}
238
239	/* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
240	if (reg_base < X1205_CCR_BASE) {
241		unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
242
243		msleep(10);
244
245		/* ...and set or clear the AL0E bit in the INT register */
246
247		/* Need to set RWEL again as the write has cleared it */
248		xfer = i2c_master_send(client, rwel, 3);
249		if (xfer != 3) {
250			dev_err(&client->dev,
251				"%s: aloe rwel - %d\n",
252				__func__,
253				xfer);
254			return -EIO;
255		}
256
257		if (alm_enable)
258			al0e[2] = X1205_INT_AL0E;
259
260		xfer = i2c_master_send(client, al0e, 3);
261		if (xfer != 3) {
262			dev_err(&client->dev,
263				"%s: al0e - %d\n",
264				__func__,
265				xfer);
266			return -EIO;
267		}
268
269		/* and wait 10msec again for this write to complete */
270		msleep(10);
271	}
272
273	/* disable further writes */
274	xfer = i2c_master_send(client, diswe, 3);
275	if (xfer != 3) {
276		dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
277		return -EIO;
278	}
279
280	return 0;
281}
282
283static int x1205_fix_osc(struct i2c_client *client)
284{
285	int err;
286	struct rtc_time tm;
287
288	memset(&tm, 0, sizeof(tm));
289
290	err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
291	if (err < 0)
292		dev_err(&client->dev, "unable to restart the oscillator\n");
293
294	return err;
295}
296
297static int x1205_get_dtrim(struct i2c_client *client, int *trim)
298{
299	unsigned char dtr;
300	static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
301
302	struct i2c_msg msgs[] = {
303		{	/* setup read ptr */
304			.addr = client->addr,
305			.len = 2,
306			.buf = dtr_addr
307		},
308		{      /* read dtr */
309			.addr = client->addr,
310			.flags = I2C_M_RD,
311			.len = 1,
312			.buf = &dtr
313		},
314	};
315
316	/* read dtr register */
317	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
318		dev_err(&client->dev, "%s: read error\n", __func__);
319		return -EIO;
320	}
321
322	dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
323
324	*trim = 0;
325
326	if (dtr & X1205_DTR_DTR0)
327		*trim += 20;
328
329	if (dtr & X1205_DTR_DTR1)
330		*trim += 10;
331
332	if (dtr & X1205_DTR_DTR2)
333		*trim = -*trim;
334
335	return 0;
336}
337
338static int x1205_get_atrim(struct i2c_client *client, int *trim)
339{
340	s8 atr;
341	static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
342
343	struct i2c_msg msgs[] = {
344		{/* setup read ptr */
345			.addr = client->addr,
346			.len = 2,
347			.buf = atr_addr
348		},
349		{/* read atr */
350			.addr = client->addr,
351			.flags = I2C_M_RD,
352			.len = 1,
353			.buf = &atr
354		},
355	};
356
357	/* read atr register */
358	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
359		dev_err(&client->dev, "%s: read error\n", __func__);
360		return -EIO;
361	}
362
363	dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
364
365	/* atr is a two's complement value on 6 bits,
366	 * perform sign extension. The formula is
367	 * Catr = (atr * 0.25pF) + 11.00pF.
368	 */
369	if (atr & 0x20)
370		atr |= 0xC0;
371
372	dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
373
374	*trim = (atr * 250) + 11000;
375
376	dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
377
378	return 0;
379}
380
381struct x1205_limit {
382	unsigned char reg, mask, min, max;
383};
384
385static int x1205_validate_client(struct i2c_client *client)
386{
387	int i, xfer;
388
389	/* Probe array. We will read the register at the specified
390	 * address and check if the given bits are zero.
391	 */
392	static const unsigned char probe_zero_pattern[] = {
393		/* register, mask */
394		X1205_REG_SR,	0x18,
395		X1205_REG_DTR,	0xF8,
396		X1205_REG_ATR,	0xC0,
397		X1205_REG_INT,	0x18,
398		X1205_REG_0,	0xFF,
399	};
400
401	static const struct x1205_limit probe_limits_pattern[] = {
402		/* register, mask, min, max */
403		{ X1205_REG_Y2K,	0xFF,	19,	20	},
404		{ X1205_REG_DW,		0xFF,	0,	6	},
405		{ X1205_REG_YR,		0xFF,	0,	99	},
406		{ X1205_REG_MO,		0xFF,	0,	12	},
407		{ X1205_REG_DT,		0xFF,	0,	31	},
408		{ X1205_REG_HR,		0x7F,	0,	23	},
409		{ X1205_REG_MN,		0xFF,	0,	59	},
410		{ X1205_REG_SC,		0xFF,	0,	59	},
411		{ X1205_REG_Y2K1,	0xFF,	19,	20	},
412		{ X1205_REG_Y2K0,	0xFF,	19,	20	},
413	};
414
415	/* check that registers have bits a 0 where expected */
416	for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
417		unsigned char buf;
418
419		unsigned char addr[2] = { 0, probe_zero_pattern[i] };
420
421		struct i2c_msg msgs[2] = {
422			{
423				.addr = client->addr,
424				.len = 2,
425				.buf = addr
426			},
427			{
428				.addr = client->addr,
429				.flags = I2C_M_RD,
430				.len = 1,
431				.buf = &buf
432			},
433		};
434
435		xfer = i2c_transfer(client->adapter, msgs, 2);
436		if (xfer != 2) {
437			dev_err(&client->dev,
438				"%s: could not read register %x\n",
439				__func__, probe_zero_pattern[i]);
440
441			return -EIO;
442		}
443
444		if ((buf & probe_zero_pattern[i+1]) != 0) {
445			dev_err(&client->dev,
446				"%s: register=%02x, zero pattern=%d, value=%x\n",
447				__func__, probe_zero_pattern[i], i, buf);
448
449			return -ENODEV;
450		}
451	}
452
453	/* check limits (only registers with bcd values) */
454	for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
455		unsigned char reg, value;
456
457		unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
458
459		struct i2c_msg msgs[2] = {
460			{
461				.addr = client->addr,
462				.len = 2,
463				.buf = addr
464			},
465			{
466				.addr = client->addr,
467				.flags = I2C_M_RD,
468				.len = 1,
469				.buf = &reg
470			},
471		};
472
473		xfer = i2c_transfer(client->adapter, msgs, 2);
474		if (xfer != 2) {
475			dev_err(&client->dev,
476				"%s: could not read register %x\n",
477				__func__, probe_limits_pattern[i].reg);
478
479			return -EIO;
480		}
481
482		value = bcd2bin(reg & probe_limits_pattern[i].mask);
483
484		if (value > probe_limits_pattern[i].max ||
485			value < probe_limits_pattern[i].min) {
486			dev_dbg(&client->dev,
487				"%s: register=%x, lim pattern=%d, value=%d\n",
488				__func__, probe_limits_pattern[i].reg,
489				i, value);
490
491			return -ENODEV;
492		}
493	}
494
495	return 0;
496}
497
498static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
499{
500	int err;
501	unsigned char intreg, status;
502	static unsigned char int_addr[2] = { 0, X1205_REG_INT };
503	struct i2c_client *client = to_i2c_client(dev);
504	struct i2c_msg msgs[] = {
505		{ /* setup read ptr */
506			.addr = client->addr,
507			.len = 2,
508			.buf = int_addr
509		},
510		{/* read INT register */
511
512			.addr = client->addr,
513			.flags = I2C_M_RD,
514			.len = 1,
515			.buf = &intreg
516		},
517	};
518
519	/* read interrupt register and status register */
520	if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
521		dev_err(&client->dev, "%s: read error\n", __func__);
522		return -EIO;
523	}
524	err = x1205_get_status(client, &status);
525	if (err == 0) {
526		alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
527		alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
528		err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
529	}
530	return err;
531}
532
533static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
534{
535	return x1205_set_datetime(to_i2c_client(dev),
536		&alrm->time, X1205_ALM0_BASE, alrm->enabled);
537}
538
539static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
540{
541	return x1205_get_datetime(to_i2c_client(dev),
542		tm, X1205_CCR_BASE);
543}
544
545static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
546{
547	return x1205_set_datetime(to_i2c_client(dev),
548		tm, X1205_CCR_BASE, 0);
549}
550
551static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
552{
553	int err, dtrim, atrim;
554
555	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
556	if (!err)
557		seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
558
559	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
560	if (!err)
561		seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
562			atrim / 1000, atrim % 1000);
563	return 0;
564}
565
566static const struct rtc_class_ops x1205_rtc_ops = {
567	.proc		= x1205_rtc_proc,
568	.read_time	= x1205_rtc_read_time,
569	.set_time	= x1205_rtc_set_time,
570	.read_alarm	= x1205_rtc_read_alarm,
571	.set_alarm	= x1205_rtc_set_alarm,
572};
573
574static ssize_t x1205_sysfs_show_atrim(struct device *dev,
575				struct device_attribute *attr, char *buf)
576{
577	int err, atrim;
578
579	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
580	if (err)
581		return err;
582
583	return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
584}
585static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
586
587static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
588				struct device_attribute *attr, char *buf)
589{
590	int err, dtrim;
591
592	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
593	if (err)
594		return err;
595
596	return sprintf(buf, "%d ppm\n", dtrim);
597}
598static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
599
600static int x1205_sysfs_register(struct device *dev)
601{
602	int err;
603
604	err = device_create_file(dev, &dev_attr_atrim);
605	if (err)
606		return err;
607
608	err = device_create_file(dev, &dev_attr_dtrim);
609	if (err)
610		device_remove_file(dev, &dev_attr_atrim);
611
612	return err;
613}
614
615static void x1205_sysfs_unregister(struct device *dev)
616{
617	device_remove_file(dev, &dev_attr_atrim);
618	device_remove_file(dev, &dev_attr_dtrim);
619}
620
621
622static int x1205_probe(struct i2c_client *client,
623			const struct i2c_device_id *id)
624{
625	int err = 0;
626	unsigned char sr;
627	struct rtc_device *rtc;
628
629	dev_dbg(&client->dev, "%s\n", __func__);
630
631	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
632		return -ENODEV;
633
634	if (x1205_validate_client(client) < 0)
635		return -ENODEV;
636
637	dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
638
639	rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name,
640					&x1205_rtc_ops, THIS_MODULE);
641
642	if (IS_ERR(rtc))
643		return PTR_ERR(rtc);
644
645	i2c_set_clientdata(client, rtc);
646
647	/* Check for power failures and eventually enable the osc */
648	err = x1205_get_status(client, &sr);
649	if (!err) {
650		if (sr & X1205_SR_RTCF) {
651			dev_err(&client->dev,
652				"power failure detected, "
653				"please set the clock\n");
654			udelay(50);
655			x1205_fix_osc(client);
656		}
657	} else {
658		dev_err(&client->dev, "couldn't read status\n");
659	}
660
661	err = x1205_sysfs_register(&client->dev);
662	if (err)
663		dev_err(&client->dev, "Unable to create sysfs entries\n");
664
665	return 0;
666}
667
668static int x1205_remove(struct i2c_client *client)
669{
670	x1205_sysfs_unregister(&client->dev);
671	return 0;
672}
673
674static const struct i2c_device_id x1205_id[] = {
675	{ "x1205", 0 },
676	{ }
677};
678MODULE_DEVICE_TABLE(i2c, x1205_id);
679
680static struct i2c_driver x1205_driver = {
681	.driver		= {
682		.name	= "rtc-x1205",
683	},
684	.probe		= x1205_probe,
685	.remove		= x1205_remove,
686	.id_table	= x1205_id,
687};
688
689module_i2c_driver(x1205_driver);
690
691MODULE_AUTHOR(
692	"Karen Spearel <kas111 at gmail dot com>, "
693	"Alessandro Zummo <a.zummo@towertech.it>");
694MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
695MODULE_LICENSE("GPL");
696MODULE_VERSION(DRV_VERSION);