1/*
  2 * Copyright 2015 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26#ifndef __DAL_HW_SHARED_H__
 27#define __DAL_HW_SHARED_H__
 28
 29#include "os_types.h"
 30#include "fixed31_32.h"
 31#include "dc_hw_types.h"
 32
 33/******************************************************************************
 34 * Data types shared between different Virtual HW blocks
 35 ******************************************************************************/
 36
 37#define MAX_PIPES 6
 38
 39struct gamma_curve {
 40	uint32_t offset;
 41	uint32_t segments_num;
 42};
 43
 44struct curve_points {
 45	struct fixed31_32 x;
 46	struct fixed31_32 y;
 47	struct fixed31_32 offset;
 48	struct fixed31_32 slope;
 49
 50	uint32_t custom_float_x;
 51	uint32_t custom_float_y;
 52	uint32_t custom_float_offset;
 53	uint32_t custom_float_slope;
 54};
 55
 56struct pwl_result_data {
 57	struct fixed31_32 red;
 58	struct fixed31_32 green;
 59	struct fixed31_32 blue;
 60
 61	struct fixed31_32 delta_red;
 62	struct fixed31_32 delta_green;
 63	struct fixed31_32 delta_blue;
 64
 65	uint32_t red_reg;
 66	uint32_t green_reg;
 67	uint32_t blue_reg;
 68
 69	uint32_t delta_red_reg;
 70	uint32_t delta_green_reg;
 71	uint32_t delta_blue_reg;
 72};
 73
 74struct pwl_params {
 75	struct gamma_curve arr_curve_points[34];
 76	struct curve_points arr_points[2];
 77	struct pwl_result_data rgb_resulted[256 + 3];
 78	uint32_t hw_points_num;
 79};
 80
 81/* move to dpp
 82 * while we are moving functionality out of opp to dpp to align
 83 * HW programming to HW IP, we define these struct in hw_shared
 84 * so we can still compile while refactoring
 85 */
 86
 87enum lb_pixel_depth {
 88	/* do not change the values because it is used as bit vector */
 89	LB_PIXEL_DEPTH_18BPP = 1,
 90	LB_PIXEL_DEPTH_24BPP = 2,
 91	LB_PIXEL_DEPTH_30BPP = 4,
 92	LB_PIXEL_DEPTH_36BPP = 8
 93};
 94
 95enum graphics_csc_adjust_type {
 96	GRAPHICS_CSC_ADJUST_TYPE_BYPASS = 0,
 97	GRAPHICS_CSC_ADJUST_TYPE_HW, /* without adjustments */
 98	GRAPHICS_CSC_ADJUST_TYPE_SW  /*use adjustments */
 99};
100
101enum ipp_degamma_mode {
102	IPP_DEGAMMA_MODE_BYPASS,
103	IPP_DEGAMMA_MODE_HW_sRGB,
104	IPP_DEGAMMA_MODE_HW_xvYCC,
105	IPP_DEGAMMA_MODE_USER_PWL
106};
107
108enum ipp_output_format {
109	IPP_OUTPUT_FORMAT_12_BIT_FIX,
110	IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
111	IPP_OUTPUT_FORMAT_FLOAT
112};
113
114enum expansion_mode {
115	EXPANSION_MODE_DYNAMIC,
116	EXPANSION_MODE_ZERO
117};
118
119struct default_adjustment {
120	enum lb_pixel_depth lb_color_depth;
121	enum dc_color_space out_color_space;
122	enum dc_color_space in_color_space;
123	enum dc_color_depth color_depth;
124	enum pixel_format surface_pixel_format;
125	enum graphics_csc_adjust_type csc_adjust_type;
126	bool force_hw_default;
127};
128
129
130struct out_csc_color_matrix {
131	enum dc_color_space color_space;
132	uint16_t regval[12];
133};
134
135
136enum opp_regamma {
137	OPP_REGAMMA_BYPASS = 0,
138	OPP_REGAMMA_SRGB,
139	OPP_REGAMMA_XVYCC,
140	OPP_REGAMMA_USER
141};
142
143struct csc_transform {
144	uint16_t matrix[12];
145	bool enable_adjustment;
146};
147
148struct dc_bias_and_scale {
149	uint16_t scale_red;
150	uint16_t bias_red;
151	uint16_t scale_green;
152	uint16_t bias_green;
153	uint16_t scale_blue;
154	uint16_t bias_blue;
155};
156
157enum test_pattern_dyn_range {
158	TEST_PATTERN_DYN_RANGE_VESA = 0,
159	TEST_PATTERN_DYN_RANGE_CEA
160};
161
162enum test_pattern_mode {
163	TEST_PATTERN_MODE_COLORSQUARES_RGB = 0,
164	TEST_PATTERN_MODE_COLORSQUARES_YCBCR601,
165	TEST_PATTERN_MODE_COLORSQUARES_YCBCR709,
166	TEST_PATTERN_MODE_VERTICALBARS,
167	TEST_PATTERN_MODE_HORIZONTALBARS,
168	TEST_PATTERN_MODE_SINGLERAMP_RGB,
169	TEST_PATTERN_MODE_DUALRAMP_RGB
170};
171
172enum test_pattern_color_format {
173	TEST_PATTERN_COLOR_FORMAT_BPC_6 = 0,
174	TEST_PATTERN_COLOR_FORMAT_BPC_8,
175	TEST_PATTERN_COLOR_FORMAT_BPC_10,
176	TEST_PATTERN_COLOR_FORMAT_BPC_12
177};
178
179enum controller_dp_test_pattern {
180	CONTROLLER_DP_TEST_PATTERN_D102 = 0,
181	CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR,
182	CONTROLLER_DP_TEST_PATTERN_PRBS7,
183	CONTROLLER_DP_TEST_PATTERN_COLORSQUARES,
184	CONTROLLER_DP_TEST_PATTERN_VERTICALBARS,
185	CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS,
186	CONTROLLER_DP_TEST_PATTERN_COLORRAMP,
187	CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
188	CONTROLLER_DP_TEST_PATTERN_RESERVED_8,
189	CONTROLLER_DP_TEST_PATTERN_RESERVED_9,
190	CONTROLLER_DP_TEST_PATTERN_RESERVED_A,
191	CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA
192};
193
194#endif /* __DAL_HW_SHARED_H__ */